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NEAR Rebounds After Launching A Business Wallet That’s ‘Confidential From The Market’, With XRP, Bitcoin And Solana Support
NEAR Business allowed teams to pay staff and vendors, swap assets, and allocate capital across more than 35 chains, including BTC, ETH, and SOL.
Drew Rasmussen dominates Guardians in Game 5 to move Rays win away from World Series
Drew Rasmussen allowed one run over seven innings for his second postseason win, Tampa Bay’s offense kept on constant pressure and the Rays beat the Cleveland Guardians
Jalen Duren Barred From Pistons Training Camp
Jalen Duren will not be allowed to participate in Detroit Pistons training camp while he remains unsigned as his contract standoff with the team continues.
Lewis Hall Allowed To Shine Under Matthias Jaissle’s New System
The England international is thriving as a dynamic playmaker, trading rigid defensive duties for a versatile role that maximizes his technical composure and aggressive attacking instincts.
How a controversial lift on 'Dancing With the Stars' and a reference to Will Smith's Oscars slap led to pro dancer Val Chmerkovskiy's suspension
The controversy began when judge Carrie Ann Inaba told Harry Shum Jr. and Jenna Johnson that their routine included a move that is not allowed in traditional samba.
The eruption that destroyed Pompeii is helping scientists date Earth's history
Historical accounts of the eruption nearly 2,000 years ago provide a precise timeline that allowed recalibration of one of the most versatile dating methods.
Kate Mulgrew says being “Star Trek”’s ‘unprecedented’ first female captain ‘reshaped my life’
“I think what she allowed women in STEM to do as a result of her command was absolutely, deeply significant,” Mulgrew said.
Battenfeld: Maura Healey’s Trump tactic is why Americans hate politics
The incumbent Massachusetts governor was allowed by a weak moderator to dodge every question. The late, legendary Tim Russert would never have tolerated that.
“DWTS” judge Carrie Ann Inaba elaborates on Giada De Laurentiis critiques beyond new 1-word review rule
“Dancing With the Stars” implemented a new rule that only allowed two judges to provide feedback, while a third had to react in one word.
Political ads on Facebook, after the Meta ban
Since 6 October 2025, Meta has no longer allowed paid advertising on political, electoral or social matters in the European Union. The company decided in response to Regulation (EU) 2024 / 900 on transparency and targeting political advertising (TTPA), applicable from 10 October 2025, the requirements of which it considers "impossible to apply '[1, 2].
Column: Voter ID ballot measure fixes a problem that doesn't exist
What’s so wrong about requiring every Californian to show a government ID before they’re allowed to vote?
'I can't do performances': Billy Joel gives health update after recent brain surgery
"I'm not allowed to drive. And I can't do performances." | Billy Joel opened up about his health in a recent interview, saying that while he is better now, he doesn't know if he'll be able to perform again.
Broncos Special Teams Coach Wants Rule Change For Kickoffs
Denver Broncos special teams coach Darren Rizzi doesn't think teams should be allowed to use holders.
Health department can’t change Oklahoma gender designations on birth certificate, court rules
State law has never allowed changes to the sex designation on Oklahoman’s birth certificates, the state’s high court ruled.
TSU students return to Science Building, report persistent mold smells and safety concerns
Students at Texas Southern University were allowed back inside the Science Building after mold, condensation, and air quality issues forced the facility to shut down for nearly two months.
Cloudflare fixes Containers cross-tenant flaw exposing customer data
Cloudflare has fixed a vulnerability in Containers and Sandboxes that allowed customers with a Workers Paid account to recover residual data from other customers' containers on the same physical host.
The part of CRISPR that keeps scientists up at night
Jennifer Doudna co-invented CRISPR. Now she's the one asking how much power we should be allowed to handle.
Supreme Court says New Hampshire can limit use of student IDs for voting
The Supreme Court on Thursday allowed New Hampshire officials to limit when voters may use a student ID to receive a ballot, agreeing that a lower court ruling that blocked enforcement of the policy was too close to Election Day.
Michael Che's new Netflix special is 'Shot in Minnesota'
MINNEAPOLIS — Everyone who wasn’t allowed a bathroom break while “Saturday Night Live” weekend anchor Michael Che was taping his Netflix special at First Avenue is about to find out
Yankees draw baseball’s hottest September arm in Game 2
The Yankees got one hit Saturday. Their reward for trying to even the series Monday is a starter who allowed […]
I On Politics
HUNDREDS ATTEND ADDABBO’S AUTUMN E-WASTE EVENT: State Senator Joseph P. Addabbo, Jr. hosted his free bi-annual electronic waste recycling event on October 4, 2026, at the Forest Park Bandshell Parking Lot. The Lower East Side Ecology Center collected electronic waste including new, outdated, and broken devices. A partnership with PaintCare allowed Addabbo’s Office to
Scientists stop quantum particle using magnetic field it never crossed
Quantum interference and trapped-ion qubits allowed Oxford physicists to halt particle tunneling using a magnetic field it never touched.
Hayden Panettiere's ex Wladimir Klitschko petitions to protect their daughter's inheritance
LOS ANGELES — Actor Hayden Panettiere’s ex-fiancé, Wladimir Klitschko, has filed an urgent petition asking that he be allowed to act as their 11-year-old daughter’s temporary representative in California court
Arizona Cardinals allow another opening drive TD
The Cardinals have allowed 82-yard touchdowns in two consecutive games.
Jonesboro MAPC Denies Commercial Rezoning Next to Math and Science Magnet School
The Jonesboro Metropolitan Area Planning Commission (MAPC) voted against a rezoning request Tuesday night that would have allowed commercial development on property adjacent to the Jonesboro Math and Science Magnet School.
ASU overwhelmed by Baylor's physicality in blowout loss
ASU entered the game 15th nationally in total yards allowed in first halves (121.3), and the Bears hung 299 yards on the Sun Devils in the first 30 minutes.
Iconic musician gives health update, reveals he’s not allowed to drive
The 77-year-old singer has a neurological condition that affects his balance and other functions.
AI-generated political ads have appeared in Pennsylvania. Are these kind of ads allowed?
Arizona Diamondbacks News 10/13
Diamondbacks News These three young D-backs could be in for breakout years in ’27 by Steve Gilbert [DBacks.com] RHP Gerardo CarrilloCarrillo was signed as a Minor League free agent in the offseason, and after eight seasons in the Minors, he made his big league debut in late July at age 27. Carrillo allowed a run in two […]
US Supreme Court won't speed up Democratic challenge to FCC political ad policy, for now
Siding with Republicans, the US Supreme Court on Thursday allowed the Federal Communications Commission to avoid for now a judicially imposed deadline in a Democratic challenge to the agency's new political advertising policy.
Lakers Insider Suggests Shocking Jaden Hardy Trade Scenario
The Los Angeles Lakers remain in a tough spot of having to cut or trade someone before the NBA season starts. League rules see the Lakers currently one player over the maximum allowed players. Dalton Knecht continues to be the top rumored name to get cut, but Jaden Hardy remains a realistic option as well. […] The post Lakers Insider Suggests Shocking Jaden Hardy Trade Scenario appeared first on HEAVY.
Scientists add third dimension to light and unlock hidden electron states
A 3D light field using crossed femtosecond lasers has allowed scientists to access and image elusive electronic quantum states.
'Illegal activity' prompts liquor denial, tobacco hearing for Peoria business
PEORIA - A convenience store situated along Knoxville Avenue will not be allowed to sell alcohol, despite narrowly receiving site approval following weeks of debate at City Council.
Kelly Ripa reveals her own funeral plans, says Mark Consuelos isn’t allowed to do 1 key task
Kelly Ripa revealed her own funeral plans on ‘Live With Kelly and Mark,’ admitting that husband Mark Consuelos isn’t allowed to perform one key task after she dies.
QB Drew Sheridan sees system fit, special atmosphere at Pitt
Pittsburgh had Dearborn (Mich.) Divine Child quarrterback Drew Sheridan on campus for an unofficial visit on Saturday. The junior signal-caller saw the Panthers defeat Bucknell. He had been to campus in the past, but this gameday visit allowed him a different experience than his previous trips.
Was Delay Of Universal Health Plan Report Unlawful? Does It Matter?
A Republican state representative has been on a crusade alleging lawmakers allowed a major report to be delayed without statutory authority. He may have a point, but Democrats say he’s harping on a technicality.
Bucs’ Josiah Trotter questionable for Steelers game with knee injury
Bucs rookie linebacker Josiah Trotter was limited in practice Friday with a knee injury and is listed as questionable for Sunday’s game against the Steelers. Trotter ranks first on the club in tackles (41) and passer rating allowed (66.
Can You Get Actually Swallowed By A Whale? Here's The Real Science Behind 'Whalefall'
'Whalefall' is a whale of a tale, but poor Austin Abrams might be a little luckier in reality.
Mamdani's business czar targets 'justice' instead
EDC head Anthony Shorris, entrusted with the indispensable, herculean task of promoting citywide business growth, sounds like he’s swallowed Zohran Mandani’s socialistic Kool-Aid.
We Got GTA V Running On Web Browser Before GTA 6
PlayGTA5.com briefly allowed users to play GTA V in a web browser, requiring only 700 MB to start before being taken down, possibly by Rockstar.
Disgraced eMudhra drops out of TLS business following certificate debacle
Flubbed key signing "ceremony" allowed minting of Web credentials for any site.
Billy Joel Shares Health Update as He Prepares to Auction Off His Beloved Motorcycle Collection: ‘I’m Not Allowed to Drive’
Further, "The neurologist told me, every time you do a show, it’s like you’re getting a concussion," Joel shared in a new interview.
Nets Allowed 3rd-Fewest Points in Paint Last Season
Nic Claxton’s departure leaves Brooklyn’s elite interior defense in flux as Jordi Fernández pivots to a high-pressure, turnover-heavy scheme to compensate for a lack of traditional rim protection.
Justice Department asks court to let Trump reinstate White House press ban
The Justice Department argued that President Donald Trump should be allowed to reinstate his White House ban of CNN, MS NOW and Politico in a court filing late Friday ahead of a hearing next week in the lawsuit from the news companies.
The Supreme Court just threw a new monkey wrench at the midterms. Here’s what to know
Election Day is fast approaching, but the Supreme Court is still weighing in on the rules, most recently on Friday when it allowed states to use a Trump administration-backed tool to ferret out noncitizen voting there’s little evidence occurs in a widespread way.
Airbnb cracks down on checkout chore lists as hosts face new limits
Airbnb's new checkout rules bar hosts from asking guests to strip beds, wash dishes or do laundry, but some reasonable requests are still allowed.
Art that serves others: How a Harnett County muralist is making a lasting mark in her community
Van Goat Studios, which has been operating since 2019, has allowed Johnson to express herself and reflect the spirit of local communities through murals. Photo provided by Elyse Johnson.Elyse Johnson of Van Goat Studios in Dunn wants to spread her artistry and make a lasting mark in her community. Van Goat, which has been operating since 2019, has allowed Johnson to express herself through murals and decorating electrical boxes in the urban landscapes of North Carolina. On top of traditional mural painting, Johnson offers what she calls “portable murals,” an option tailor-made for structure owners who do not want to commit to a design for their wall.“A contractor builds a framed piece of wood, and then they can frame the ‘mural’ onto the wood, whether it’s into their building, whether it’s interior or exterior,” Johnson said. The beginnings of Johnson’s journey into establishing Van Goat Studios reflect the teachings she wants artists to take away today: everything is a learning opportunity. When she started Van Goat, she shared it was a joint venture with a business partner. “I mainly did that because I didn’t feel like I was ready to go and do this on my own,” Johnson said. Her business partner eventually dropped out of the project, deciding she wanted to pursue other forms of art. That is when Johnson was thrust into growing her business on her own during and in the aftermath of the COVID-19 pandemic. “I had built up my confidence enough to go out and reach new heights,” she said. “And I was probably one of the few that benefited from COVID.”The moment presented a silver lining for Johnson. One of her first projects was a Farmers Day mural for the town of Coats. “When COVID-19 hit, Coats was not able to hold their annual festival, so they had a little bit of savings. They decided they wanted to do something for their community without getting anyone sick,” Johnson said.From there, word of mouth spread. Now, Johnson has an organic way of approaching projects. “Like a lot of muralists, if I feel inspired by a building, I will just go up and talk to that building owner and tell them a mural is something they should consider,” Johnson said. But above all, Johnson says she wants art to be accessible to everyone. Johnson said she is trying to stick to projects that benefit “the little guys.” “I’m not trying to go for a project in downtown Raleigh to get the eight-foot-tall building,” Johnson said. “I’m not trying to go to those major cities and get those huge buildings for two reasons: one, I don’t want to go that high; two, my passion really lies with the small guys.” But due to financial constraints and the material reality of art commerce, that requires open communication, she added. “I don’t want to just snowball you with this huge price, and then you just shut me down because it wasn’t what you were thinking,” Johnson said. “At the same time, I am an advocate for the arts, so I’m not going to give you a $10,000 mural when you’re only going to pay $5,000.” There is a healthy balance in explaining the artistic process and working with clients and the surrounding community, Johnson said.“Your municipality invested this, and this is why they invested this, and this is how it’s going to help and improve your community,” she noted. “Same thing when I’m talking to a small business. You asked for me to come at you with this that is outside your budget. How do we make this still your same exact goal, but within your budget lines?” Johnson also provides lessons to aspiring artists. She does so with a mission: how do you master the balance between being a great artist and a competent business owner? “We still do art lessons, but I’m also going to give you business scenarios,” she noted.One of the scenarios she has come up with for her students is a T-shirt competition. “The kids have to think about ‘okay, I can’t just draw whatever I want on a T-shirt. I need to think about what colors Miss Elyse likes. What does Miss Elyse’s logo look like? What would Miss Elyse like?’” Johnson said. “So the design needs to be around that kind of concept.” As Johnson looks toward the future of Van Goat Studios, she is thinking of time, longevity and succession. Johnson is a new mom, which she said has shaped how she sees the future of the studio.“I still want my name and my business out there continuing, so that when my daughter is of age and she can be more independent, then I can be out there doing more and more,” Johnson said. “I would love to get a student to pass this on to, or an intern. I would love for this business to be passed on to the next generation and let them go.”
The percentage of people without health insurance is growing
The percentage of working-age adults without health insurance has increased in the past two years, largely because many people can no longer afford Obamacare coverage after Congress allowed federal subsidies to expire at the end of last year. The uninsured rate for adults ages 19-64 rose to 11.2% this year, up from 8.9% in 2024, […]
National Forum To Convene on Cutting Edge Science that Drives Solutions In Harmony with Nature - Beyond Pesticides Daily News Blog
The 43rd National Forum Series, Advancing Science on Pesticides, Taking Action in Harmony with Nature, and Sustaining Life —scheduled to begin on October 21, 2026, 1:00-3:30pm (Eastern time, US)—will focus on cutting edge science that both (1) defines the limitations of health and environmental protection standards governing allowed toxic pesticide use and (2) informs the urgent need to advance alternatives not reliant on hazardous inputs. The Forum is free to all participants. ➡️ Register HERE.
UCF MBB Falls 85-81 Against Shorthanded LSU
Dior Johnson’s explosive second half sparked a resilient Knights squad, but late miscues allowed the Tigers to escape Orlando with a narrow exhibition victory on Wednesday night.
Winnipeg Jets’ Blowout Loss Comes With Bizarre Statistical Twist
The Winnipeg Jets suffered a blowout loss on Friday night to the Anaheim Ducks in a game that, on paper, looked like it would be closer.When a team loses 5-1, the assumption is that they allowed a lot of shots on goal and didn’t generate many themselves. In Friday night’s loss to Anaheim, the Jets […] The post Winnipeg Jets’ Blowout Loss Comes With Bizarre Statistical Twist appeared first on HEAVY.
How the Zelda Ocarina of Time remake changes the classic game’s script
At the start of the iconic 1998 Nintendo 64 game The Legend of Zelda: The Ocarina of Time, our playable hero Link wakes up in his tree cabin, heads outside and is greeted by his friend Saria. “Yahoo! Hi, Stotil!" she says. In other people’s copies of the games, she might say “Hi, Link!” or “Hi, Brick!” or use whatever other name the player was allowed to input when first launching the game. The more important point is that she starts with a “Yahoo!” In Nintendo’s 2011 remake of Ocarina of Time for the 3DS handheld, Saria greets Link with that same word. But for the 2026 Switch 2 re-remake of Ocarina of Time, out November 5, Saria’s salutation has changed: “Hello, Link!” she exclaims. There’s no “Yahoo” to be heard. Last month, in an official Nintendo video preview, Zelda series producer Eiji Aonuma described the remake as a “faithful interpretation using modern technologies.” Faithful means the gameplay hasn’t changed much. Dungeons, quests, and just generally what you do in the game doesn’t seem to have changed, not based on what Nintendo has shown nor the hour of the game I played in New York City a couple of weeks ago. The graphics have been overhauled. The controls have been tweaked. Players can now manually control the camera and make Link jump with the press of a button, both notable differences from the original 1998 design. But Link’s journey appears to take the same path, with the same obstacles in its way. The remake’s biggest alteration to Ocarina of Time that I’ve spotted so far just might be the script. About the game’s story, Aonuma said in September, “We’ve added quite a lot of new dialogue for the characters, so that their personalities shine even more.” Earlier this month, I played a chunk of the Ocarina of Time remake at a Nintendo showcase. In the game’s earliest moments, I made a point of talking to characters and recording what they said. I found the script to be more colorful, more natural in its phrasing, more careful to establish its characters, and certainly more wordy even with the removal of that one “Yahoo!”. I’ve got some very early-game examples, so you can judge the new writing for yourself.
Political campaign & advertising signs not allowed on public highway rights of way, MnDOT says
With election season in full swing, the Minnesota Department of Transportation (MnDOT) is reminding campaigners that state law prohibits the placement of political signs, or any advertising on highway right-of-way.
‘I’m Not Allowed to Drive’: Billy Joel Shares Health Update as He Prepares to Sell Vintage Motorcycles
The singer was diagnosed with a brain disorder and stepped away from live performances last year
Photos: Fall Business Expo in Woodland Park
The Greater Woodland Park Chamber of Commerce‘s Fall Business Expo, held Oct. 21 at the Ute Pass Cultural Center, allowed local businesses to show off their services and wares to the community.
How 'DWTS' Dedication Night addressed Val Chmerkovskiy's suspension
For the first time in "Dancing with the Stars" history, a pro was not allowed to dance with their celebrity partner.
A CT business elicits giggling and sometimes screams. It’s all ages and nothing you’re ‘allowed to do at home’
“A lot of people say it’s like a rage room only artistic,” the COO said.
Falcons – Packers instant recap: Making the Lambeau leap
It started off bad, and after the first two weeks of the season, that led many of us to brace for the worst. Michael Penix Jr. threw an interception, the team allowed a quick scoring drive for the Packers, and trouble seemed to be on the horizon. Then the switch flipped, the Falcons discovered what […]
Nevada football versus San Jose State: Three keys to victory and a prediction
During Choate's Wolf Pack tenure, 20 has been the magic number. When Nevada has allowed 20 points in a game under Choate, it is just 2-22. That’s a result of a
Meet ‘platypus man’ Harry Burrell. He transformed Australian science – and put on quite a show
A self-described ‘platypoditudinarian’, Burrell figured out how to keep these animals in captivity – which allowed them to be studied.
Max Scherzer Gets A Win To Finish The Season
Reds 1 Blue Jays 5 If I were Max Scherzer, that’s how I’d want to end my career. He threw seven innings, allowed six hits, one earned run, one walk, and seven strikeouts (which would finish him with 3,557 strikeouts, three fewer than Justin Verlander). Max threw 114 pitches. That’s just amazing, especially on short […]
Stanford's Caroline Birkel Hasn't Allowed a Goal This Season
With Birkel back in net, the Cardinal have looked more like themselves
Supreme Court OKs Use of Social Security Data to Check Voter Rolls. What It Means for the Midterms
The Supreme Court on Friday allowed the Trump administration to move forward – for now – with a system that uses federal data to help states identify people on their voter rolls who may not be eligible to vote. The emergency ruling lifts restrictions imposed by a lower court on the administration's ...
How worried should Catholics be about the pope’s health?
Pope Leo XIV announced on Sunday that he will undergo surgery this week to remove a “nodule” from his lung. The pope made the announcement at the end of his Sunday Angelus address, asking for prayers. “Dear all, recently, during some checkups, the doctors discovered a nodule in my lung. It was detected at a very early stage and was well-localized,” Leo said. “The doctors felt it was necessary to intervene, and so, following their advice, I decided to have surgery to remove it. The procedure is already scheduled for the next few days. I thank you for your spiritual support and I entrust myself to your prayers.” The Vatican press office subsequently added that Leo is scheduled to undergo surgery at the Gamelli hospital on Tuesday, Oct. 13. The pope is expected to spend up to a week in the Gamelli recovering, after which, for the moment, he is still expected to undertake his largest and longest to-date Apostolic journey, heading to Argentina, Uruguay, and Peru, beginning Nov. 6. Prayers have, understandably, poured in from dioceses around the world, accompanied by the best wishes of heads of state and international institutions. So how worried should Catholics be for the health of the pope? The Vatican’s messaging around Leo’s pending surgery is, in many ways, a new approach to papal health issues. But, despite the pope’s personal candour, the Holy See’s messaging perhaps raises as many questions as it answers. Subscribe — Leo’s decision to announce his own medical status and pending hospital stay during the Sunday Angelus is, it should be said, already something of a big deal. Traditionally, the health of popes simply hasn’t been discussed publicly or officially, until circumstances made it absolutely necessary. Memorably, in 2023 Pope Francis was rushed to the Gemelli in an ambulance, exhibiting signs of cardiac arrest according to many close to him, only for the Sala Stampa to put out a statement insisting he was merely going in for “pre-scheduled” tests. That Pope Leo has decided to announce his condition himself, with remarkable frankness, is a significant comms policy shift around the Apostolic Palace. This might reflect a deliberately more open posture, as opposed to the traditional, otiose evasiveness, and the first fruits of an American pope and American prefect of the Dicastery for Communications favoring honesty as a baseline. Equally, it must be allowed, it could be that the pope’s situation is serious enough that there would be no keeping it under wraps or playing it off, and the decision was made to be as open as possible to head off speculation about the papal health. Certainly, Leo appeared to make every effort to sound reassuring — stressing that, whatever the diagnosis is, exactly, it is “well-localized” and “early stage.” Of course, for everyone listening, talk of a “nodule” in a lung will immediately send thoughts — and prayers — running to concerns about words not used, like “cancer,” “tumor,” “begnin” or “malignant.” To be clear, none of those words may yet be medically appropriate. And there is every reason to believe and assume that Leo is giving almost as much information as he may have himself at this stage. But the context of the pope’s announcement and the timing of his surgery do reasonably raise reasonably serious concerns for Leo. We don’t know, and this isn’t to say anyone has the right to expect to know, when the routine medical checks made this discovery. It could have been last week, last month, or even earlier. As such, it isn’t really possible to say with what kind of urgency Leo is being brought in for surgery. However, there is clearly some serious urgency to the matter. Leo making the announcement and going into hospital this week, of all weeks, means he is having to miss the balance and conclusion of his global meeting of the heads of the world’s bishops conferences, which he convened in Rome this week. That, as the Vatican has announced, has meant some serious changes to the schedule, with the newly minted dean of the College of Cardinals, Cardinal Tagle, subbing in for the closing Mass on Wednesday, and the meeting’s organizers announcing that the final working document/summary of the meeting being delayed until Leo can read and feed into it. Those changes suggest that the timing of Leo’s surgery isn’t of his own choosing, and he is acting on the best medical advice he can get by moving urgently. Had this issue been discovered weeks ago, it seems reasonable to assume the pope would have seen it dealt with before the meeting began. And were it possible to delay it, even by a few days to allow the meeting to conclude as scheduled, the expectation would surely be he’d have opted for that. It cannot be excluded that Leo is simply having to fit in with the schedules of his medical team, but a man who occupies arguably the most important and prominent role in Italy, if not Western Europe, could generally be assumed to be the one whose calendar others work around. All this points to a very recent medical discovery leading to a “days matter” diagnosis, or at least suspected possible diagnosis. Of course, another factor weighing in the balance is Leo’s upcoming apostolic visit to three South American countries, including a return to Peru, where he spent many years as a priest and bishop. It is entirely possible that the doctors, and the pope himself, are more concerned about the potential knock-on effects of surgery, and the time needed for recovery, for a 71-year-old — even one as physically sound and actively sporty as Leo. The pope is due to depart Rome November 6 for his 10-day three-country trip, returning on Nov. 17. It may be that Leo has simply made the decision to allow maximum time for his own post-op recovery, and even allow for potentially unforeseen circumstances, so that he is at full strength for the landmark trip. While it might be an inconvenience, and clearly a last-minute wrench in the works for the Amoris meeting, it is possible that Leo simply weighs the importance of that conference more lightly in the balance than even the possibility of missing his homecoming trip to Peru, or even having to scale back his itinerary for the trip. If that is the case, it would suggest a real abundance of caution by the pope approaching his Latin American tour, and a sobering indication of where Leo ranks the non-synodal meeting currently underway in Rome. In any event, what can be said for certain is that the pope having to take this, of all weeks, out of his schedule for surgery and an extended hospital stay is extremely unfortunate timing. It is clear that this is a decision Leo has made on the advice of his doctors. Together, they clearly consider that the risks of delaying, even by a little as a few days, represents an unacceptable risk for the pope. Even expecting and allowing for Leo’s full and speedy recovery, that should be a very sobering thought for Catholics everywhere. Subscribe
West Virginia business man I. L. “Ike” Morris passes away
Being a local business man and philanthropist allowed Morris to give back to Glenville State University and Gilmer County communities through active support and financial donations.
How Americans’ Financial Health Is Faring In The “K-Shaped” Economy
Hey all, Jason here. Money20/20 is still two weeks away, but I’ve already started packing (not procrastinating for once!). My calendar is already filling up with various sessions I want to catch, meetings, and of course happy hours, dinners, and other side events. If you’ll be in Vegas and want to catch up, let me know by replying to this email, and we can try to find a time amidst the chaos of the Venetian. A big if not totally unexpected piece of news dropped on Friday: the Independent Community Bankers of America, a trade group that represents smaller U.S. banks, filed a lawsuit against the OCC and Comptroller Jonathan Gould, arguing that the regulator’s move to grant trust bank charters to firms seeking to use them to conduct substantial non-fiduciary activities exceeds the authorities granted to the OCC by Congress. I haven’t had time to fully digest the legal filing or speak to folks in my network about it, but you can expect to see coverage and analysis on it in next week’s newsletter. Subscribe or Support by Upgrading The NerdCon agenda just dropped. It’s stacked. Partner content: Nubank built an AI-first bank. Chime built its own banking core. Figure and Valon are rebuilding the mortgage stack. At NerdCon, you’ll hear from the people behind those bets: what they chose, what they learned, and what they’re still figuring out. The agenda is live, with leaders from Nubank, Chime, OpenAI, Remitly, Mercury, Figure, Valon and more. Follow the mainstage conversations, bring the problem your team is wrestling with to a hands-on workshop, or pull up a chair at a roundtable. Pick your quests. Meet us in San Diego, November 18–20. Fintech Business Weekly readers save 20% with code FBW20. Explore the Agenda Things To Know & Other Good Reads Federal Reserve Board finalizes changes to enhance the transparency and public accountability of its stress test and reduce volatility in its stress test-related capital requirements (Federal Reserve Board of Governors) FDIC Announces Conclusion of Independent Monitorship (FDIC) Modernizing Financial Regulation: Initial Observations from eSLR (Fed Vice Chair for Supervision Michelle Bowman) The Data Version of Godzilla versus Kong: FRED Takes on AI (Fed Governor Christopher Waller) Financing the AI buildout (Brookings) Q3’26: Rules for Banks but Not for Crypto (Fintech Takes Banking) The Inevitability of Local Stablecoins (Lombard Notes) Delusions of AI Governance: The Human-in-the-Loop Comfort Blanket (Fintech Snark Tank) Stripe agrees to acquire Parafin to expand revenue opportunities for platforms and help small businesses grow (Stripe) Listen: Fighting Fraud in the Age of AI, with SEON’s Tamas Kadar (Fintech Business Weekly) How Americans’ Financial Health Is Faring In The “K-Shaped” Economy If there is one overarching theme across the economy and politics in the U.S. at the moment, it’s “affordability.” The term is vague enough to encompass a panoply of factors shaping Americans’ day-to-day lives: rising costs for the hallmarks of being “middle class,” including healthcare, housing, childcare, and education, inflation and rising interest rates, and a job market with the specter of AI hovering over it. At the same time, policy shifts under the Trump administration have resulted in reduced subsidies to those who get health insurance under the Affordable Care Act and new restrictions on qualifying for Medicaid and SNAP, the impacts of which have yet to be fully felt. These factors are contributing to declining consumer confidence and general dissatisfaction with the economy, despite continuing GDP growth and stock market records. This divergence is encapsulated in the idea of the “K-shaped” economy, in which a small proportion of Americans have seen their wealth balloon, while the majority of American households struggle to preserve the lifestyle they have. Perhaps the greatest determinant of which branch of the “K” a household is on is whether their wealth and income are primarily derived from employment vs. from assets. Nearly two decades of low interest rates and, more recently, elevated rates of inflation have benefited asset owners, while those whose income is primarily or solely derived from labor have largely seen real purchasing power stagnate or decline. This is reflected in recent Bureau of Labor Statistics data showing that labor share of U.S. GDP — the fraction of economic output that accrues to workers as compensation in exchange for their labor — dropped to just 52.8% in Q2 2026, the lowest since the BLS began keeping records. In 1947, approximately 2/3rds of economic output accrued to workers; even as recently as 2001, labor’s share of GDP was 64.1%. Against this backdrop, we’ve seen the rise of more credit and credit-like products: cash advance apps, “no-fee” overdraft, earned wage access, and buy now pay later, which are often used as small-dollar short-term borrowing mechanisms to meet immediate consumption needs or pay other bills (eg utilities, cell phone, other debt payments). With the markers of a middle class existence and, increasingly, basic financial stability seemingly out of reach for many, it should be no surprise there’s been an increase in “financial nihilism,” something industry peers like Alex Johnson and Frank Rotman have discussed and analyzed the roots of. The explosion of gambling and gambling-adjacent products and services — often marketed under the guise of being an “investment” — is inextricably intertwined with the rise of financial nihilism. Crypto, sports betting, and, more recently, prediction markets offer an escape or even hope of sorts, like a contemporary, digital version of a scratch-off lottery ticket, while leaving the overwhelming number of people who use such products worse off. Share of Households That Are Financially “Vulnerable” Ticks Up The Financial Health Network’s 2026 Financial Health Pulse® report adds context on how American households are faring. (I linked to this report in last week’s newsletter, but wanted to take time to further unpack the data in the report this week.) The Financial Health Network publishes the report annually, providing insight into how Americans’ financial circumstances are changing over time. The 2026 report is derived from a survey fielded in April and May 2026. The report leverages survey responses to assess indicators of financial health across spending, saving, borrowing, and planning/protecting and to determine a zero to 100 “FinHealth” score. Those with scores between 0 and 39 are considered “Financially Vulnerable,” consumers with scores ranging between 40 and 79 are defined as “Financially Coping,” and those with scores of 80 to 100 are “Financially Healthy.” The report found that moderate improvements in 2025 were reversed, with the share of respondents considered financially “vulnerable” rebounding to 17%. The longitudinal data reflect the impact of pandemic-era programs, like expanded unemployment, cash stimulus payments, and pauses of federal student loan payments. The positive impacts of those programs, as reflected in the Financial Health Pulse reports, had largely disappeared by 2023. While pandemic-era inflation — to be fair, in part caused by the various support and stimulus measures — had come down from as high as 9% in 2022, it has rebounded since the start of Trump’s second term, with tariffs and energy market disruptions owing to the war in Iran pushing prices back up. Specific indicators in the survey that deteriorated from 2025 to 2026 include the share of respondents spending less than their income over the past 12 months, the share paying all bills on time over the past 12 months, the share that have a manageable amount or no debt, the share that are “moderately” or “very” confident their insurance is adequate to cover them in an emergency, and the share that “somewhat” or “strongly” agree that their household plans ahead financially. Unsurprisingly, lower- and moderate-income households are more likely to struggle to pay their bills on time and have any funds leftover to save. The share of low-income households whose income exceeded their spending dropped from 35% in 2025 to 31% in 2026, while the share of upper-income households whose income exceeded expenses remained unchanged at 63%. Households with student loans or revolving credit card debt reported having “a bit more” or “far more” debt than was manageable at rates far higher than those not carrying these types of debts. The share of those with student loan debt indicating their debt load was too high to manage increased from 50% in 2025 to 55% in 2026, while the share of those with revolving credit card debt saying the same ticked up from 51% in 2025 to 54% in 2026. Households that had student loans were markedly more likely to be financially “coping” or “vulnerable” vs. those without student loans. In 2026, 27% of households with student loans were considered financially vulnerable, a jump of 6% points vs. 2025. Households without student loans saw just a 1% point increase (not statistically significant) in those considered financially vulnerable. Households’ perception of the affordability of categories of goods and services paints a stark picture, with less than one-fourth considering higher education affordable, about a third deeming childcare affordable, and less than half viewing healthcare as affordable. Fintech Business Weekly is made possible by the generous support of paying subscribers — bringing you independent analysis of banking, fintech, and crypto without fear or favor. You can support my work by becoming a paying subscriber if you aren’t already. Paying subscribers enjoy: access to the entire archive of nearly six years of newsletters extended versions of the weekly newsletter, with additional content and analysis and (for founding member tier) quarterly personal 1:1 fintech Q&A / strategy calls with me, tapping into my unparalleled knowledge of the intersection of banking and fintech and experience working in the sector, including helping to launch Goldman Sachs’ retail bank Marcus Support Fintech Business Weekly You can also support Fintech Business Weekly by sponsoring a newsletter or podcast, putting you in front of 93,000+ of the most influential decision makers in banking, fintech, and crypto. Learn more about sponsor opportunities or request a media kit by dropping me an email. Democratic Senate Report Highlights How Iran Uses Tether to Evade U.S. Sanctions Iran uses stablecoins, specifically Tether, to evade sanctions, fund regional proxies, and to purchase military drones, a report released last week by the Senate Permanent Subcommittee on Investigations says. The report was authored by committee ranking member Senator Richard Blumenthal (D-CT) and the minority staff. Crypto and stablecoin proponents will often push back on criticism that criminals make use of these assets by arguing that, on an absolute dollar basis, far more illicit funds flow through traditional banking systems and payment rails than via crypto and stablecoins. And while that is likely true, it elides the reality presented in news story after news story: whether state actors — Russia, Iran, North Korea — or criminal groups, those looking to engage in illicit transactions increasingly favor stablecoins and, specifically, Tether (USDT). The report from the Senate Permanent Subcommittee on Investigations released last week adds context to how Iran uses Tether has a lynchpin in its shadow banking system. The report analyzed 846 wallets that have been sanctioned or targeted for seizure, finding that 84% of them transacted exclusively or primarily in Tether. The ability to create near limitless, anonymous wallets and to move funds effectively instantaneously and irreversibly have made crypto a favored financial mechanism for bad actors. Stablecoins solved key drawbacks of bitcoin, namely, the original cryptocurrency’s highly volatile value in dollars. And while Tether (the company) has the technical ability to “freeze” or destroy funds, the company is often limited and reactive in its approach to doing so, the Senate report argues. Tether, which is nominally based in crypto-friendly El Salvador, “has stated that its compliance with OFAC sanctions is ‘voluntary’ and that it follows ‘OFAC guidelines,’” the Senate report says. Owing to these favorable attributes, Tether “became a primary cryptocurrency for Iran, Hamas, Hizballah, and the Houthis beginning in 2023 and has expanded in scale since,” according to the report. Tether’s role in Iran’s shadow banking system, the report says, is enhanced by crypto exchanges like Bybit, Kyrrex, OKX, Gate, and Binance, and through “over the counter” exchanges and hawala networks. The consequences of these financial flows aren’t hypothetical. The Senate report links Tether as a funds transfer mechanism to Iranian proxies in the region, including Hizballah, the Houthis, and Hamas. Tether has also been used to make payments to secure components necessary to manufacture drones, the report says. The report concludes by arguing that “[s]tablecoin issuers with a significant nexus to the United States, particularly those that offer dollar-denominated stablecoins, should be subject to American sanctions law rather than being allowed to hide behind foreign jurisdictions.” Stablecoin issuers like Tether must be held accountable for repeated failures to prevent illicit finance and sanctions violations by law enforcement, the Department of Justice, the Securities and Exchange Commission, and OFAC, the report argues. [Paying Subscriber Exclusive] OUSD Goes Live, Make Your Own Neobank, U.S. Sanctions Russia’s A7 Network As “Transnational Criminal Organization” OpenUSD, the stablecoin issued by the Open Standard consortium that includes Stripe, Visa, Mastercard, core providers, crypto firms, and numerous banks, went live last week. Social commerce platform Whop raised eyebrows in fintech by offering creators on its platform the ability to launch their own neobanks, which the company describes as “great businesses that are easy to run,” in just 15 minutes. And OFAC and FinCEN target Russia’s “shadow banking” A7 Network — more on these stories after the paywall.
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Quick hitters: O-line health, safety depth and Dan Campbell’s first days in Detroit with Glenn
Allen Park — Detroit Lions coach Dan Campbell and quarterbacks coach Mark Brunell met with the media on Friday. Here are the noteworthy items from those conversations. Healthier up front, banged up in the back It’s good news, bad news on the injury front. First, the offensive line is going to be far closer to full strength with starters Blake Miller (knee) and Christian Mahogany (hip) on track to return to the lineup. That provides stability the offense lacked against Buffalo, particularly at right tackle, where backup Larry Borom allowed 11 quarterback pressures and committed a trio of penalties. Subscribe However, with that same unit, veteran Ben Bartch (foot) is likely to miss Sunday’s matchup with the Jets. The left guard competition that’s been ongoing since May has effectively been whichever option is healthy that week. In the back end, safety Thomas Harper (ankle) is also unlikely to be available on Sunday. That leaves the team precariously thin at the position following Avonte Maddox going on injured reserve this week. Christian Izien is expected to get the start alongside Chuck Clark. “Izzy's been working a lot back there and had a full week,” Campbell said. “And he's gotten a ton of work this week, a ton of reps, full-speed reps. ‘This is what you're going to do, this is the calls’ and just dousing him with full-speed reps and he's done a good job this week.” Safety depth is the bigger concern. The team is expected to count on some combination of Jalen Mills, who signed to the practice squad on Monday, Bishop Fitzgerald, the undrafted rookie poached off the Steelers’ practice squad on Tuesday, and rookie cornerback Keith Abney, who doesn’t have experience at safety. “I'll say this about Abney, man, for a rookie, he's a pretty dang smart, conscientious, aware football player that's got a ton of room to really take off,” Campbell said. “…He's young. He's another one, he just needs reps and reps. But, if we need it, that'll be a guy who may have to go in for us.” You can check here for the full injury report, with game designations, later this afternoon. Reflecting on the past Responding to comments made by Jets coach Aaron Glenn this week, Campbell reflected on his earliest days with the Lions, before the coaching staff had been fleshed out and it was just he and Glenn at the facility working through what they wanted things to look like. “It was just he and I in the lab,” Campbell said. The coach said the two would fill the whiteboard that remains in current coordinator Kelvin Sheppard’s office top to bottom with notes about philosophy, coaching style, team identity and the type of players they wanted to target. “He looks different than me,” Campbell said. “I'm taller, I'm whatever. He's quicker. All these different things, man, but we're really the same. I mean we're so much the same. And he's the defensive version, I'm the offensive version. He was my right hand man. …It was fun, man. Those were good days.” Campbell said it was one of the best and worst days of his life when the Jets hired Glenn to be their coach. “AG means the world to me,” Campbell said. “He's one of my dearest friends because I know what he's made of. “…It's because you know you're losing a little piece of you. That's what he meant to me and to us. So, that's hard.” Traits under center A couple of weeks back, Sheppard noted that Brunell had identified Saints quarterback Tyler Shough as the best prospect at the position ahead of the 2025 draft. On Friday, Brunell confirmed his evaluation and explained what he looks for when studying a young quarterback. Here’s the full answer: “Young quarterbacks, you have to look at everything, you know? I look at guys coming out of college just like I look at any free agents that we might be looking at, or guys that we might add to our roster. Do they take care of the ball? Are they on time? How is their decision-making? How are their feet? “It's tough because you look at a college player, you don't understand what they're trying to do offensively, what their reads are, but you can identify when a guy is accurate, obviously, and when the ball's getting there on time. If there are a lot of interceptions, it raises a red flag. And I think with a lot of the spread offenses of what you're seeing, when you see a young player and they're running some pro concepts and he's having to make protection calls, and he's getting the right play out of the run game, and when there's a lot on his plate and he's executing it very well, and he's managing all of that, that really jumps out at you. It’s really hard to find. “That's one thing we saw with Luke Altmeyer. He had a lot of experience. We call it, ‘Hey, he's playing quarterback.’ And what does that mean? It's not just completing passes. It's getting guys lined up, getting the right play, getting the protection call right, just fixing some problems, being able to progress (through reads). And there's still some young guys out there that can do that at a high level, which is good to see.” Regarding Altmyer, who competed for the team’s backup job through the offseason and currently resides on the practice squad, Brunell acknowledged physical development slows once the season starts, because there aren’t reps to go around. However, there’s still extensive mental development that’s ongoing. “The key for him is approach the game as if you're the starter, mentally,” Brunell said. “And that's really all you can do. Approach the game as if you're the starter and be good in the (class)room. You come in alongside Jared (Goff), and you come in alongside Josh (Dobbs) and (do) whatever they need. And if you get an opportunity to talk to Luke, he'll tell you he does have a lot of responsibilities besides just getting donuts for us on Saturday. “For him, it's mentally staying focused, and even though there's really no chance this Sunday of him playing, he has to approach it as if he's taking the first snap and playing the whole game. So what's our game plan? What are our checks? What are we anticipating? And then during the game, we keep him involved as far as looking at coverages and pressures. And so, really, for him, it's just a mental game. And for now, that's all we can do.” Reason for more zone The Lions have significantly increased their usage of zone coverage on defense this season. I asked Campbell if that was a reaction to their personnel or driven by the focus to generate more turnovers, given it can be easier to produce interceptions when you can keep eyes on the quarterback while playing zone. “I think it was a little bit of both,” Campbell said. “We just felt like this would suit us a little bit better up to this point, and then be disruptive and get takeaways, which worked well Week 1. We had two (opportunities) last week against Buffalo we weren’t able to get, but they’re there.” I followed up by asking how much the combination of heavy blitzing with the back end playing zone has contributed to some of the early-season coverage woes, since adding extra players to the pass rush means leaving the coverage short-staffed. “I mean, it’s challenging, and that’s why a lot of the things we’ve done in zone, for the most part, have been to reduce that stress level back there,” Campbell said. “But that also requires the front getting there. And if you don’t get there, we already kind of talked about that, but there (has to be) a trust there.” The alternative, Campbell explained is sending four and it taking longer for the rush to get home, which can create different problems for a defense. “You can bleed yards,” Campbell said about the strategy. “It gets a little longer and it’s dink-and-dunk and run after catch. …So, we do what we think is right by what we feel like our personnel (does well). But also the game plan, who you’re going in to play, the matchups, their offense. “We’re not stuck on one way.” Detroit Football Network is a reader-supported publication. To receive new posts and support my work, consider becoming a free or paid subscriber. Subscribe
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Intel Panther Lake Teardown, 18A, BSPD, GAAFET, SemiAnalysis STEEL
Panther Lake debuts the first commercial implementation of backside power delivery (BSPDN), introduces Intel’s first iteration of gate-all-around (GAA) transistors, and showcases their advanced packaging capabilities with its Foveros-S assembly. With Panther Lake, Intel’s manufacturing arc has shifted from nebulous roadmaps to shipped silicon, a significant milestone on their long road back to competitive semiconductor manufacturing. To evaluate the extent of Intel’s comeback, we tore down Panther Lake. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Our teardown traces 18A from its four-sheet RibbonFETs (Intel’s marketing name for GAAFETs) and gate stacks through contacts, frontside and backside wiring, and the bonded carrier. We explain how these material and integration choices improve gate control and reduce resistance, while adding capacitance, thermal resistance, and process complexity. Our measurements put Panther Lake’s 18A compute logic and TSMC N3E GPU logic at similar logic density. However, 18A does not lead TSMC N3P, N2 or Samsung SF2 in peak density. Panther Lake’s CPU cores are incremental updates, and the high-end GPU still uses TSMC N3E. Panther Lake assembles one compute tile, one GPU tile, and one I/O tile atop a passive base tile using Intel’s Foveros-S advanced packaging. Both compute tile variants use Intel 18A. The Xe3 GPU options are a 4-core GT1 tile on Intel 3 and a larger 12-core GT2 tile on TSMC N3E. Both I/O tile variants use TSMC N6. [1], [2] Our analysis centers on the PTL-U compute tile, both the 4-core and 12-core GPU tiles, as well as the 12-lane I/O tile. In conventional chips, power and signal are routed through the same frontside metal stack towards the device frontend. Power rails consume scarce routing resources near the transistors, while tall via stacks carry VDD and VSS from the coarse upper wires to local rails. Backside power delivery (BSPD) moves the main power network behind the transistor layer, to the backside, separating it from frontside signal routing. We covered BSPD and its impacts in 2024. [3], [4], [5] Intel’s BSPD implementation, branded as “PowerVia”, routes power through dedicated backside metals to nano-TSVs, which connect those rails to local source/drain (S/D) contacts. Implementing that separation requires Intel to build the interconnect stacks from both sides of the wafer. The frontside comprises the M0-M14 signal stack, while the backside comprises the BM0-BM5 power stack. M0 and BM0 are closest to the transistors. The nano-TSVs connect the two sides, but Intel patterns and etches each via from the front after forming the contacts. A narrow via runs from the side of the contact deep into the silicon substrate. Intel then completes the frontside signal metal stack, bonds the wafer to a carrier, flips it and removes the original substrate until the buried via tips are exposed. The backside metal stack is then deposited directly on the revealed vias. The nano-TSV and backside-via profiles taper in opposite directions because Intel forms them from opposite sides of the wafer. The transistor structures form the FEOL. Local contacts and nano-TSVs connect them to the wiring. M0 begins the frontside interconnect stack. The silicon carrier remains attached above the frontside interconnects. It supports the device wafer during substrate removal and backside processing and remains part of the finished chip’s thermal path. PowerVia removes the main power distribution from the congested frontside metals, routing supply through shorter and wider backside wires. Its lateral landing still occupies area in the standard cell, so it recovers less cell area than a direct backside contact. [3] Nano-TSVs beside the logic devices carry VDD or VSS from the backside power network, while signal connections continue upward through the frontside metals. Backside Interconnects Samsung SF2 data is included for comparison to Panther Lake’s within this article. SF2 is the incumbent GAA foundry node but lacks BSPD, serving as a useful reference to evaluate 18A. A full teardown of Samsung’s S26 products, processed on SF2, will be shared soon.Nanosheet-cut EDS comparison. The PowerVia supply path runs from the backside Cu rails through Mo-lined W nano-TSVs to the local transistor contacts. In this cross section, the tapered connection spans roughly 150 nm from the contact level to BM0. The Ta liner confines Cu and promotes adhesion to the surrounding stack; the AlOₓ etch stop controls the next dielectric etch above the rail. Dielectric beneath the ribbons electrically separates the devices from the backside wiring and removes the conducting silicon body below the channel. [6] AlOₓ serves as an etchstop (ES), enabling endpointing and protecting the underlying layers. Low-volatility aluminum fluoride reaction products resist the fluorinated plasma, allowing a thin AlOₓ film to protect the metal while the surrounding low-k dielectric is removed. [6], [7]. While the BM0 and layers above the M1 lines show double AlOx layers, Our SMIC N+3 teardown showed single AlOₓ layers. SMIC uses a simpler local AlOₓ substack, while the remaining cap and etch sequence provide the required landing protection. So why double layers? The closely spaced AlOₓ doublets provide two protected endpoints in the etch sequence. Intel documents an AlOₓ/SiN/AlOₓ stack that explains the benefit. The main dielectric plasma etch stops on the first AlOₓ film; a selective wet clear opens that film; a second plasma etch removes the intermediate SiN and stops on the second AlOₓ film. The final wet clear exposes the metal landing surface. SiN is the intermediate dielectric in Intel’s published example. [8] The second stop protects the metal through a cap breakthrough. Wide openings can etch faster than narrow ones, and etch depth varies across the wafer. Metal under an early-clearing opening would otherwise be exposed while other openings still need more etching. Staged protection widens the process window and reduces metal erosion, corrosion and void formation. [8] TSMC documents AlN/AlOₓ/SiOC/AlOₓ above Cu, with AlN blocking Cu diffusion, and a simpler AlN/SiOC/AlOₓ variant that omits one AlOx film. [9] Levels with different opening sizes, aspect ratios, pattern densities and cap materials need different etch margins. A double AlOx stop is useful where another protected endpoint justifies the added processing. The extra film adds formation, selective opening and cleaning steps, plus another set of interfaces to control adhesion, moisture, and stress. These blanket films are opened through the existing via pattern, so each film does not require another lithography mask. AlOₓ adds parasitic capacitance when it replaces lower-k dielectric; two thin AlOₓ films can nevertheless contain less AlOₓ than one thick film. Total thickness, placement, and theintermediate dielectric determine the electrical cost. Deposition chemistry also changes AlOx permittivity and residual hydroxyl content, which can oxidize the underlying metal. [7], [8], [10], [11] The backside stack separates into relatively fine BM0-BM2 wiring near the devices and coarser BM3-BM5 power distribution. The largest pitch increase occurs between BM2 and BM3. BM0’s pitch closely matches the logic-row height, fitting local power delivery to the cell rows. Higher levels aggregate current through larger conductors: routing density becomes less important than low resistance and current capacity as the network approaches the package. This hierarchy provides wide power wiring for the power delivery network without consuming scarce frontside signal-routing resources. [3] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Frontside Interconnects Intel 18A combines Mo-lined W contacts and nano-TSVs with a separate backside Cu power network. Samsung SF2 keeps power on the frontside, using Ti-based contact interfaces and Ta-based barriers and Co liners around Cu wiring. In 18A standard-cell rows, backside power rails supply the devices through nano-TSVs within the cells, freeing frontside routing resources. Samsung’s M0 accommodates both power and signal connections. From the device toward M0, the connection runs through a Ti-based S/D interface, W contact fill, a Mo-lined W via, and the Cu M0 wire. Mo supplies a conductive nucleation and adhesion layer for W, replacing the resistive TiN liner used in conventional W integration. This increases the effective conduction volume within the feature while retaining W fill and its established polishing, cleaning and etching processes. Intel’s Mo/W patent describes this integration tradeoff. The nano-TSV uses the same Mo-lined W construction in the backside supply path. [12] The move from TiN to Mo is an incremental change. While a full Co or Mo fill can also reduce the volume lost to liners in very small features, it requires new integration schemes that increase complexity and risk. Cu remains attractive for wider wires due to its low resistance. As wires and vias shrink, the diffusion barrier consumes an increasing fraction of their cross-section. [12], [12], [14] Intel uses Co/Ru liners at M0-M1, Co at M2-M4, and Nb at M5-M9. The lower-level liners help Cu adhere and reduce void formation during trench fills. Applied Materials’ Endura has new thermal control that facilitate wetting process, so the thin film continuity is good enough that good capillary pressure will drive Cu atoms to the via bottom without voiding. Intel’s choice to use Nb is particularly interesting. Intel’s Nb patent describes a conductive diffusion barrier intended to reduce the barrier’s contribution to resistance relative to conventional Ta-based barriers, particularly at via bottoms where all current crosses the barrier. The patent pairs Nb in coarser levels with the option of lower-cost PVD processing. [15], [16] The upper metal layers support thicker barriers formed through physical vapor deposition (PVD) despite its worse coverage and uniformity. Meanwhile, the lower metal layers require thinner barriers deposited through conformal atomic layer deposition (ALD). Co/Ru adds another material interface and requires controlled deposition and Cu fill. Changing liners and barriers by metal layer allows Intel to optimize interconnect resistance, process complexity, and reliability. [15, 16] RibbonFET, Intel’s name for its gate-all-around FETs (GAAFETs), replaces the FinFET’s vertical fins with four stacked horizontal silicon nanosheets, allowing the gate to surround the channel on every side. The path to GAAFET begins with the planar transistor. A planar MOSFET places the gate above the channel between its source and drain. Pairing an NMOS with a PMOS transistor creates a CMOS inverter, in which the NMOS pulls the output low for a high input, and the PMOS pulls it high for a low input. The gate must retain electrostatic control of the channel to ensure clean switching. As gate lengths shrank, the drain began to compete with the gate for that control, increasing off-state leakage. Electrostatic control was restored through an architectural evolution that raised the channel into a vertical fin and wrapping the gate around three sides. Called “FinFET”, this new architecture packed more effective channel width into a smaller footprint. Further scaling made it harder to maintain both drive current and leakage within smaller cells, and reintroduced the same problems planar MOSFETs faced. Nanosheet GAAFETs close the fourth side by replacing the vertical fin with a stack of horizontal nanosheets, each surrounded by the gate. The tighter electrostatic control suppresses leakage at shorter gate lengths while stacking adds effective channel width within the cell footprint. In a FinFET process, channel width changes in discrete steps as designers must add or remove whole fins. Nanosheet width can instead be adjusted continuously within the process’s design rules. Wider sheets increase drive current, while narrower sheets reduce capacitance at the cost of drive current. Intel 18A uses stacks of four nanosheets each and varies their widths across logic and SRAM. At the process level, adding more sheets to each stack increases effective channel width and drive current, but complicates fabrication. RibbonFET vs MBCFET Samsung began GAAFET production in 2022 with SF3E, following with SF3 and now SF2. Its ‘MBCFET’ provides a useful structural comparison with Intel’s first RibbonFET implementation. [17] STEEL is digging deeper into SF2, used in the Exynos 2600, and TSMC’s GAAFET N2, used in Apple’s A20 Pro, in upcoming newsletter articles. We’re throwing some teasers on X. Let’s compare Samsung SF2’s MBCFET with Intel 18A’s RibbonFET. Subscribe Even to the untrained eye, Intel’s extra nanosheet is obvious. Intel stacks four ribbons to Samsung’s three. Samsung’s sheets are much wider in these fields, so both sheet count and width matter to the available channel perimeter. Sheet width also changes which silicon surfaces carry current. On conventional (001) silicon, wide nanosheets emphasize the broad top and bottom surfaces, favoring electron transport; the larger sidewall contribution in a narrow sheet favors hole transport. Thinner sheets improve gate control but increase confinement and scattering. This makes width and thickness part of the NMOS/PMOS balance, alongside strain and threshold voltage. [18], [19] GAAFET designs like 18A use different work-function-metal (WFM) stacks for NMOS and PMOS. Around each ribbon, a thin SiOx interfacial layer separates the silicon channel from the HfOx high-k dielectric, with La providing dipole tuning and the WFM wrapping the dielectric. NMOS uses a TiAl-based stack, while PMOS uses TiN WFM. W fills the remaining gate trench, providing a lower-resistivity path where the work-function layers are no longer needed. In this field, the PMOS stacks leave room for W between ribbons, while the NMOS stacks occupy more of those gaps. A silicon-based dielectric marks the P/N boundary, allowing the PMOS and NMOS gates, sharing the same gate trench, to be processed sequentially. Fast logic paths, retention circuits, and SRAM need a family of threshold options. Changing threshold without substantially changing device dimensions, capacitance or fabrication complexity is valuable. FinFET processes typically use different work-function-metal stacks. In a four-ribbon GAA stack, the narrow sheet-to-sheet gap limits how much WFM can fit around each channel. La in the gate dielectric creates interfacial dipoles at the SiOx/HfOx boundary, shifting effective work function and tuning threshold voltage. This gives Intel another control alongside its NMOS and PMOS WFM stacks. Low-threshold devices improve critical-path drive; higher thresholds reduce leakage elsewhere. Dipole tuning is especially useful in GAA because it changes threshold without consuming the narrow intersheet gap with thicker WFM. Precise control of La incorporation, diffusion and interface quality has long been a challenge, limiting viability in high volume production but is now seen from every leading-edge foundry. Intel’s patent describes depositing a dipole-forming oxide above HfOx and annealing it toward the interfacial oxide before completing the work-function and fill metals. This separates threshold tuning from the space available for metal. Newer research addresses the thermal cost: imec’s 2026 dipole-middle research inserts the shifter between two HfOx depositions, shortening the diffusion path while protecting SiOx during patterning. [20], [21]Matched-cut EDS, Intel 18A (left) vs. Samsung SF2 (right). Intel retains raised source/drain epi beneath its contacts, while Samsung recesses W deep into the epi to form a V-shaped Ti-lined interface. The deeper contact increases metal-to-semiconductor area and shortens the current path from the lower sheets, reducing contact and spreading resistance. It also removes epi volume and brings the contact etch closer to the channel ends. Retaining more epi preserves the material available for strain transfer, especially from SiGe into PMOS. These geometries balance contact access against stress engineering and etch margin. [22], [23] Samsung stacks three sheets to Intel’s four ribbons, and both processes use sheet width to tune drive strength. In our Samsung cross-sections, widths range roughly from 19 to 30 nm in the NPU rows and 37 to 50 nm in the CU cell. The Samsung nanosheets taper, with the widest sheet at the bottom and the narrowest at the top. Both processes use HfOx gate dielectric and Ti-based work-function stacks, with Al in the NMOS stack. In the Samsung devices shown here, the dielectric and WFM occupy the intersheet gaps, leaving W above the top sheet. Intel’s PMOS stack leaves more room between ribbons, and W fills those gaps while the thicker NMOS stack leaves W mainly in the upper trench. Gate-stack EDS maps. The W between Intel’s PMOS ribbons provides a conductive path close to the lower gates. Where WFM fills the entire gap, the gate still surrounds the channel, but voltage reaches it through the more resistive work-function films. Thinner WFM and dipole tuning preserve room for low-resistivity fill; Mo and Ru are alternative fill metals being developed for further scaling. [24] A masked, sequential WFM flow explains the different gate heights and inter-nanosheet fill. The proposed sequence below shows how separate NMOS and PMOS work-function steps produce that geometry. Enabled by the BSPDN process, Intel replaces the dense-logic silicon subfin with dielectric, removing the parasitic conduction path below the ribbons and reducing substrate-related capacitance. A retained silicon body as in classical, non-SOI, planar and FinFET designs needs junction and punchthrough-stop engineering to suppress leakage. Dielectric isolation makes that leakage less sensitive to the subfin doping profile but adds removal and fill steps. It also weakens the direct thermal path through silicon, making the contacts, metal stacks and package more important for heat extraction. [24], [26] Fluorine is concentrated around selected Intel device structures in the maps. WF6 is a standard precursor for W nucleation and fill, while barrier films protect adjacent dielectrics from fluorine attack. Low-fluorine W processes reduce the residual-F burden. Chloride-based precursors avoid introducing F during W deposition, but require control of chlorine attack, nucleation and fill quality. The integration target is a continuous, low-resistance W path with a thin protective liner and minimal chemical damage to the surrounding stack. [20], [27], [28] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. We measured cell height, gate pitch, metal geometry, and ribbon dimensions at the XTEM sites shown below. The tables group these dimensions by site and device polarity. Our “sheet cuts” cross the silicon channel and show the ribbons end-on. “gate cuts” run along the channel through successive gates. The 18A logic cell dimensions point to a five-track logic library while the N3E and Intel 3 cell dimensions evidence a seven-track logic library. The DDR-PHY uses wider M0 wires and much larger spacing than core logic. That trades routing density for lower wire resistance and weaker coupling between neighboring nets. The geometry suits the current delivery and coupling requirements of analog, clock, and I/O circuitry. PowerVia lets 18A combine a compact cell height with wider M0 geometry by moving the main power rails off the signal-routing tracks. That relaxes local wire scaling while preserving a small cell footprint. Cell height and gate pitch set the geometric density; pin access and routability determine how much of it a real block can use. [29] The biggest takeaway from our gate-pitch measurements is that Intel 18A compute logic and TSMC N3E GPU logic have similar density in the Bohr representative-cell model. The 18A example is 18.6% denser than the Intel 3 GPU example. Gate pitches are nearly identical across the three sites, so cell height drives most of the difference. The Bohr model combines a four-transistor NAND2 spanning three gate pitches and a 32-transistor scan flip-flop (SFF) spanning nineteen pitches, weighting their densities 60:40. The sensitivity column shows how independently changing cell height and gate pitch by ±1 nm changes the result. This compares representative cell geometries; whole-die density also depends on cell mix and placement. The 18A P-core gives M0 substantially more metal cross section than the N3E vector engine. Treating each profile as a trapezoid gives 2.63 times the area per line and 1.84 times the area after normalization by routing pitch. The larger section reduces the geometric contribution to line resistance and lowers current density for a given current. Taller and wider wires also add capacitance, so circuit delay depends on the balance of resistance and capacitance. The DDR-PHY has less metal area per routing width than the 18A core fields, while remaining above N3E. [30] Area = height × (top CD + bottom CD) / 2, including liners. Area/pitch normalizes by routing width. Taper is the symmetric sidewall angle from vertical, with the largest angle belonging to the DDR-PHY. Compute tile The measurements show how ribbon dimensions and gate-stack geometry vary across the compute tile and between NMOS and PMOS to balance channel drive, gate load and the space needed for the dielectric/WFM stack across logic, SRAM and the DDR-PHY. Width mainly changes available channel perimeter; thickness also changes electrostatic control and carrier confinement. Gate-stack thickness then determines the space left for low-resistivity fill P-core and LP E-core logic Both the P-core and LP E-core use multiple nanosheet widths. Widths are measured on high-magnification XTEMs while wider-field images demonstrate additional width choices within the LP E-core. Multiple widths are expected even within an LP E-core. Timing-critical paths, buffers and cells with different fanout need different drive strengths. The lower-magnification fields show this width diversity beyond the sites quantified in the table. L2 and L3 SRAM GAA gives SRAM designers another way to balance the pull-up (PU), pass-gate (PG), and pull-down (PD) transistors. FinFET bitcells set device strength through fin count while GAA adds nanosheet width as a sizing knob. In a 6T SRAM cell, a strong pull-down relative to the pass-gate limits read disturbance, while a strong pass-gate relative to the pull-up improves writability. During a write, the pass-gate and write driver pull the node storing “1” below the inverter trip point. During a read, the pull-down holds the node storing “0” low. Bias, threshold voltage, mismatch and assist circuitry set the remaining margin. FinFET high-current cells commonly use a PU:PG:PD fin-count pattern of 1:2:2, a device-sizing ratio rather than a current ratio. Ribbon width lets Intel balance SRAM strengths without adding whole fins. The L2 cell uses its narrowest ribbons for PU and widest for PD, improving writability and read stability respectively. Intel’s disclosed HCC operates without assist; its denser HDC uses negative-bitline write assist. Pulling the selected bitline briefly below ground increases pass-gate overdrive so it can overpower the pull-up at lower supply voltage. That buys density and low voltage writability at the cost of boosting circuitry, switching energy, and additional voltage stress that must be controlled. [31], [32] Four rectangular ribbons give the perimeter = 8 × (width + thickness), before corner rounding. PG/PU is 1.49 and PD/PG is 1.16. The L3 structures closely resemble L2 in layout and cell height. Fewer L3 nanosheet widths are tabulated because fewer high-magnification images were available. DDR PHY The DDR-PHY trades density for controlled analog behavior and reliable off-chip signaling. It contains drivers, receivers, delay circuits, and calibration logic that set drive strength, sampling time, and voltage margin. Repeated four-sheet devices with similar widths fit the use of regular transistor units for matching and programmable drive. Its wider local wiring provides room for current delivery and separation of sensitive signals, while consuming more area than a dense core-logic grid. The layout serves the memory channel’s electrical requirements as well as digital logic density. [33] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Intel 3 GPU devices Vector engine logic Intel 3’s XVE logic uses two-fin PMOS and NMOS devices with power rails in M0. Its cell height and M0 pitch give a seven-track geometry, two tracks more than the 18A logic. One-fin groups also appear among the two-fin devices. Intel 3 L2 SRAM The Intel 3 L2 SRAM uses the familiar HCC sizing pattern: one PU fin, two PG fins, and two PD fins. N3E GPU devices Vector engine logic The N3E XVE field contains repeated two-fin devices with seven-track cell geometry. N3E remains a FinFET process, giving Panther Lake a direct FinFET-to-RibbonFET comparison. N3E L2 SRAM The N3E L2 SRAM uses the same PU:PG:PD fin-count pattern of 1:2:2. Panther Lake-U follows Lunar Lake’s floorplan quite closely. Both pair 4 P-cores with 4 LP E-cores and NPU, media and display engines in similar locations. Lunar Lake also uses Xe2, the direct predecessor to Panther Lake’s Xe3 GPU. This makes Lunar Lake the most direct basis for our comparisons. Arrow Lake differs in core count and uses the older Xe-LPG GPU architecture, so we only use it where it offers a more direct component-level comparison. Compute tile Panther Lake compute-tile floorplans remain sparse even months after launch. Intel 18A’s backside metal and dielectric stack must be removed without damaging the underlying structures before a clean transistor-level floorplan can be imaged. Most published die shots hide or heavily process the background, but we are quite proud of the die shot we achieved and are excited to show the work we have done. We measured the areas of the key components on the compute tile and compared them with their Lunar Lake predecessors on TSMC N3B. These help us to capture changes in block area and compare the two chips across process nodes and designs. Our total tile areas exclude the scribe-line area. The compute-plus-GPU subtotal below uses the PTL-U compute tile and GT1 GPU; it excludes the I/O tile and passive base. Individual block areas use the boundaries marked on the floorplans The compute-plus-GPU row is recomputed from the displayed PTL-U and GT1 areas. Component rows use their stated per-region counts and are not an additive partition of the whole tile. The P-core area remains almost unchanged between Lunar Lake and Panther Lake, despite L2 capacity increasing from 2.5 MiB to 3 MiB. Arrow Lake uses the same Lion Cove core as Lunar Lake but also has a 3 MiB L2. Cougar Cove fits 20% more L2 into the same P-core area. The larger private cache keeps more of each core’s working set close to its execution units, reducing access to shared L3 and DRAM. Extra capacity adds storage leakage and lookup energy, so designers balance it against avoided lower-level accesses. The shared P-core L3 cache also shrank by 14.8%. [2] Cougar Cove combines a similar footprint with Intel’s reported power-efficiency improvements. RibbonFET’s tighter channel control reduces leakage, while PowerVia reduces supply droop and allows tighter voltage guardbands. [1] Darkmont’s four-core LP E-core cluster is 5.0% smaller than Skymont’s on Lunar Lake, with most of the reduction in its L2 regions. The 1 MiB region shrank by 8.4% and the 1.5 MiB region by 14.9%. The tag arrays also use one fewer visible row. Tags identify which memory addresses the data array holds, so rearranging them changes the cache’s layout and wiring without requiring less data capacity. [2] The LP E-cores share one L2. This pools capacity and avoids duplicating all the cache machinery, but the four cores contend for its banks and bandwidth. Their separate cluster also keeps light work away from the performance cluster and its L3, allowing that larger domain to sleep. [1], [2] Cache area includes more than the storage cells. Tags identify each line, decoders select rows, sense amplifiers read the small bitline signal, and wires connect to the banks. Splitting an array into smaller sections shortens wordlines and bitlines, improving access speed, but duplicates peripheral circuits. Panther Lake’s smaller cache regions therefore reflect the complete memory implementation, including how much of each region is devoted to storage. [34] Unlike Meteor Lake and Arrow Lake, Panther Lake has no separate SoC tile. The NPU, LP E-cores, memory controllers, PHYs, media and display engines now share the compute tile. This removes an active die and keeps CPU memory traffic on one die. The cost is moving PHY and I/O-related circuitry onto 18A: drivers, receivers and analog circuits must still meet external voltage, loading and signal-integrity requirements, so their area does not shrink like dense digital logic. [1], [2] The biggest shrink comes from the NPU, which occupies 36.9% less area. NPU 5 consolidates the same total INT8 MAC count into half as many neural compute engines. Each of the three NCEs has a larger MAC array to make the complete NCE envelope 22.6% larger than an NPU 4 engine. Consolidation also halves the number of scratchpads and SHAVE DSPs, from 12 to 6. The MAC array handles matrix multiplication and convolution, while SHAVE executes vector and custom operations that fit the array poorly. [1], [2], [35] The paired floorplans identify each NCE envelope and its scratchpad, MAC, and SHAVE regions. Each measured MAC polygon is counted once per NCE in the area accounting below. The scratchpads store weights, activations, and intermediate results near the MAC arrays, allowing repeated use without fetching them again from DRAM. Halving their number delivers the largest measured area saving but leaves less local storage for the same total MAC count. Layers that no longer fit locally require smaller working tiles or more transfers of intermediate data. The benefit depends on keeping the enlarged arrays busy while managing that tighter storage budget. [36] NPU 5 also adds native FP8. Using half the operand width of FP16 reduces storage and transfer demand, helping workloads fit the smaller local memory budget. Lower precision and format-dependent range make scaling and model validation part of deployment. Hardware activation functions further reduce work that would otherwise occupy the programmable DSPs. [1], [2] Microsoft requires an NPU to deliver at least 40 TOPS for Copilot+ PCs. Both Lunar Lake and Panther Lake meet this threshold, but Panther Lake uses significantly less silicon. GPU tiles Panther Lake is Intel’s first product with Xe3, its latest GPU architecture. It offers two different GPU tiles: a smaller GT1 tile with 4 Xe3 cores on Intel 3 and a larger GT2 tile with 12 Xe3 cores on TSMC N3E. Panther Lake allows us to compare the same GPU architecture across both Intel 3 and TSMC N3E. Wildcat Lake adds a third Xe3 implementation on Intel 18A. A future newsletter will detail Xe3 and its implementation differences across all three process nodes. GT2 scales Xe3 to a different physical layout, with render slices arranged vertically instead of GT1’s horizontal arrangement. Slice placement sets the distances to shared cache banks and the D2D interface. Those wires consume area and add delay, so scaling the number of Xe cores also requires a new balance of cache placement, routing and timing. [1] What’s immediately obvious is that the GT2 tile on TSMC N3E has much smaller Xe cores than GT1. These block areas include logic, caches, and routing. An Xe core on the GT1 tile is ~69% larger than one on Lunar Lake, and ~55% larger than one on GT2. Intel 3 therefore uses substantially more area per Xe core. The block-area gap exceeds the measured logic and SRAM density gaps, bringing routing, timing targets, cell mix, and floorplan allocation into the comparison. The measured vector/matrix engine region is almost unchanged between Lunar Lake and Panther Lake’s GT2 tile. Xe3 retains eight 512-bit vector engines and eight 2048-bit XMX engines per core. Its gains also come from feeding those engines more effectively: more resident threads hide stalls, and variable register allocation lets shaders trade registers per thread against the number of threads kept active. [1] The shared L1/SLM capacity increased by 33% from 192 KiB to 256 KiB, while its area increased only 5%, raising effective density by 27%. L1 retains reused cache lines, while software-managed SLM lets a thread group share data locally. Both reduce traffic to more distant memory. Allocating more SLM per group can also limit how many groups reside on a core at once. [1], [37] The GT1 tile carries 4 MiB of L2 against 16 MiB on the GT2 tile. GT1 divides its L2 cache into four 1 MiB banks, while GT2 uses eight 2 MiB banks. Each bank contains 128 macros, but each N3E macro stores 16 KiB, twice the Intel 3 macro’s 8 KiB capacity. The N3E macro is only 54% larger while holding twice as many bits, giving it 30% higher density: ~23.7 Mbit/mm² versus 18.3 Mbit/mm². Including bank-level circuitry, the gap widens to ~16.9 Mbit/mm² on GT2 versus ~10.4 Mbit/mm² on GT1. GT2 gains density with its macros storing more bits per unit area, and those macros occupy more of each cache bank. Larger macros spread decoder and sense-amplifier overhead across more storage, while a more compact bank layout reduces the share spent on control and routing. The compromise is longer wordlines and bitlines that carry more capacitance. [34] I/O tile Panther Lake uses two I/O tile variants, both fabricated on TSMC N6. The smaller one provides 4 PCIe 5.0 and 8 PCIe 4.0 lanes and serves lower-tier systems as well as those without a discrete GPU, while the larger one adds 8 PCIe 5.0 lanes, bringing the total to 20 lanes, for discrete-GPU connectivity. Panther Lake SKUs with the larger 10- or 12-Xe GPUs use the smaller I/O tile. [38] The smaller I/O tile adds a PCIe 4.0 block and a Thunderbolt block to Lunar Lake’s I/O layout, providing four additional PCIe 4.0 lanes and another Thunderbolt 4 port. Its repeated N6 blocks retain nearly identical areas and layouts. Reusing these proven PHYs and controllers avoids porting and requalifying external interfaces on 18A, where faster digital logic offers less benefit to circuits constrained by the off-chip link. [38] SemiAnalysis’s teardown lab (STEEL) dives deep into the world’s advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. We’re hiring technical experts from system to transistor and everywhere in between. Check out our Careers page. Panther Lake offers scalability and modularity through its disaggregated packaging that partition compute, GPU, and I/O silicon into separate tiles allowing for a suite of tile configurations. This partitioning makes the package part of Intel’s node economics as it determines how much leading-edge wafer area each product consumes, which functions can remain on other processes, and how much configuration freedom Intel can offer from a shared set of tiles. Furthermore, fabricating the compute and GPU tiles separately confines the new 18A process to the compute tile and allows graphics and I/O to use other, more established, and more cost-effective processes. For Panther Lake, the GPU and I/O tiles are assembled alongside the compute tile on a passive silicon base using Foveros-S. Intel’s current technology brief lists a nominal 36 µm pitch for Foveros-S. Through-silicon vias (TSVs) in the base connect the fine wiring above to the larger package connections below. The functional tiles sit side by side on that passive base in a 2.5D configuration. [39] Our cross-section through the compute and GPU tiles shows the package’s wiring hierarchy. Microbumps connect each active tile to the passive silicon base; its fine redistribution layer (RDL) carries the short, dense tile-to-tile links. TSVs carry connections through the base to the package substrate, which fans them out to the much coarser motherboard solder joints. The base supplies interconnect, while computation remains in the active tiles above it. [39] At the compute-tile edge, the higher-magnification inset shows a local microbump spacing of approximately 25.24 µm and a feature width of 12.33 µm. These local spacings are finer than Intel’s nominal Foveros-S value. The X-ray fields further confirm tighter neighboring bumps, consistent across every die-to-die area found on each tile. Additional X-ray analysis is offered after the paywall. Putting the memory controller beside the CPU removes the D2D transfer that CPU memory requests required in Meteor Lake and Arrow Lake. This avoids the extra transmitter, receiver, and link traversal, saving interface energy and latency. Panther Lake’s separate GPU still crosses a D2D link to reach DRAM, so its larger local caches also help contain package traffic. [1], [40] Smaller dies are less likely to contain a random fatal defect, and screening them before assembly prevents one bad tile from consuming a complete package of good silicon. Reuse also spreads design and qualification work across more products. Against those gains, Intel pays for the passive base, D2D circuits, extra bonding and test steps, and losses during assembly. Cost per working product across the portfolio captures the combined effect of wafer yield, reuse, test, and assembly. [29] Wildcat Lake packaging Intel launched Core Series 3, formerly Wildcat Lake, on 16 April 2026 for value mobile and edge systems. Wildcat Lake keeps 18A but removes the passive base and combines more functions on one die to simplify the package. The two products therefore reveal two distinct ways to commercialize the same leading-edge process. [41] Wildcat Lake’s 18A die combines up to two Cougar Cove P-cores, four Darkmont LP E-cores, two Xe3 cores and a smaller NPU. A separate platform-controller die supplies I/O, connected through UCIe, Intel’s first processor implementation of the standard. Consolidating graphics remove a tile boundary and the passive base, reducing assembly complexity for a modest-bandwidth value product. It also ties CPU and graphics scaling to the same die, giving up Panther Lake’s ability to swap in a much larger GPU. [42], [43] In July 2021, Intel CEO Pat Gelsinger set out an ambitious process roadmap aimed at regaining performance leadership by 2025, later described as five nodes in four years. Five years and one CEO later, Intel’s comeback story is not as unambiguously positive as Pat may have hoped. [44], [45] Intel once set the pace for process technology, bringing high-k metal gate technology and FinFETs into volume production years ahead of the rest of the industry. Its 22 nm FinFET process reached consumers with Ivy Bridge in 2012. [46] Intel’s integrated device manufacturing (IDM) model allowed its architects and process engineers to co-optimize products and processes. Starting with Sandy Bridge, Intel dominated x86, while AMD struggled with Bulldozer. That lead faltered at 14 nm and broke at 10 nm. Intel targeted a massive 2.7× density increase, but the node arrived years late and required several revisions before it could support Intel’s full lineup. This delay forced Intel to stretch 14 nm across six generations, while TSMC moved ahead in process technology and AMD recovered in x86. By 2019, Intel was still shipping 14 nm across most of its product stack, with its 10 nm client ramp focused on Ice Lake mobile processors. Meanwhile, TSMC was shipping N7 and N7+, and AMD’s Zen 2 compute chiplets used N7 to raise core counts and improve efficiency. Intel’s process failures were central to its decline, but unsound business decisions furthered their downward slide. Product delays compounded product mistakes, pushing client, server, and FPGA roadmaps off schedule. Several attempts to enter AI (Nervana and Gaudi) and networking (Tofino) also failed to establish lasting businesses. Intel’s recovery has focused on consumer CPUs and advanced packaging. Tiger Lake, Alder Lake, Lunar Lake and now Panther Lake have restored Intel’s consumer roadmap. On the process side, Intel 4 shipped with Meteor Lake, Intel 3 with Granite Rapids and Sierra Forest, and Intel 18A with Panther Lake. Intel has also made advanced packaging part of its foundry offering. However, Intel is still playing catch-up in servers. Several Xeon generations arrived years late and trailed contemporary AMD and Arm server CPUs in performance, efficiency, and core count. The process roadmap is back, but Intel does not hold the same process-technology leadership position it held prior to 10 nm. The introduction of gate-all-around nanosheets and backside power delivery are two of the biggest changes to transistor integration in a decade. Intel took on both changes at once: 18A paired its first RibbonFET with PowerVia in Panther Lake. Panther Lake is a substantial manufacturing milestone. Our cross-sections show how RibbonFET and PowerVia reshape local contacts and wiring, while the floorplans show where architectural consolidation and process choices save area. A sustained competitive lead depends on product performance, cost, yield, and the next implementation. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page.. 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