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Man City guilty: Premier League rivals demanding sanctions imposed before end of season
Plus: Man City are expected to owe the Premier League tens of millions of pounds in compensation for legal costs; Rui Pinto, whose leaks of private documents helped to trigger the Premier Leagues investigation, will no longer be protected as a witness by Portuguese authorities
Michigan research council predicts legal challenges if money-out-of-politics campaign succeeds
The initiative would restrict political contributions by big utilities and state government contractors. But the U.S. Supreme Court has held that campaign contributions by corporations are protected speech.
In limbo: Nevada Salvadorans with TPS protections await DHS decision
Salvadorans with Temporary Protected Status in Nevada, some of whom have called the U.S. home for a quarter-century, don’t know how long they’ll be able to legally remain in the country.
What's next for immigrants with TPS status after Supreme Court ruling?
The legal status of nearly 1.3 million immigrants facing war or environmental disasters in their home countries is up in the air following a U.S. Supreme Court ruling on the Temporary Protected Status (TPS) program. In a 6-3 decision, the high court ruled last month that the Homeland Security secretary’s decision to grant, extend or terminate a country’s TPS designation, which lets people from eligible countries legally live and work in the U.S. for periods
My Journey Into Researching Historical Erasure on Public Lands
Most people know me for my work on ocean conservation, Indigenous-led stewardship, and marine protected areas. Over the past year, however, I have found myself increasingly drawn into a different b…
Reflecting on the World Cup's complex colonial politics
The Haitian team's heroic efforts were followed by news that the U.S. Supreme Court has greenlighted the end of Temporary Protected Status.
US authorities detain Nicaraguan political exiles stripped of citizenship, raising fears of deportation
Human Rights Watch (HRW) on Friday reported that US immigration authorities detained 8 Nicaraguan exiles who were previously granted protected status in 2023 after fleeing political prosecution. On Fe...
INSIDE CLIMATE NEWS: NOAA Fisheries takes a ‘sharp turn away from science’
The agency’s focus on commercial interests threatens fisheries science and over one million miles of protected marine habitats. By Johnny Sturgeon, Inside Climate News This article originally appeared on Inside Climate News, a nonprofit, non-partisan news organization that covers climate, energy and the environment. Sign up for their newsletter here. In July, the Trump administration relegated endangered leatherback turtles, sea lions and whales to mere collateral damage in its race to profit from the oceans. Now, fisheries science is in […]
A Minnesota science museum began trying to protect land around its river research station after it opened in 1989; 37 years later, the final 130 acres are protected, completing a 300-acre conservation goal
A conservation effort that began when a Minnesota science museum opened its river research station in 1989 has taken nearly four decades to reach its final stage. According to the Science Museum of Minnesota, it has permanently protected the last 130 acres around its St.
Haiti and the politics of persecution
Haiti is not an abstraction. Haiti is a nation whose pain has too often been treated as policy collateral, a people whose labor is welcomed when needed and whose lives are discounted when convenient. Now, with the Supreme Court allowing the Trump administration to terminate Temporary Protected Status for Haitians and Syrians, more than 350,000 […]
Man struggling with mental health sentenced for stabbing Santaquin officer
Timothy Olesen will spend less than two year in jail and four years on probation for stabbing an officer with a kitchen knife who had responded to his call. The officer was wearing a vest that protected him.
This mysterious hole on the Moon may open into a giant cave
NASA has selected the GIMLI project to investigate whether the Marius Hill Pit opens into a vast underground cave or lava tube. Using radar, seismic sensors, gravity measurements, and cameras, researchers will search beneath the lunar surface and estimate the size of any hidden void. Such caves could preserve clues to the Moon’s volcanic history and potentially provide protected shelters for future astronauts.
Anna Paquin slams Hollywood for its treatment of ‘pre-sexualized’ child stars after Hayden Panettiere’s death
Anna Paquin criticized Hollywood’s treatment of ‘pre-sexualized’ child stars after Hayden Panettiere died at 36: ‘We were not as protected...as we are supposed to be.’
Spirit, Google ensure passenger privacy will be protected in bankruptcy sale of airline’s business data
A court-appointed ombudsman has concluded that the proposed $10 million sale of Spirit Airlines business data to Google can proceed since privacy concerns have been addressed.
Thousands of Haitians lose immigration status, face deportation
The temporary protected status many Haitians had has been cancelled as the country remains unstable
Fact check: Would ‘money out of politics’ proposal stifle free speech?
Would ballot campaign to ban large utilities like DTE from making political donations suppress free speech protected by the First Amendment, as critics claim? Here are the facts.
Google Gemini accessed protected systems of 3 real companies during artificial intelligence cybersecurity test
Google Gemini accessed three real companies' protected systems during a cybersecurity test, including one case where the AI repeatedly guessed passwords.
Comey says seashells post was political speech — not a threat — as he presses to dismiss charges
James Comey is urging a judge to throw out federal charges against him. He's arguing that a photo of seashells he posted on social media was not a call to violence against President Donald Trump but protected political speech.
AI Can’t Tell Real Science From Junk. That’s a Big Problem.
Artificial intelligence is in the news every day. It solves fundamental math problems by hundreds, hacks into highly protected networks, and outstreams Taylor Swift. AI is also supposed to lead us to…
Connecting conservation and health: Central Asia strengthens preparedness for zoonotic disease risks in protected areas
From Kazakhstan’s steppe and mountain landscapes to Turkmenistan's deserts, protected and conserved areas play an important role in the region’s One Health response. A series of national trainings across Central Asian countries is helping conservation practitioners recognise potential wildlife disease risks, protect themselves in the field, and connect their observations with wider veterinary, public health and scientific systems.
Chronic pain is missing from America’s heat warnings
The results of a new study suggest that chronic pain deserves a place in how the country prepares people for extreme weather. They also show that rural residents may be the least protected.
Face ID bug is causing some iPhone 18 Pro models to malfunction
Unlocking Face ID-protected apps is causing some iPhone 18 Pro units to freeze and reboot.
Here\'s what older adults should know about measles protection
As the number of Lancaster County residents sickened with measles grows by the day, older adults may wonder if they are protected. LNP | LancasterOnline talked with two family physicians
A judge expanded abortion access in Idaho last month. Another court paused his decision
Idaho Attorney General Raúl Labrador said the ruling “means unborn children and their mothers in our state are protected under Idaho law.”
HOMETOWN HEALTH: Are you protected against measles? fifth U.S. death reported
One of the largest national medical organizations in the United States has a message it wants people to hear.
June 2026 Healthcare Data Breach Report
In June 2026, 66 large healthcare data breaches – data breaches involving the protected health information of 500 or more individuals – were reported to In June 2026, 66 healthcare data breaches affecting 500 or more individuals were reported under HIPAA, and the protected health information of almost 4.5 million Americans was breached.
Doctors win big at medical arbitration. Will your insurance bill soar?
Arbitration has protected consumers from medical billing disputes. But experts warn consumers could pay with higher health insurance premiums,
Dutch consumer group files lawsuit against Epic for misleading young players on Fortnite, seeking more than €100m in compensation
"Epic deliberately designed the game to pressure players into buying. Young consumers are supposed to be protected from exactly that," says group
Health questions? “Ask Away.” PC Health™ launches new “Built in Canada for Canadians” AI-powered health chat
The only AI-powered chat created expressly for all Canadians, connecting people to trusted, practical information, and appropriate care optionsPersonalized answers to health questions that Canadians can trustBacked by more than 1,000 Canadian clinical sourcesAll health chat conversations are stored in Canada and are protected under Canadian privacy laws BRAMPTON, Ontario, Sept. 10, 2026 (GLOBE NEWSWIRE) -- Today, PC Health™ launched PC Chat™, a free AI-powered health tool built in Canada, based
Toronto's offer of 2 unprotected 1sts (which, by all …
Toronto's offer of 2 unprotected 1sts (which, by all …
Florida Business Owners Accused of Scattering Mothballs to Drive Off Protected Shorebirds
Two business owners on St. Pete Beach are facing charges after wildlife officers say they tried to make an entire flock of protected shorebirds pack up and leave — not with noise, not with nets, ... R...
Hamilton County health officials urge families to update vaccines ahead of flu season
As flu season approaches, the Hamilton County Health Department is renewing its warning for families to make sure they are protected with the most current vacci
'Today the game was unprotected' - Arteta fumes but Arsenal survive
Arsenal produced a gritty 2-0 win against Sunderland, but Mikel Arteta fumed about the penalty that could have cost his side a result.
Microsoft Frontier Company: AI engineering that amplifies and protects your intelligence
The pace of AI adoption is moving incredibly fast. Customers have moved well beyond experimentation and understand the importance of adopting AI to transform their business. They are now concentrating on delivering measurable business outcomes and demonstrating a return on their AI investments, while ensuring their intelligence is amplified and their IP is protected. Today...
With TPS in doubt for Salvadorans, businesses brace for turmoil
Some restaurants, hospitals and construction firms pushed forward with layoffs as the end of temporary protected status for 232,000 Salvadorans loomed.
Most Catholic health institutions in Illinois temporarily protected from assisted suicide law
A significant number of Catholic health workers in Illinois are now covered by a temporary restraining order on the state's new physician assisted suicide law that took effect Sept. 12.
'India is an early tech adopter': Proofpoint CEO on why the cybersecurity firm is expanding in India
Sumit Dhawan, CEO of Proofpoint, explains why the cybersecurity firm is continuing to expand its operations in India by setting up two Centres of Excellence. He also assesses sovereign efforts to ensure governments and critical sectors are protected.
'Jeff Corwin’s Southern Wild' episode features Pamlico County
The second episode of biologist Jeff Corwin's new television series "Jeff Corwin's Southern Wild," titled "Wildlife After Dark," features a segment on red drum research, a protected game fish and
Scientists covered 200 square metres of a Swiss glacier with sheep’s wool; early tests found it protected the ice about as well as plastic sheets, but only 0.02% of Swiss glacier ice is covered
A natural wool covering placed over 200 square metres of high-altitude Alpine ice has proved as effective at slowing summer melting as conventional synthetic tarpaulins, offering a possible biodegradable alternative to plastic sheets. Initial results from the "Keep It Wool" trial on the Tsanfleuron Glacier in western Switzerland show that prototype wool blankets protected snow and ice from heat about as well as plastic geotextiles.
A New Bill Would Extend Health Privacy Law to Your Phone. The Hard Part Comes Next. - Petrie-Flom Center
Most people might assume that the health information on their phone is protected the way their medical records are. It is not.
Viewpoint: Unlocking Europe’s wildfire data
Europe is already investing in the science, technology and infrastructure needed to understand, prevent and fight wildfires. Copernicus provides satellite-based Earth observation and environmental information, while the European Forest Fire Information System provides information on fire danger and forest fires across Europe. Weather and climate systems add forecasts of heat, drought, wind and humidity; historical fire databases show where fires have occurred; and researchers generate increasingly detailed knowledge about fuels, fire behaviour, forecasting, modelling and risk management. Meanwhile, new European research projects are adding digital twins and other tools to this growing ecosystem.However, these data do not necessarily sit together, nor are they necessarily described, structured or governed in ways that allow them to be used together. Much of the information is public, but some is commercially held. Some is sensitive. Some is subject to legal, security or operational restrictions. Even when data can be legally accessed, different systems may use different formats, terminology and rules.Europe therefore faces an unusual paradox: we have vast amounts of relevant information to respond to the wildfire challenge, but not the means to bring it together. For example, a wildfire researcher or emergency service might need to ask whether a particular combination of vegetation, drought, wind and topography has historically been associated with rapid fire spread. The relevant information may exist in several institutions, using different systems and subject to different conditions of access.The challenge is to conduct an authorised analysis that interacts with these sources, combines the results and respects the rules imposed by each data custodian.An important part of the answer can be found in the Fair principles, the idea that data should be findable, accessible, interoperable and reusable. Developed more than a decade ago, these principles have become a central reference point for modern data stewardship, making it easier for people and machines to find data, understand what it means and determine whether it can be reused.Readability by machines is essential, since AI systems will be key to meeting the data challenge. Bring analysis to the dataThe proposition is not to give an AI system unrestricted access to sensitive databases. Quite the opposite. The goal is to make it possible for approved algorithms to go to the data, rather than requiring sensitive data or large datasets to be copied to wherever the analysis happens.Imagine an analysis asking a series of questions of different data stations. At one station it might examine weather and climate data; at another, historical fire records; at another, experimental measurements of fire behaviour. The algorithm does not need to download everything. It can operate within the environment permitted by each data custodian and return only the results that the rules allow to leave.This is sometimes described as data visiting, and related approaches already exist in areas such as federated analysis and federated learning.Sensitive data should therefore not be treated as a free-for-all for machines. This requires appropriate governance at multiple levels. Access needs to be authenticated and authorised. The purpose of an analysis should be defined. The code or model being run should be controlled. Data custodians should be able to specify what can be queried and what results can leave their environment. Activities should be auditable and human oversight should remain where the consequences require it.In other words, the objective is not to trust AI with the data. It is to design systems in which AI never has more access than it needs.As open as possible, as closed as necessaryFair data should also not be confused with open data. Some wildfire data should be openly available. Other information may legitimately need to remain restricted because it concerns critical infrastructure, security, commercial interests, privacy or operational capabilities. The principle should be: as open as possible, as closed as necessary.The important point is that restricted data should not automatically become unusable data. If machines can discover what information exists, understand its meaning, establish where it came from and determine the conditions under which it can be used, authorised analyses can potentially be carried out without the underlying data ever leaving the environment in which it is protected.Restricted data can still be Fair and machine-actionable.This is also an important question of data sovereignty. European institutions should not have to surrender control of their data to a handful of technology platforms in order to benefit from AI. Nor does Europe need to start again by building one giant repository for every piece of wildfire information. The better approach is to connect what already exists.This is the principle behind emerging approaches such as Tryangle, developed through the Leiden Initiative for Fair and Equitable Science. Rather than creating another centralised data warehouse, the approach seeks to provide an interoperable layer through which approved algorithms can visit distributed data sources while respecting the rules of their custodians.In this way, a data station can remain where it is. Its custodians can retain control. Existing databases and applications do not have to be abandoned. What changes is their ability to communicate with other systems through common, machine-readable descriptions, access rules and interoperability mechanisms.But approaches like this need data that meets the Fair principles. Only then can an interoperable ecosystem safely begin to turn fragmented information into collective intelligence.Data infrastructure is wildfire infrastructureThe implications of this approach are entirely practical. Firefighters could gain better intelligence about local and evolving risks. Land managers could test prevention strategies using more comprehensive information about fuels, weather and past fires. Researchers could compare evidence across ecosystems without repeatedly moving huge datasets between institutions. Smaller regions and resource-constrained teams could access analytical capabilities without having to build large data infrastructures themselves.Europe is already investing heavily in satellites, databases, research programmes, forecasting systems and scientific expertise. The question is whether we will connect those investments well enough to turn them into actionable intelligence.That requires policymakers and funders to treat data infrastructure as seriously as physical infrastructure. Data generated or supported through European public funding should be Fair, verifiable and machine actionable by design, wherever legally and ethically possible.Related articlesData Corner: Europe’s burning need for wildfire mitigation researchClimate monitoring must remain a global enterprise, experts sayIn practice, that means funding not only the production of data, but also the infrastructure that makes data usable across systems: metadata, provenance, interoperability, access mechanisms and governance. Where data must remain restricted, we should ensure that it can still be securely discovered, verified and used for authorised analysis.Initiatives such as the European Open Science Cloud offer an existing framework through which these principles can be put into practice. What is needed now is to accelerate implementation and make them a standard part of how Europe funds and builds research and innovation systems.We do not need another generation of disconnected databases. The data is already there. The opportunity is to make it work together, securely, responsibly and quickly enough to help prevent the next fire, rather than simply document the last one.Jean-Claude Burgelman is professor emeritus at the Free University of Brussels (VUB) and editor-in-chief at Frontiers Policy Lab. For more than 20 years he held leading roles in research and innovation policy at the European Commission.
USNH Yokosuka Public Health Team Safeguards Community Water Supply
YOKOSUKA, Japan — While most residents aboard Commander, Fleet Activities Yokosuka (CFAY) saw a precautionary boil water advisory during a recent water line repair, public health professionals at U.S. Naval Hospital Yokosuka were working behind the scenes to verify the safety of the installation's drinking water system and help ensure the community remained protected.
Cold & flu season starts in Michigan, health officials say
The Medical Director for the WUPHD says October is the best time to get a flu shot to be protected for the whole season.
Medical equipment supplier’s cloud applications breached, leaking patient data to hackers
AdaptHealth said the intrusion on its network was made possible by compromised credentials phished from one of its vendors. Stolen data may include protected health information, though exactly what is still being determined.
Trump Threatens Defamation Suit Over National Guard Report, Aiming to Intimidate a Critic
It was the latest example of President Trump’s bid to use the legal system against those who voice unflattering facts and opinions generally protected by the First Amendment.
As a measles outbreak escalates in Pennsylvania’s Amish Country, exposures rattle people at risk
Measles is showing up in places where people who can’t be protected have to live, work or go to school.
Gurnoor Brar has been expensive, but India happy to pay the price for now
Ahead of the 2027 ODI World Cup, the team management wants the fast bowler tested, not protected
This Week: Politics 101, 20th Street Bikeway, Muni Trivia
Here is a list of events this week. Monday/Tonight! SF Politics 101 with Joel Engardio. Learn how local politics shaped San Francisco. Monday/tonight, October 19, 5:30-6:45 p.m. SPUR Urban Center, 654 Mission Street, S.F. Wednesday 20th Street Protected Bikeway Ribbon Cutting. The Oakland Department of Transportation, city officials, Bike East Bay and other community partners will celebrate the completion of the 19th Street BART to Lake Merritt Urban Greenway. Wednesday, October 21, 1:30 p.m. 400 Thomas L Berkley Way, Oakland. Thursday 2026 Silver SPUR Awards. This SPUR event brings together elected officials and business, civic, and philanthropic leaders to celebrate four individuals and their contributions. Thursday, October 22, 4-7:30 p.m. Blue Shield of California Theater at YBCA, 700 Howard Street, S.F. Get tickets here. Friday Woman and Non-Binary Morning Ride. Join the San Francisco Bicycle Coalition for a socially distanced bike ride for women and nonbinary cyclists. Friday, October 23, 7:15-8:45 a.m. McLaren Lodge, 501 Stanyan Street, S.F. Friday Muni Trivia Night. Bring your friends or come solo and make some new ones. Friday, October 23, 7:30 p.m. Standard Deviant Brewing, Pier 70, suite 195, 1070 Maryland Street, S.F. RSVP here. Saturday Fifth Annual Firefighter Family Ride. Join SFFD, SF Safe Routes to School, and the SF Bicycle Coalition for a fun, low-stress bike ride through one of the city’s most beautiful routes. Saturday, October 24, 10:30 a.m.-1 p.m. Panhandle Park Blacktop (Fell & Ashbury) to JFK Promenade (Whale’s Tail). Sunday Canvas for No on Prop G. Join the San Francisco Bicycle Coalition to canvas for No on ‘G’ to save Sunset Dunes Park. Sunday, October 25, 10 a.m.-12 p.m. Marina Blvd & Laguna Street, S.F. Got an event we should know about? Drop us a line.
Africa’s Ghost Plants: Why Scientists Are Digitizing Centuries of Botanical History
Scientists in biodiversity-rich countries are using digitized plant records to identify rare species and inform what gets protected.
Science and the public are learning the wrong lessons from Covid
“Post-pandemic polarization threatens to lock our memories into attractive, untrue conclusions that will leave us unprotected next time,” write Marc Lipsitch and Sara Cody.
200,000 Salvadoran immigrants hope for protection amid Trump administration silence
A deadline for the Trump administration to decide whether about 200,000 immigrants from El Salvador can remain protected from deportation has passed without any public announcement, raising hopes among many for another six-month extension while also sowing confusion.
Google Password Manager Attacks Could Let Malware Hijack Passkey-Protected Accounts
Unit 42 details three Chrome passkey attack paths that could let Windows malware bypass verification or recover synced private keys after compromise.
Aesto Health Data Security Incident Affects Multiple Healthcare Provider Clients
A data breach at Aesto Health, a Birmingham, Alabama-based healthcare technology company, has affected several of its healthcare provider clients. Aesto A security incident at the Alabama healthcare technology company Aesto Health has affected at least 27 of its healthcare provider clients and exposed the protected health information of hundreds of thousands of patients.
Is the EU research budget actually increasing?
Is a Horizon Europe budget of €158 billion a 10% cut or a significant increase to the EU’s support for research and innovation? What would seem like a question of fact has divided opinion in Brussels since the Irish presidency of the EU Council presented its negotiation box on October 10. The answer depends on factors such as how you adjust for inflation, whether you account for increases in overall EU wealth and if you care about absolute or proportional figures. The €158 billion budget in current prices, proposed by the Irish presidency of the EU Council, was quickly criticised by university lobbies and rejected by the high-level expert group led by former Portuguese science minister Manuel Heitor. It was also decried by the four pro-European political groups in the European Parliament. “How can Europe close its competitiveness gap while cutting the European Competitiveness Fund by 13% and Horizon Europe by nearly 10%?” asked a joint statement by the European People’s Party (EPP), Renew Europe, the Socialists and Democrats and the Greens/European Free Alliance. Together, these parties hold 63% of seats in the Parliament.In stark contrast, Irish foreign affairs minister Helen McEntee said that the proposal “significantly increases investment in competitiveness, research and innovation,” Meanwhile, a presidency press release said that, compared to the current Multiannual Financial Framework (MFF), the proposal would “double the volume of competitiveness related programmes.” So, who is right? That depends on how you make the calculation.Compared to the Commission figure or the previous budget?The first thing to notice is the difference in baselines. When the MEPs say the Irish presidency will cut Horizon Europe by “nearly 10%” they are using the European Commission proposal for the MFF from July 2025, which allocated €175 billion in current prices to Horizon Europe. However, when the Irish foreign affairs minister said the research and competitiveness budget is increasing significantly, she is comparing it to the 2021-27 MFF, which had a Horizon Europe budget of €84.9 billion in 2018 prices.Her point holds when accounting for inflation. Applying a 2% annual inflation rate, the calculation method used by the Commission, the 2021-27 Horizon Europe would have a budget of €97.5 billion in 2025 prices. In comparison, the Irish presidency’s €158 billion figure in current prices translates to €140 billion in 2025 prices. Does the ECF count?But there is more to the dispute. In its statements, the Irish presidency lumped the research budget in with the overall budget for competitiveness. The Parliament statement, however, kept the two separate. This matters because the next MFF includes plans to add a new European Competitiveness Fund (ECF) to fund programmes meant to boost the continent's competitiveness. The Irish negotiating box allocated €245 billion in current prices to this programme.When this is added to the €158 billion for Horizon Europe, as well as programmes such as the EU education programme Erasmus+, the total for “competitiveness, prosperity and security” in the Irish proposal becomes €514 billion in current prices. But it is still uncertain how big a share of this competitiveness budget would go to research. The Commission proposal of July 2025 for the MFF included clear links between the ECF and Horizon Europe, indicating some ECF money will go to research. At the same time, the structure of the ECF is still being negotiated, and a substantial part of its budget is expected to support non-research activities such as defence manufacturing, decarbonisation and digital infrastructure. Related articlesCouncil floats 9.6% budget cut to next Horizon EuropeResearch community to appeal to national governments over planned EU budget cutEU own resources ‘essential’ for future research budget, says leading MEPSo, it is by looking at competitiveness rather than research, or combining the two, that the Irish presidency can claim that its proposed budget will significantly increase investment in competitiveness, research and innovation.According to the Irish presidency proposal, Horizon Europe and other competitiveness-related programmes in the current multiannual budget received €221 billion in current prices. However, since this money is being distributed from 2021 to 2027, it is not directly comparable to the €514 billion in current prices which will be distributed from 2028 to 2034.Research as a proportion of the MFFBut the relative rise in competitiveness-related programmes points to another important distinction: whether you look at the research budget in absolute terms or as a share of the overall MFF. Here, too, the size of the research budget has risen, although only slightly. In the 2021-27 MFF, Horizon Europe accounted for 7% of the total budget. In the Irish presidency’s proposal, it amounts to 8.7%. The share for the total competitiveness envelope went from 17.7% in the current MFF to 28.1% in the Irish presidency proposal.This proportional share may seem irrelevant to universities looking for research funding, but it is becoming significant as budget negotiations between the Parliament, the Commission and the Council begin. On October 2, a group of 17 southern and eastern European countries sent out a statement calling for the EU agriculture and cohesion budgets to be protected. The Parliament’s co-rapporteur on the budget, Siegfried Mureșan of the EPP, has also said that the research envelope is likely to be cut disproportionately as the budget is slimmed down during negotiations.
Who Should the Nets Protect in an Expansion Draft?
Bleacher Report has weighed in on which Nets players should be protected in a potential expansion draft. Here’s a look at who Brooklyn should keep safe—and where the toughest decisions come in.
Salvadorans anxiously await news on whether TPS protections will end
The Department of Homeland Security has not yet announced whether it will end or extend Temporary Protected Status for some 170,000 Salvadorans, including 36,000 in California.
NOAA Fisheries Takes A ‘Sharp Turn Away From Science’
The agency’s focus on commercial interests threatens fisheries science and over one million miles of protected marine habitats.
Supreme Court strikes down Watergate-era limits on campaign funds for political parties
The Supreme Court ruled again that campaign funding is free speech protected by the 1st Amendment.
RWJBarnabas Health and NJ Department of Health Celebrate Success of “Stay Well, Learn Well” Initiative
RWJBarnabas Health, in partnership with the New Jersey Department of Health (NJDOH), hosted a series of successful back-to-school events as part of their "Stay Well, Learn Well” initiative which provides childhood vaccinations, school physicals, and other wellness resources to help ensure children across New Jersey are healthy, protected and ready to learn.
The Mental Health Cost of Harsh Immigration Policy
Since January 2025, a wave of new policies has reshaped daily life for refugees, asylum seekers, and immigrant families across the country: the suspension of refugee resettlement, the possible return of "Remain in Mexico,” the end of humanitarian parole for thousands, temporary protected status at risk, and more. Each of these sounds like a policy headline, but in practice, these changes
Which Washington Wizards Should Be Protected in Expansion Draft?
With NBA expansion teams on the horizon, who along the Washington Wizards' 2026-27 roster would be protected in an expansion draft?
Simon Leis's daughter reflects on her father's legacy, youth mental health advocacy
"We definitely knew there was a love-hate relationship with my father," says Julie Raleigh, on her father, Simon Leis's legacy. Although behind the headlines, Raleigh says that Leis was simply "Dad" to her, remembering him as a man who protected his family in the same way that he tried to keep Hamilton County safe throughout his time in law enforcement.
Intel Panther Lake Teardown, 18A, BSPD, GAAFET, SemiAnalysis STEEL
Panther Lake debuts the first commercial implementation of backside power delivery (BSPDN), introduces Intel’s first iteration of gate-all-around (GAA) transistors, and showcases their advanced packaging capabilities with its Foveros-S assembly. With Panther Lake, Intel’s manufacturing arc has shifted from nebulous roadmaps to shipped silicon, a significant milestone on their long road back to competitive semiconductor manufacturing. To evaluate the extent of Intel’s comeback, we tore down Panther Lake. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Our teardown traces 18A from its four-sheet RibbonFETs (Intel’s marketing name for GAAFETs) and gate stacks through contacts, frontside and backside wiring, and the bonded carrier. We explain how these material and integration choices improve gate control and reduce resistance, while adding capacitance, thermal resistance, and process complexity. Our measurements put Panther Lake’s 18A compute logic and TSMC N3E GPU logic at similar logic density. However, 18A does not lead TSMC N3P, N2 or Samsung SF2 in peak density. Panther Lake’s CPU cores are incremental updates, and the high-end GPU still uses TSMC N3E. Panther Lake assembles one compute tile, one GPU tile, and one I/O tile atop a passive base tile using Intel’s Foveros-S advanced packaging. Both compute tile variants use Intel 18A. The Xe3 GPU options are a 4-core GT1 tile on Intel 3 and a larger 12-core GT2 tile on TSMC N3E. Both I/O tile variants use TSMC N6. [1], [2] Our analysis centers on the PTL-U compute tile, both the 4-core and 12-core GPU tiles, as well as the 12-lane I/O tile. In conventional chips, power and signal are routed through the same frontside metal stack towards the device frontend. Power rails consume scarce routing resources near the transistors, while tall via stacks carry VDD and VSS from the coarse upper wires to local rails. Backside power delivery (BSPD) moves the main power network behind the transistor layer, to the backside, separating it from frontside signal routing. We covered BSPD and its impacts in 2024. [3], [4], [5] Intel’s BSPD implementation, branded as “PowerVia”, routes power through dedicated backside metals to nano-TSVs, which connect those rails to local source/drain (S/D) contacts. Implementing that separation requires Intel to build the interconnect stacks from both sides of the wafer. The frontside comprises the M0-M14 signal stack, while the backside comprises the BM0-BM5 power stack. M0 and BM0 are closest to the transistors. The nano-TSVs connect the two sides, but Intel patterns and etches each via from the front after forming the contacts. A narrow via runs from the side of the contact deep into the silicon substrate. Intel then completes the frontside signal metal stack, bonds the wafer to a carrier, flips it and removes the original substrate until the buried via tips are exposed. The backside metal stack is then deposited directly on the revealed vias. The nano-TSV and backside-via profiles taper in opposite directions because Intel forms them from opposite sides of the wafer. The transistor structures form the FEOL. Local contacts and nano-TSVs connect them to the wiring. M0 begins the frontside interconnect stack. The silicon carrier remains attached above the frontside interconnects. It supports the device wafer during substrate removal and backside processing and remains part of the finished chip’s thermal path. PowerVia removes the main power distribution from the congested frontside metals, routing supply through shorter and wider backside wires. Its lateral landing still occupies area in the standard cell, so it recovers less cell area than a direct backside contact. [3] Nano-TSVs beside the logic devices carry VDD or VSS from the backside power network, while signal connections continue upward through the frontside metals. Backside Interconnects Samsung SF2 data is included for comparison to Panther Lake’s within this article. SF2 is the incumbent GAA foundry node but lacks BSPD, serving as a useful reference to evaluate 18A. A full teardown of Samsung’s S26 products, processed on SF2, will be shared soon.Nanosheet-cut EDS comparison. The PowerVia supply path runs from the backside Cu rails through Mo-lined W nano-TSVs to the local transistor contacts. In this cross section, the tapered connection spans roughly 150 nm from the contact level to BM0. The Ta liner confines Cu and promotes adhesion to the surrounding stack; the AlOₓ etch stop controls the next dielectric etch above the rail. Dielectric beneath the ribbons electrically separates the devices from the backside wiring and removes the conducting silicon body below the channel. [6] AlOₓ serves as an etchstop (ES), enabling endpointing and protecting the underlying layers. Low-volatility aluminum fluoride reaction products resist the fluorinated plasma, allowing a thin AlOₓ film to protect the metal while the surrounding low-k dielectric is removed. [6], [7]. While the BM0 and layers above the M1 lines show double AlOx layers, Our SMIC N+3 teardown showed single AlOₓ layers. SMIC uses a simpler local AlOₓ substack, while the remaining cap and etch sequence provide the required landing protection. So why double layers? The closely spaced AlOₓ doublets provide two protected endpoints in the etch sequence. Intel documents an AlOₓ/SiN/AlOₓ stack that explains the benefit. The main dielectric plasma etch stops on the first AlOₓ film; a selective wet clear opens that film; a second plasma etch removes the intermediate SiN and stops on the second AlOₓ film. The final wet clear exposes the metal landing surface. SiN is the intermediate dielectric in Intel’s published example. [8] The second stop protects the metal through a cap breakthrough. Wide openings can etch faster than narrow ones, and etch depth varies across the wafer. Metal under an early-clearing opening would otherwise be exposed while other openings still need more etching. Staged protection widens the process window and reduces metal erosion, corrosion and void formation. [8] TSMC documents AlN/AlOₓ/SiOC/AlOₓ above Cu, with AlN blocking Cu diffusion, and a simpler AlN/SiOC/AlOₓ variant that omits one AlOx film. [9] Levels with different opening sizes, aspect ratios, pattern densities and cap materials need different etch margins. A double AlOx stop is useful where another protected endpoint justifies the added processing. The extra film adds formation, selective opening and cleaning steps, plus another set of interfaces to control adhesion, moisture, and stress. These blanket films are opened through the existing via pattern, so each film does not require another lithography mask. AlOₓ adds parasitic capacitance when it replaces lower-k dielectric; two thin AlOₓ films can nevertheless contain less AlOₓ than one thick film. Total thickness, placement, and theintermediate dielectric determine the electrical cost. Deposition chemistry also changes AlOx permittivity and residual hydroxyl content, which can oxidize the underlying metal. [7], [8], [10], [11] The backside stack separates into relatively fine BM0-BM2 wiring near the devices and coarser BM3-BM5 power distribution. The largest pitch increase occurs between BM2 and BM3. BM0’s pitch closely matches the logic-row height, fitting local power delivery to the cell rows. Higher levels aggregate current through larger conductors: routing density becomes less important than low resistance and current capacity as the network approaches the package. This hierarchy provides wide power wiring for the power delivery network without consuming scarce frontside signal-routing resources. [3] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Frontside Interconnects Intel 18A combines Mo-lined W contacts and nano-TSVs with a separate backside Cu power network. Samsung SF2 keeps power on the frontside, using Ti-based contact interfaces and Ta-based barriers and Co liners around Cu wiring. In 18A standard-cell rows, backside power rails supply the devices through nano-TSVs within the cells, freeing frontside routing resources. Samsung’s M0 accommodates both power and signal connections. From the device toward M0, the connection runs through a Ti-based S/D interface, W contact fill, a Mo-lined W via, and the Cu M0 wire. Mo supplies a conductive nucleation and adhesion layer for W, replacing the resistive TiN liner used in conventional W integration. This increases the effective conduction volume within the feature while retaining W fill and its established polishing, cleaning and etching processes. Intel’s Mo/W patent describes this integration tradeoff. The nano-TSV uses the same Mo-lined W construction in the backside supply path. [12] The move from TiN to Mo is an incremental change. While a full Co or Mo fill can also reduce the volume lost to liners in very small features, it requires new integration schemes that increase complexity and risk. Cu remains attractive for wider wires due to its low resistance. As wires and vias shrink, the diffusion barrier consumes an increasing fraction of their cross-section. [12], [12], [14] Intel uses Co/Ru liners at M0-M1, Co at M2-M4, and Nb at M5-M9. The lower-level liners help Cu adhere and reduce void formation during trench fills. Applied Materials’ Endura has new thermal control that facilitate wetting process, so the thin film continuity is good enough that good capillary pressure will drive Cu atoms to the via bottom without voiding. Intel’s choice to use Nb is particularly interesting. Intel’s Nb patent describes a conductive diffusion barrier intended to reduce the barrier’s contribution to resistance relative to conventional Ta-based barriers, particularly at via bottoms where all current crosses the barrier. The patent pairs Nb in coarser levels with the option of lower-cost PVD processing. [15], [16] The upper metal layers support thicker barriers formed through physical vapor deposition (PVD) despite its worse coverage and uniformity. Meanwhile, the lower metal layers require thinner barriers deposited through conformal atomic layer deposition (ALD). Co/Ru adds another material interface and requires controlled deposition and Cu fill. Changing liners and barriers by metal layer allows Intel to optimize interconnect resistance, process complexity, and reliability. [15, 16] RibbonFET, Intel’s name for its gate-all-around FETs (GAAFETs), replaces the FinFET’s vertical fins with four stacked horizontal silicon nanosheets, allowing the gate to surround the channel on every side. The path to GAAFET begins with the planar transistor. A planar MOSFET places the gate above the channel between its source and drain. Pairing an NMOS with a PMOS transistor creates a CMOS inverter, in which the NMOS pulls the output low for a high input, and the PMOS pulls it high for a low input. The gate must retain electrostatic control of the channel to ensure clean switching. As gate lengths shrank, the drain began to compete with the gate for that control, increasing off-state leakage. Electrostatic control was restored through an architectural evolution that raised the channel into a vertical fin and wrapping the gate around three sides. Called “FinFET”, this new architecture packed more effective channel width into a smaller footprint. Further scaling made it harder to maintain both drive current and leakage within smaller cells, and reintroduced the same problems planar MOSFETs faced. Nanosheet GAAFETs close the fourth side by replacing the vertical fin with a stack of horizontal nanosheets, each surrounded by the gate. The tighter electrostatic control suppresses leakage at shorter gate lengths while stacking adds effective channel width within the cell footprint. In a FinFET process, channel width changes in discrete steps as designers must add or remove whole fins. Nanosheet width can instead be adjusted continuously within the process’s design rules. Wider sheets increase drive current, while narrower sheets reduce capacitance at the cost of drive current. Intel 18A uses stacks of four nanosheets each and varies their widths across logic and SRAM. At the process level, adding more sheets to each stack increases effective channel width and drive current, but complicates fabrication. RibbonFET vs MBCFET Samsung began GAAFET production in 2022 with SF3E, following with SF3 and now SF2. Its ‘MBCFET’ provides a useful structural comparison with Intel’s first RibbonFET implementation. [17] STEEL is digging deeper into SF2, used in the Exynos 2600, and TSMC’s GAAFET N2, used in Apple’s A20 Pro, in upcoming newsletter articles. We’re throwing some teasers on X. Let’s compare Samsung SF2’s MBCFET with Intel 18A’s RibbonFET. Subscribe Even to the untrained eye, Intel’s extra nanosheet is obvious. Intel stacks four ribbons to Samsung’s three. Samsung’s sheets are much wider in these fields, so both sheet count and width matter to the available channel perimeter. Sheet width also changes which silicon surfaces carry current. On conventional (001) silicon, wide nanosheets emphasize the broad top and bottom surfaces, favoring electron transport; the larger sidewall contribution in a narrow sheet favors hole transport. Thinner sheets improve gate control but increase confinement and scattering. This makes width and thickness part of the NMOS/PMOS balance, alongside strain and threshold voltage. [18], [19] GAAFET designs like 18A use different work-function-metal (WFM) stacks for NMOS and PMOS. Around each ribbon, a thin SiOx interfacial layer separates the silicon channel from the HfOx high-k dielectric, with La providing dipole tuning and the WFM wrapping the dielectric. NMOS uses a TiAl-based stack, while PMOS uses TiN WFM. W fills the remaining gate trench, providing a lower-resistivity path where the work-function layers are no longer needed. In this field, the PMOS stacks leave room for W between ribbons, while the NMOS stacks occupy more of those gaps. A silicon-based dielectric marks the P/N boundary, allowing the PMOS and NMOS gates, sharing the same gate trench, to be processed sequentially. Fast logic paths, retention circuits, and SRAM need a family of threshold options. Changing threshold without substantially changing device dimensions, capacitance or fabrication complexity is valuable. FinFET processes typically use different work-function-metal stacks. In a four-ribbon GAA stack, the narrow sheet-to-sheet gap limits how much WFM can fit around each channel. La in the gate dielectric creates interfacial dipoles at the SiOx/HfOx boundary, shifting effective work function and tuning threshold voltage. This gives Intel another control alongside its NMOS and PMOS WFM stacks. Low-threshold devices improve critical-path drive; higher thresholds reduce leakage elsewhere. Dipole tuning is especially useful in GAA because it changes threshold without consuming the narrow intersheet gap with thicker WFM. Precise control of La incorporation, diffusion and interface quality has long been a challenge, limiting viability in high volume production but is now seen from every leading-edge foundry. Intel’s patent describes depositing a dipole-forming oxide above HfOx and annealing it toward the interfacial oxide before completing the work-function and fill metals. This separates threshold tuning from the space available for metal. Newer research addresses the thermal cost: imec’s 2026 dipole-middle research inserts the shifter between two HfOx depositions, shortening the diffusion path while protecting SiOx during patterning. [20], [21]Matched-cut EDS, Intel 18A (left) vs. Samsung SF2 (right). Intel retains raised source/drain epi beneath its contacts, while Samsung recesses W deep into the epi to form a V-shaped Ti-lined interface. The deeper contact increases metal-to-semiconductor area and shortens the current path from the lower sheets, reducing contact and spreading resistance. It also removes epi volume and brings the contact etch closer to the channel ends. Retaining more epi preserves the material available for strain transfer, especially from SiGe into PMOS. These geometries balance contact access against stress engineering and etch margin. [22], [23] Samsung stacks three sheets to Intel’s four ribbons, and both processes use sheet width to tune drive strength. In our Samsung cross-sections, widths range roughly from 19 to 30 nm in the NPU rows and 37 to 50 nm in the CU cell. The Samsung nanosheets taper, with the widest sheet at the bottom and the narrowest at the top. Both processes use HfOx gate dielectric and Ti-based work-function stacks, with Al in the NMOS stack. In the Samsung devices shown here, the dielectric and WFM occupy the intersheet gaps, leaving W above the top sheet. Intel’s PMOS stack leaves more room between ribbons, and W fills those gaps while the thicker NMOS stack leaves W mainly in the upper trench. Gate-stack EDS maps. The W between Intel’s PMOS ribbons provides a conductive path close to the lower gates. Where WFM fills the entire gap, the gate still surrounds the channel, but voltage reaches it through the more resistive work-function films. Thinner WFM and dipole tuning preserve room for low-resistivity fill; Mo and Ru are alternative fill metals being developed for further scaling. [24] A masked, sequential WFM flow explains the different gate heights and inter-nanosheet fill. The proposed sequence below shows how separate NMOS and PMOS work-function steps produce that geometry. Enabled by the BSPDN process, Intel replaces the dense-logic silicon subfin with dielectric, removing the parasitic conduction path below the ribbons and reducing substrate-related capacitance. A retained silicon body as in classical, non-SOI, planar and FinFET designs needs junction and punchthrough-stop engineering to suppress leakage. Dielectric isolation makes that leakage less sensitive to the subfin doping profile but adds removal and fill steps. It also weakens the direct thermal path through silicon, making the contacts, metal stacks and package more important for heat extraction. [24], [26] Fluorine is concentrated around selected Intel device structures in the maps. WF6 is a standard precursor for W nucleation and fill, while barrier films protect adjacent dielectrics from fluorine attack. Low-fluorine W processes reduce the residual-F burden. Chloride-based precursors avoid introducing F during W deposition, but require control of chlorine attack, nucleation and fill quality. The integration target is a continuous, low-resistance W path with a thin protective liner and minimal chemical damage to the surrounding stack. [20], [27], [28] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. We measured cell height, gate pitch, metal geometry, and ribbon dimensions at the XTEM sites shown below. The tables group these dimensions by site and device polarity. Our “sheet cuts” cross the silicon channel and show the ribbons end-on. “gate cuts” run along the channel through successive gates. The 18A logic cell dimensions point to a five-track logic library while the N3E and Intel 3 cell dimensions evidence a seven-track logic library. The DDR-PHY uses wider M0 wires and much larger spacing than core logic. That trades routing density for lower wire resistance and weaker coupling between neighboring nets. The geometry suits the current delivery and coupling requirements of analog, clock, and I/O circuitry. PowerVia lets 18A combine a compact cell height with wider M0 geometry by moving the main power rails off the signal-routing tracks. That relaxes local wire scaling while preserving a small cell footprint. Cell height and gate pitch set the geometric density; pin access and routability determine how much of it a real block can use. [29] The biggest takeaway from our gate-pitch measurements is that Intel 18A compute logic and TSMC N3E GPU logic have similar density in the Bohr representative-cell model. The 18A example is 18.6% denser than the Intel 3 GPU example. Gate pitches are nearly identical across the three sites, so cell height drives most of the difference. The Bohr model combines a four-transistor NAND2 spanning three gate pitches and a 32-transistor scan flip-flop (SFF) spanning nineteen pitches, weighting their densities 60:40. The sensitivity column shows how independently changing cell height and gate pitch by ±1 nm changes the result. This compares representative cell geometries; whole-die density also depends on cell mix and placement. The 18A P-core gives M0 substantially more metal cross section than the N3E vector engine. Treating each profile as a trapezoid gives 2.63 times the area per line and 1.84 times the area after normalization by routing pitch. The larger section reduces the geometric contribution to line resistance and lowers current density for a given current. Taller and wider wires also add capacitance, so circuit delay depends on the balance of resistance and capacitance. The DDR-PHY has less metal area per routing width than the 18A core fields, while remaining above N3E. [30] Area = height × (top CD + bottom CD) / 2, including liners. Area/pitch normalizes by routing width. Taper is the symmetric sidewall angle from vertical, with the largest angle belonging to the DDR-PHY. Compute tile The measurements show how ribbon dimensions and gate-stack geometry vary across the compute tile and between NMOS and PMOS to balance channel drive, gate load and the space needed for the dielectric/WFM stack across logic, SRAM and the DDR-PHY. Width mainly changes available channel perimeter; thickness also changes electrostatic control and carrier confinement. Gate-stack thickness then determines the space left for low-resistivity fill P-core and LP E-core logic Both the P-core and LP E-core use multiple nanosheet widths. Widths are measured on high-magnification XTEMs while wider-field images demonstrate additional width choices within the LP E-core. Multiple widths are expected even within an LP E-core. Timing-critical paths, buffers and cells with different fanout need different drive strengths. The lower-magnification fields show this width diversity beyond the sites quantified in the table. L2 and L3 SRAM GAA gives SRAM designers another way to balance the pull-up (PU), pass-gate (PG), and pull-down (PD) transistors. FinFET bitcells set device strength through fin count while GAA adds nanosheet width as a sizing knob. In a 6T SRAM cell, a strong pull-down relative to the pass-gate limits read disturbance, while a strong pass-gate relative to the pull-up improves writability. During a write, the pass-gate and write driver pull the node storing “1” below the inverter trip point. During a read, the pull-down holds the node storing “0” low. Bias, threshold voltage, mismatch and assist circuitry set the remaining margin. FinFET high-current cells commonly use a PU:PG:PD fin-count pattern of 1:2:2, a device-sizing ratio rather than a current ratio. Ribbon width lets Intel balance SRAM strengths without adding whole fins. The L2 cell uses its narrowest ribbons for PU and widest for PD, improving writability and read stability respectively. Intel’s disclosed HCC operates without assist; its denser HDC uses negative-bitline write assist. Pulling the selected bitline briefly below ground increases pass-gate overdrive so it can overpower the pull-up at lower supply voltage. That buys density and low voltage writability at the cost of boosting circuitry, switching energy, and additional voltage stress that must be controlled. [31], [32] Four rectangular ribbons give the perimeter = 8 × (width + thickness), before corner rounding. PG/PU is 1.49 and PD/PG is 1.16. The L3 structures closely resemble L2 in layout and cell height. Fewer L3 nanosheet widths are tabulated because fewer high-magnification images were available. DDR PHY The DDR-PHY trades density for controlled analog behavior and reliable off-chip signaling. It contains drivers, receivers, delay circuits, and calibration logic that set drive strength, sampling time, and voltage margin. Repeated four-sheet devices with similar widths fit the use of regular transistor units for matching and programmable drive. Its wider local wiring provides room for current delivery and separation of sensitive signals, while consuming more area than a dense core-logic grid. The layout serves the memory channel’s electrical requirements as well as digital logic density. [33] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Intel 3 GPU devices Vector engine logic Intel 3’s XVE logic uses two-fin PMOS and NMOS devices with power rails in M0. Its cell height and M0 pitch give a seven-track geometry, two tracks more than the 18A logic. One-fin groups also appear among the two-fin devices. Intel 3 L2 SRAM The Intel 3 L2 SRAM uses the familiar HCC sizing pattern: one PU fin, two PG fins, and two PD fins. N3E GPU devices Vector engine logic The N3E XVE field contains repeated two-fin devices with seven-track cell geometry. N3E remains a FinFET process, giving Panther Lake a direct FinFET-to-RibbonFET comparison. N3E L2 SRAM The N3E L2 SRAM uses the same PU:PG:PD fin-count pattern of 1:2:2. Panther Lake-U follows Lunar Lake’s floorplan quite closely. Both pair 4 P-cores with 4 LP E-cores and NPU, media and display engines in similar locations. Lunar Lake also uses Xe2, the direct predecessor to Panther Lake’s Xe3 GPU. This makes Lunar Lake the most direct basis for our comparisons. Arrow Lake differs in core count and uses the older Xe-LPG GPU architecture, so we only use it where it offers a more direct component-level comparison. Compute tile Panther Lake compute-tile floorplans remain sparse even months after launch. Intel 18A’s backside metal and dielectric stack must be removed without damaging the underlying structures before a clean transistor-level floorplan can be imaged. Most published die shots hide or heavily process the background, but we are quite proud of the die shot we achieved and are excited to show the work we have done. We measured the areas of the key components on the compute tile and compared them with their Lunar Lake predecessors on TSMC N3B. These help us to capture changes in block area and compare the two chips across process nodes and designs. Our total tile areas exclude the scribe-line area. The compute-plus-GPU subtotal below uses the PTL-U compute tile and GT1 GPU; it excludes the I/O tile and passive base. Individual block areas use the boundaries marked on the floorplans The compute-plus-GPU row is recomputed from the displayed PTL-U and GT1 areas. Component rows use their stated per-region counts and are not an additive partition of the whole tile. The P-core area remains almost unchanged between Lunar Lake and Panther Lake, despite L2 capacity increasing from 2.5 MiB to 3 MiB. Arrow Lake uses the same Lion Cove core as Lunar Lake but also has a 3 MiB L2. Cougar Cove fits 20% more L2 into the same P-core area. The larger private cache keeps more of each core’s working set close to its execution units, reducing access to shared L3 and DRAM. Extra capacity adds storage leakage and lookup energy, so designers balance it against avoided lower-level accesses. The shared P-core L3 cache also shrank by 14.8%. [2] Cougar Cove combines a similar footprint with Intel’s reported power-efficiency improvements. RibbonFET’s tighter channel control reduces leakage, while PowerVia reduces supply droop and allows tighter voltage guardbands. [1] Darkmont’s four-core LP E-core cluster is 5.0% smaller than Skymont’s on Lunar Lake, with most of the reduction in its L2 regions. The 1 MiB region shrank by 8.4% and the 1.5 MiB region by 14.9%. The tag arrays also use one fewer visible row. Tags identify which memory addresses the data array holds, so rearranging them changes the cache’s layout and wiring without requiring less data capacity. [2] The LP E-cores share one L2. This pools capacity and avoids duplicating all the cache machinery, but the four cores contend for its banks and bandwidth. Their separate cluster also keeps light work away from the performance cluster and its L3, allowing that larger domain to sleep. [1], [2] Cache area includes more than the storage cells. Tags identify each line, decoders select rows, sense amplifiers read the small bitline signal, and wires connect to the banks. Splitting an array into smaller sections shortens wordlines and bitlines, improving access speed, but duplicates peripheral circuits. Panther Lake’s smaller cache regions therefore reflect the complete memory implementation, including how much of each region is devoted to storage. [34] Unlike Meteor Lake and Arrow Lake, Panther Lake has no separate SoC tile. The NPU, LP E-cores, memory controllers, PHYs, media and display engines now share the compute tile. This removes an active die and keeps CPU memory traffic on one die. The cost is moving PHY and I/O-related circuitry onto 18A: drivers, receivers and analog circuits must still meet external voltage, loading and signal-integrity requirements, so their area does not shrink like dense digital logic. [1], [2] The biggest shrink comes from the NPU, which occupies 36.9% less area. NPU 5 consolidates the same total INT8 MAC count into half as many neural compute engines. Each of the three NCEs has a larger MAC array to make the complete NCE envelope 22.6% larger than an NPU 4 engine. Consolidation also halves the number of scratchpads and SHAVE DSPs, from 12 to 6. The MAC array handles matrix multiplication and convolution, while SHAVE executes vector and custom operations that fit the array poorly. [1], [2], [35] The paired floorplans identify each NCE envelope and its scratchpad, MAC, and SHAVE regions. Each measured MAC polygon is counted once per NCE in the area accounting below. The scratchpads store weights, activations, and intermediate results near the MAC arrays, allowing repeated use without fetching them again from DRAM. Halving their number delivers the largest measured area saving but leaves less local storage for the same total MAC count. Layers that no longer fit locally require smaller working tiles or more transfers of intermediate data. The benefit depends on keeping the enlarged arrays busy while managing that tighter storage budget. [36] NPU 5 also adds native FP8. Using half the operand width of FP16 reduces storage and transfer demand, helping workloads fit the smaller local memory budget. Lower precision and format-dependent range make scaling and model validation part of deployment. Hardware activation functions further reduce work that would otherwise occupy the programmable DSPs. [1], [2] Microsoft requires an NPU to deliver at least 40 TOPS for Copilot+ PCs. Both Lunar Lake and Panther Lake meet this threshold, but Panther Lake uses significantly less silicon. GPU tiles Panther Lake is Intel’s first product with Xe3, its latest GPU architecture. It offers two different GPU tiles: a smaller GT1 tile with 4 Xe3 cores on Intel 3 and a larger GT2 tile with 12 Xe3 cores on TSMC N3E. Panther Lake allows us to compare the same GPU architecture across both Intel 3 and TSMC N3E. Wildcat Lake adds a third Xe3 implementation on Intel 18A. A future newsletter will detail Xe3 and its implementation differences across all three process nodes. GT2 scales Xe3 to a different physical layout, with render slices arranged vertically instead of GT1’s horizontal arrangement. Slice placement sets the distances to shared cache banks and the D2D interface. Those wires consume area and add delay, so scaling the number of Xe cores also requires a new balance of cache placement, routing and timing. [1] What’s immediately obvious is that the GT2 tile on TSMC N3E has much smaller Xe cores than GT1. These block areas include logic, caches, and routing. An Xe core on the GT1 tile is ~69% larger than one on Lunar Lake, and ~55% larger than one on GT2. Intel 3 therefore uses substantially more area per Xe core. The block-area gap exceeds the measured logic and SRAM density gaps, bringing routing, timing targets, cell mix, and floorplan allocation into the comparison. The measured vector/matrix engine region is almost unchanged between Lunar Lake and Panther Lake’s GT2 tile. Xe3 retains eight 512-bit vector engines and eight 2048-bit XMX engines per core. Its gains also come from feeding those engines more effectively: more resident threads hide stalls, and variable register allocation lets shaders trade registers per thread against the number of threads kept active. [1] The shared L1/SLM capacity increased by 33% from 192 KiB to 256 KiB, while its area increased only 5%, raising effective density by 27%. L1 retains reused cache lines, while software-managed SLM lets a thread group share data locally. Both reduce traffic to more distant memory. Allocating more SLM per group can also limit how many groups reside on a core at once. [1], [37] The GT1 tile carries 4 MiB of L2 against 16 MiB on the GT2 tile. GT1 divides its L2 cache into four 1 MiB banks, while GT2 uses eight 2 MiB banks. Each bank contains 128 macros, but each N3E macro stores 16 KiB, twice the Intel 3 macro’s 8 KiB capacity. The N3E macro is only 54% larger while holding twice as many bits, giving it 30% higher density: ~23.7 Mbit/mm² versus 18.3 Mbit/mm². Including bank-level circuitry, the gap widens to ~16.9 Mbit/mm² on GT2 versus ~10.4 Mbit/mm² on GT1. GT2 gains density with its macros storing more bits per unit area, and those macros occupy more of each cache bank. Larger macros spread decoder and sense-amplifier overhead across more storage, while a more compact bank layout reduces the share spent on control and routing. The compromise is longer wordlines and bitlines that carry more capacitance. [34] I/O tile Panther Lake uses two I/O tile variants, both fabricated on TSMC N6. The smaller one provides 4 PCIe 5.0 and 8 PCIe 4.0 lanes and serves lower-tier systems as well as those without a discrete GPU, while the larger one adds 8 PCIe 5.0 lanes, bringing the total to 20 lanes, for discrete-GPU connectivity. Panther Lake SKUs with the larger 10- or 12-Xe GPUs use the smaller I/O tile. [38] The smaller I/O tile adds a PCIe 4.0 block and a Thunderbolt block to Lunar Lake’s I/O layout, providing four additional PCIe 4.0 lanes and another Thunderbolt 4 port. Its repeated N6 blocks retain nearly identical areas and layouts. Reusing these proven PHYs and controllers avoids porting and requalifying external interfaces on 18A, where faster digital logic offers less benefit to circuits constrained by the off-chip link. [38] SemiAnalysis’s teardown lab (STEEL) dives deep into the world’s advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. We’re hiring technical experts from system to transistor and everywhere in between. Check out our Careers page. Panther Lake offers scalability and modularity through its disaggregated packaging that partition compute, GPU, and I/O silicon into separate tiles allowing for a suite of tile configurations. This partitioning makes the package part of Intel’s node economics as it determines how much leading-edge wafer area each product consumes, which functions can remain on other processes, and how much configuration freedom Intel can offer from a shared set of tiles. Furthermore, fabricating the compute and GPU tiles separately confines the new 18A process to the compute tile and allows graphics and I/O to use other, more established, and more cost-effective processes. For Panther Lake, the GPU and I/O tiles are assembled alongside the compute tile on a passive silicon base using Foveros-S. Intel’s current technology brief lists a nominal 36 µm pitch for Foveros-S. Through-silicon vias (TSVs) in the base connect the fine wiring above to the larger package connections below. The functional tiles sit side by side on that passive base in a 2.5D configuration. [39] Our cross-section through the compute and GPU tiles shows the package’s wiring hierarchy. Microbumps connect each active tile to the passive silicon base; its fine redistribution layer (RDL) carries the short, dense tile-to-tile links. TSVs carry connections through the base to the package substrate, which fans them out to the much coarser motherboard solder joints. The base supplies interconnect, while computation remains in the active tiles above it. [39] At the compute-tile edge, the higher-magnification inset shows a local microbump spacing of approximately 25.24 µm and a feature width of 12.33 µm. These local spacings are finer than Intel’s nominal Foveros-S value. The X-ray fields further confirm tighter neighboring bumps, consistent across every die-to-die area found on each tile. Additional X-ray analysis is offered after the paywall. Putting the memory controller beside the CPU removes the D2D transfer that CPU memory requests required in Meteor Lake and Arrow Lake. This avoids the extra transmitter, receiver, and link traversal, saving interface energy and latency. Panther Lake’s separate GPU still crosses a D2D link to reach DRAM, so its larger local caches also help contain package traffic. [1], [40] Smaller dies are less likely to contain a random fatal defect, and screening them before assembly prevents one bad tile from consuming a complete package of good silicon. Reuse also spreads design and qualification work across more products. Against those gains, Intel pays for the passive base, D2D circuits, extra bonding and test steps, and losses during assembly. Cost per working product across the portfolio captures the combined effect of wafer yield, reuse, test, and assembly. [29] Wildcat Lake packaging Intel launched Core Series 3, formerly Wildcat Lake, on 16 April 2026 for value mobile and edge systems. Wildcat Lake keeps 18A but removes the passive base and combines more functions on one die to simplify the package. The two products therefore reveal two distinct ways to commercialize the same leading-edge process. [41] Wildcat Lake’s 18A die combines up to two Cougar Cove P-cores, four Darkmont LP E-cores, two Xe3 cores and a smaller NPU. A separate platform-controller die supplies I/O, connected through UCIe, Intel’s first processor implementation of the standard. Consolidating graphics remove a tile boundary and the passive base, reducing assembly complexity for a modest-bandwidth value product. It also ties CPU and graphics scaling to the same die, giving up Panther Lake’s ability to swap in a much larger GPU. [42], [43] In July 2021, Intel CEO Pat Gelsinger set out an ambitious process roadmap aimed at regaining performance leadership by 2025, later described as five nodes in four years. Five years and one CEO later, Intel’s comeback story is not as unambiguously positive as Pat may have hoped. [44], [45] Intel once set the pace for process technology, bringing high-k metal gate technology and FinFETs into volume production years ahead of the rest of the industry. Its 22 nm FinFET process reached consumers with Ivy Bridge in 2012. [46] Intel’s integrated device manufacturing (IDM) model allowed its architects and process engineers to co-optimize products and processes. Starting with Sandy Bridge, Intel dominated x86, while AMD struggled with Bulldozer. That lead faltered at 14 nm and broke at 10 nm. Intel targeted a massive 2.7× density increase, but the node arrived years late and required several revisions before it could support Intel’s full lineup. This delay forced Intel to stretch 14 nm across six generations, while TSMC moved ahead in process technology and AMD recovered in x86. By 2019, Intel was still shipping 14 nm across most of its product stack, with its 10 nm client ramp focused on Ice Lake mobile processors. Meanwhile, TSMC was shipping N7 and N7+, and AMD’s Zen 2 compute chiplets used N7 to raise core counts and improve efficiency. Intel’s process failures were central to its decline, but unsound business decisions furthered their downward slide. Product delays compounded product mistakes, pushing client, server, and FPGA roadmaps off schedule. Several attempts to enter AI (Nervana and Gaudi) and networking (Tofino) also failed to establish lasting businesses. Intel’s recovery has focused on consumer CPUs and advanced packaging. Tiger Lake, Alder Lake, Lunar Lake and now Panther Lake have restored Intel’s consumer roadmap. On the process side, Intel 4 shipped with Meteor Lake, Intel 3 with Granite Rapids and Sierra Forest, and Intel 18A with Panther Lake. Intel has also made advanced packaging part of its foundry offering. However, Intel is still playing catch-up in servers. Several Xeon generations arrived years late and trailed contemporary AMD and Arm server CPUs in performance, efficiency, and core count. The process roadmap is back, but Intel does not hold the same process-technology leadership position it held prior to 10 nm. The introduction of gate-all-around nanosheets and backside power delivery are two of the biggest changes to transistor integration in a decade. Intel took on both changes at once: 18A paired its first RibbonFET with PowerVia in Panther Lake. Panther Lake is a substantial manufacturing milestone. Our cross-sections show how RibbonFET and PowerVia reshape local contacts and wiring, while the floorplans show where architectural consolidation and process choices save area. A sustained competitive lead depends on product performance, cost, yield, and the next implementation. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page.. 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Australia: NSW Health warns against handling bats due to lyssavirus
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Viewpoint: Europe needs a new scientific contract
The White House's new science strategy should be required reading in the Berlaymont and every European capital.Not because Europe should copy it. Parts of it should concern Europeans deeply. But because it asks the question Europe has so far avoided while steadily losing ground in the global race for technological leadership.Europe already possesses many of the world's finest universities, scientists and research-intensive companies. It produces world-leading research in fields ranging from quantum technologies and biotechnology to climate science. Yet time and again Europe generates the scientific breakthroughs while others build the companies, industries and strategic advantages around them, particularly in digital technologies. Increasingly, we find ourselves regulating technologies whose underlying capabilities were developed elsewhere.This is not primarily a scientific failure. It is an institutional one.The settlement that shaped modern science policy emerged after the Second World War. In Science, the Endless Frontier, Vannevar Bush argued that governments should invest in fundamental research while protecting scientists from political direction. Public investment was justified precisely because no government, university or company could predict where the next transformative discovery would emerge.That scientific contract served liberal democracies extraordinarily well. It underpinned decades of advances in medicine, computing, energy and communications, but the world for which it was designed no longer exists.Artificial intelligence is transforming not only technology but the production of knowledge itself. Advanced chips, computing power, data and scientific instruments have become strategic assets. Scientific knowledge now diffuses globally almost instantly. Competitive advantage increasingly lies not in making discoveries first, but in possessing the infrastructure, capital, engineering capability and institutions required to translate those ideas into products, industries and strategic advantage.The old boundaries between science, industrial policy, national security and geopolitics have largely disappeared. Dual-use technologies now underpin both economic power and military deterrence.The US has recognised this shift. In July, the White House published Science: A New Golden Age, a comprehensive attempt to rethink the relationship between science and national power. The report builds on Bush's legacy, but departs from his framework in important ways. Science is no longer treated simply as the source of future discoveries. It is presented as the foundation of economic resilience, technological leadership and national security. AI, advanced infrastructure and the capacity to build become as important as discovery itself.Yet the report also reveals a striking paradox. The same administration calling for “a new golden age” of US science has simultaneously proposed deep cuts to the federal research enterprise while expanding political influence over the allocation of public research funding. Europe should therefore distinguish between the report's diagnosis and its prescription. The diagnosis, that science has become a strategic asset, is compelling. But the prescription is self-defeating. Long-term technological leadership depends on strong universities, academic freedom and the institutional autonomy that makes scientific discovery possible. This distinction matters. Bush's achievement was never simply to make science serve national strength. It was to establish a division of labour in which governments invested in research without attempting to direct discovery itself. Scientific breakthroughs emerge precisely because researchers retain the freedom to pursue questions whose value cannot yet be demonstrated and whose conclusions cannot be anticipated.Neither China, nor the USAs science becomes more strategically important, the temptation to politicise it inevitably grows. But scientific freedom is not an obstacle to technological leadership, it is an essential precondition.China represents the opposite model. For decades it has integrated science, manufacturing, infrastructure and industrial policy into a single national strategy. Its ability to mobilise resources around critical technologies is formidable. But it does so within an authoritarian system where scientific priorities are increasingly inseparable from political power.Europe should imitate neither model. It should learn from the strategic ambition of the US without importing its growing politicisation of science. And it should learn from China's capacity to build without adopting its concentration of power.Instead, Europe needs a scientific contract of its own. Bush's scientific contract protected the freedom to discover because the defining challenge of the 20th century was producing new knowledge. Europe's next scientific contract must preserve that freedom while ensuring that scientific discoveries can be converted into technological, industrial and strategic capability. Because in a transactional world, Europe's freedom to shape its own future depends on its capacity to build it.Related articlesThe US ‘golden age’ science strategy: what Europeans need to knowEuropean researchers sound the alarm that Trump rule changes will hit cooperationNIH turmoil risks reciprocal EU-US access to health research fundingThis does not mean subordinating free science to competitiveness or industrial policy. On the contrary. Scientific autonomy remains the first principle of Europe's next scientific contract. Governments should not direct scientific discovery. Their responsibility is to ensure that Europe's scientific, industrial, financial and regulatory institutions work together rather than in isolation.Meeting that responsibility requires far more than research funding. European researchers need access to world-class computing infrastructure, advanced laboratories, shared datasets and scientific facilities. Innovative companies need patient capital, testing environments and a genuine single market in which they can scale without facing 27 different regulatory regimes. Public procurement must evolve from purchasing existing technologies to creating markets for new ones. Regulators must become partners in experimentation rather than guardians of yesterday's rules.A connecting architectureEurope does not need to invent the Defense Advanced Research Projects Agency (Darpa) model from scratch. Britain's Aria, Germany's Sprind and Wellcome Leap already show that Europe can build institutions capable of taking high-risk, mission-oriented bets while preserving democratic accountability. The challenge now is not to create more isolated initiatives, but to connect them to Europe's broader scientific, industrial and financial system so that breakthrough discoveries can scale.Above all, Europe must stop treating research, innovation, industrial policy, finance and security as separate policy domains. The challenge is no longer to create excellent institutions in each of these fields, but to make them work as one European innovation system. Europe's strength will increasingly depend not on excellence within institutions, but on excellence across them.Europe's ambition should be neither to imitate the US nor to emulate China. It should demonstrate that scientific freedom, democratic legitimacy and technological capability are not competing objectives, but mutually reinforcing strengths. In an age of geopolitical rivalry, Europe's greatest advantage may ultimately be its ability to attract the world's best talent by combining scientific freedom, democratic openness and technological ambition.Bush's scientific contract helped define the 20th century because it protected the freedom to discover. Europe's challenge is not to abandon that achievement but to extend it. The defining task of Europe's next scientific contract is to preserve the freedom to discover while building Europe's capacity to translate scientific discovery into technological power.Kaare Nielsen is founder of Pomus, a Danish think tank on science and innovation.
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The first aired episode of “Star Trek,” entitled “The Man Trap,” premiered on September 8, 1966 — 60 years ago today. I’m actually editing a political science fiction issue of The Forum right now, and it’s prompted to me think a lot about the ways that Trek deals with politics and government and what it’s offered us as commentary. The @smotus report is a reader-supported publication. To support this work, please become a paid subscriber. Subscribe The original TV series ran from 1966 to 1969. It had a loyal but modest following, but the audience grew substantially with the series in syndication for years after that. The franchise developed its first motion picture in 1979, followed by five sequels, and then a whole other series of films built around the “Next Generation” series that first aired in 1987. In recent decades, several more TV series have built up around it, including the current “Strange New Worlds,” now in its fourth season. Throughout the past six decades, the franchise has offered us a good many insights into US politics and international relations, although often disguised as science fiction yarns. The original series was largely a Cold War fable, with the United Federation of Planets (a stand-in for the US) perpetually at odds with the Klingon Empire (a stand-in for the USSR). The “Let That Be Your Last Battlefield” episode (1969) posited a planet divided into two races, largely indistinguishable to outsiders, but nonetheless constituting a brutal racial hierarchy. “Patterns of Force” (1968) showed a struggling planet where the leader had attempted to construct a benevolent dictatorship — literally Nazism without bigotry — and found that authoritarianism could not exist apart from hierarchy and oppression. (Relatedly, I’d put “Star Trek VI: The Undiscovered Country,” high on a list of dad films about the end of the Cold War, near “The Hunt for Red October.”) Get 20% off for 1 year Indeed, the original series itself was something of a political statement, with a multi-racial crew running the Enterprise, a diverse and largely peaceful Federation mostly free from want and oppression, and protected by Starfleet, an armed force whose scientific mission was at least as important as its military one. Famously, when Nichelle Nichols wanted to walk away from the role of Uhura on the original series, none other than Martin Luther King, Jr. met with her and urged her to remain on the show, discussing the importance of viewers seeing an intelligent Black woman as part of the command team three centuries hence. Later series in the Trek franchise offered a good deal of political commentary on their own, but probably none as explicitly and incisively as “Deep Space Nine,” which ran from 1993 to 1999. The episodes surrounding the Dominion War, especially the “In The Pale Moonlight” (1998), showed the compromises, sacrifices, and moral rot associated with winning even a just war — probably better than any series would until “Andor” (2022-25). In “Far Beyond The Stars” (1998), Captain Benjamin Sisko is somehow transplanted to the role of a science fiction writer in 1950s New York. The writer is frequently sidelined and his ideas stolen because publishers don’t want to credit a Black writer. Several series have depicted the secretive Section 31 — an unacknowledged black ops security force operating within Starfleet. These episodes often end up using Section 31 as a foil to show the dangers of a lawless group within a lawful society, even (especially) when that group posits itself as essential for everyone else’s freedom to continue. The current “Strange New Worlds” has played with a few political themes. I found the first two seasons of this show among the best that the Trek franchise has produced in decades, but this season and the last have really been struggling for ideas. Yet one interesting thread is the idea that the diplomatic and enlightened leadership style of Captain Christopher Pike will not work in all situations. “A Quality of Mercy” (2022), which I wrote about here, puts Pike in the middle of a battle with a Romulan vessel in an alternate timeline, and finds that Pike’s conciliatory style would actually make a lengthy and deadly war more likely, while a quick and more violent approach might have prevented the war. This season’s opener, “Valles Marineris,” shows a pre-lightspeed civilization locked in a war to the death with a neighboring planet. The idea of an alliance or a federation hasn’t even occurred to them — their ship’s commander is curious but doesn’t see it as an option. For a franchise as political as “Star Trek,” one thing we almost never see is the government. We get occasional glimpses of Starfleet’s council — mostly uniformed people at a rectangular table — but almost no sense of how the Federation is governed. Are there elections? Who is in the legislature? How much power does the president have? What kind of factional divisions do they wrestle with and how? The shows and films are pretty silent on this. We’ve seen a few military tribunals within Starfleet, but little about how civilians deal with crime and injustice. With recent years seeing some of the franchise’s more interesting plot lines and casts, it seems clear that Star Trek is still full of energy and ideas. Given the erosion of American democracy and the reshuffling of the international order, there’s no shortage of material for future shows to comment on. I’m not sure we should toast to 60 more years, but cheers to a show that continues to teach us about ourselves. Share
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