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World News in Brief: Aid for Ethiopia, Abyei drone strikes condemned, extreme heat and newborn health
The World Health Organization (WHO) is scaling up emergency health response operations across Afar, Amhara and Tigray in Ethiopia to address growing humanitarian and health needs resulting from ongoing hostilities.
Summit in Samarkand, a boon for child wellbeing and health
Representatives from across the international community are meeting in Samarkand, Uzbekistan, to ensure that children everywhere can thrive in a world marred by war, climate chaos and other fundamental challenges.
Science on the Space Station with NASA Astronaut Jessica Watkins
NASA astronaut and Expedition 75 flight engineer Jessica Watkins works inside the Kibo laboratory module's Life Science Glovebox on Oct. 9, 2026, safely
WHO supports Nigeria after first Ebola case confirmed
The World Health Organization (WHO) is assisting Nigeria following confirmation of the first case of Ebola Bundibugyo virus disease in the country.
WHO scales up Ebola readiness in 22 countries across three continents
The World Health Organization (WHO) is strengthening Ebola preparedness amid conflict and displacement affecting millions of lives in a region that spans parts of Africa, Asia and Europe.
Ukraine: Critical health supplies destroyed in ongoing Russian attacks
Ongoing and deadly Russian attacks across Ukraine are causing serious healthcare disruption, with more than $1.5 million-worth of medicines and supplies destroyed in four separate strikes on warehouses used by the UN there since July.
WHO urges vigilance after Kenya confirms second Ebola case
The World Health Organization (WHO) continues to support Kenya’s efforts to contain Ebola after a second person tested positive for the Bundibugyo virus, the UN agency’s representative in the country said on Thursday.
SpaceX Dragon Docks with Science, Supplies, and Roll-Out Solar Arrays
At 11 a.m. EDT, the SpaceX Dragon spacecraft docked to the space-facing port of the International Space Station’s Harmony module, delivering more than 6,300 pounds of food, supplies, and equipment for the Expedition 75 crew.
WHO urges faster action to end lead exposure which kills 3.5 million annually
Countries must accelerate efforts to prevent lead exposure, which is estimated to cause more than 3.5 million deaths globally each year and affects hundreds of millions of children, the World Health Organization (WHO) said on Thursday.
Health workers tackle taboos over drinking with new AI tool
A new AI-powered hub for health professionals aims to help identify alcohol-related risks and launch discussions with patients, including the link between drinking and cancer, the World Health Organization (WHO) announced on Wednesday.
WHO calls for urgent health action across the Eastern Mediterranean
The head of the World Health Organization (WHO) has called for promoting, providing and protecting health in the Eastern Mediterranean region, home to some of the world’s top humanitarian crises such as Sudan, Yemen and the Occupied Palestinian Territory.
Sustaining livelihoods amid crisis in Gaza
Nidaa, Hanaa and Hanin have different stories, but share a common thread: the determination to build something of their own and keep it going despite extraordinary challenges facing them in war-ravaged Gaza.
Darfur: Healthcare needs outstrip resources as Security Council extends Sudan sanctions
More than 700,000 displaced people in Tawila, in Sudan’s war-ravaged Darfur region, face severe shortages of healthcare, food, water and protection, the UN World Health Organization (WHO) warned on Thursday as it called for an urgent increase in resources.
JRC science for digital wellbeing
The JRC investigates the implications of digital technologies on people’s health and wellbeing, providing evidence to support EU digital policies. In an era of rapid digital transformation, understanding how technology shapes our well-being is critical.
Critical funding gap threatens health response in Yemen
The World Health Organization (WHO) warned that significantly more resources are required to scale up its response in Yemen amid escalating conflict and rising needs.
WHO releases first global guidelines on child obesity as cases surge
Child and adolescent obesity has quadrupled since 1990, rising from two per cent to around eight per cent of youngsters in the five-to-19 age group, according to the UN’s World Health Organization (WHO).
Global life expectancy bounces back to near pre-pandemic levels, WHO says
People around the world are living longer again, with global life expectancy almost fully recovered from the disruption of the COVID-19 pandemic, the World Health Organization (WHO) said on Friday.
Gambit's Best of New Orleans 2026: Entertainment
Design by Dora Sison / Gambit Best Bounce Artist googletag.cmd.push(function() { googletag.display('ad-1492300'); }); 1. Big Freedia (Instagram: @bigfreedia)2. Ha Sizzle (Instagram: @hasizzlethevoice)3. Subtweet Shawn (Instagram: @subtweetshawn1) Trixie Minx Photo by Sophia Germer / The Times-Picayune Best Burlesque Performer1. Trixie Minx (Instagram: @trixienola)2. Bella Blue (Instagram: @bellablueforever)3. Miss Angie Z (Instagram: @missangiez) Best Casino1. Caesars New Orleans (8 Canal St., 800-427-7247; caesars.com/caesars-new-orleans)2. Treasure Chest Casino (4550 Williams Blvd., Kenner, 504-443-8000; treasurechest.com)3. Boomtown Casino (4132 Peters Road., Harvey, 504-366-7711; boomtownneworleans.com) Best Drag Performer1. Debbie with a D (Instagram: @debbiewithad)2. Katrina Waters (Instagram: @katrinawaters504)3. Laveau Contraire (Instagram: @laveaucontraire) Best Festival (that's still around)1. New Orleans Jazz & Heritage Festival (nojazzfest.com)2. French Quarter Festival (frenchquarterfest.org)3. Hogs For The Cause (hogsfest.org) Best Food Festival1. New Orleans Fried Chicken Festival (friedchickenfestival.com)2. Oak Street Po-Boy Festival (poboyfest.com)3. New Orleans Jazz & Heritage Festival (nojazzfest.com) Tipitina's Photo by Sophia Germer / The Times-Picayune Best Live Music Venue1. Tipitina’s (501 Napoleon Ave., 504-895-8477; tipitinas.com)2. The Broadside (600 N Broad St., 504-766-0871; broadsidenola.com)3. The Fillmore (6 Canal St., 504-881-1555; thefillmorenola.com) Best Live Music Club1. Maple Leaf Bar (8316 Oak St., 504-866-9359; mapleleafbar.com)2. Snug Harbor Jazz Bistro (626 Frenchmen St., 504-949-0696; snugjazz.com)3. Chickie Wah Wah (2828 Canal St., 504-541-2050; chickiewahwah.com)3. Blue Nile (532 Frenchmen St., 504-766-6193; bluenilelive.com) Best Local Blues Artist/Band1. Little Freddie King (littlefreddieking.com)2. Samantha Fish (samanthafish.com)3. Tab Benoit (tabbenoit.com) Best Local Brass Band1. Rebirth Brass Band (rebirthbrassband.com)2. Hot 8 Brass Band (hot8brassband.com)3. The Soul Rebels (thesoulrebels.com) Best Local DJ1. Paul Lakeway (Instagram: @paul_lakeway)2. DJ Soul Sister (Instagram: @djsoulsister)3. ANTWIGADEE! (Instagram: @antwigadee) Best Local Funk Band1. Dumpstaphunk (dumpstaphunk.com)2. Galactic (galacticfunk.com)3. Big Sam's Funky Nation (bigsamsfunkynation.com) Kaye the Beast Provided Photo by Catherine Debuys Best Local Hip-Hop Group/Artist1. Kaye the Beast (Instagram: @kayethebeast)2. La Reezy (Instagram: @lareezymusic)3. Pell (Instagram: @pellyeah) Best Local Movie Theater1. The Broad Theater (636 N. Broad St., 504-218-1008; thebroadtheater.com)2. The Prytania (5339 Prytania St., 504-891-2787; theprytania.com) googletag.cmd.push(function() { googletag.display('ad-1492297'); }); 3. The Prytania Theatre at Canal Place (333 Canal St., 3rd floor, 504-290-2658; theprytania.com) Best Local Music Artist/Band1. Robin Barnes & The Fiya Birds (robinbarnesmusic.com)2. Trombone Shorty (tromboneshorty.com)3. Sweet Crude (sweetcrudeband.com) Best Local Rock Band1. The Revivalists (therevivalists.com)2. Better Than Ezra (betterthanezra.com)3. Cowboy Mouth (cowboymouth.com) Best Wedding Band/ DJ1. The Mixed Nuts (themixednuts.com)2. Bucktown All-Stars (bucktownallstars.com)3. Warm Advice (warmadvice.com) Doreen Ketchens Provided photo Best Local Street Performer1. Doreen Ketchens (doreensjazz.org)2. Jourdan Blue (Instagram: @jourblue)3. Sariyah Idan (ariyahidan.com) Best Local Theater Company1. The Tennessee Williams Theatre Company of New Orleans (504-264-2580; twtheatrenola.com)2. Le Petit Theatre (616 St. Peter St., 504-522-2081; lepetittheatre.com)3. The NOLA Project (504-302-9117; nolaproject.com) Best Local Traditional Jazz Group/Artist1. Preservation Hall Jazz Band (preservationhalljazzband.com)2. Kermit Ruffins (@ruffinsbbq)3. Trombone Shorty (tromboneshorty.com) Best Marching Band1. St. Augustine High School Marching 100 (Instagram: @staugmarching100)2. Edna Karr High School Marching Band (Instagram: @theofficialkarrband)3. The Roots of Music Marching Crusaders (therootsofmusic.org) Best Mardi Gras Parade1. Muses (kreweofmuses.org)2. Iris (kreweofiris.org)3. Endymion (endymion.org) 610 Stompers Photo by Chris Granger / The Times-Picayune Best Mardi Gras Dance Krewe1. 610 Stompers (610stompers.com)2. Amelia EarHawts (aecabinkrewe.com)3. The Jamettes (Instagram: @thejametteskrewe) Best Place to See Burlesque/Drag1. The AllWays Lounge & Cabaret (2240 St. Claude Ave., 504-218-5778; theallwayslounge.net)2. The Original Nite Cap (1300 St. Bernard Ave., 2nd floor, 504-224-2854; Instagram: @originalnitecap)3. The Country Club (634 Louisa St., 504-945-0742; thecountryclubneworleans.com) Best Place to See Comedy1. Sports Drink (1042 Toledano St.; sportsdrink.org)2. The Howlin' Wolf (907 S. Peters St., 504-529-5844; thehowlinwolf.com)3. Big Couch New Orleans (1045 Desire St.; bigcouchnola.com) Best Local Comedian1. Ryan Rogers (ryanrogerscomedy.com)2. Mark Normand (marknormandcomedy.com)3. Cyrus Cooper (Instagram: @cyrusjcooper) Best Strip Club1. The Penthouse Club (727 Iberville St., 504-524-4354; penthouseclubneworleans.com)2. Rick’s Cabaret (315 Bourbon St., 504-524-4222; rickscabaretneworleans.com)3. Larry Flynt's Hustler Club (225 Bourbon St., 504-524-0010; neworleanshustlerclub.com) Best Performing Arts Center1. Jefferson Performing Arts Center (6400 Airline Dr., 504-731-4700; jeffersonpac.com)2. Saenger Theatre (1111 Canal St., 504-525-1052; saengertheatreneworleans.com)3. Mahalia Jackson Theater for the Performing Arts (1419 Basin St., 504-525-1052; mahaliajacksontheater.com) .donate-gambit-article-module-container { text-align: center; padding: 10px; /* background-color: #24da6d; */ background-color: rgb(153, 0, 0); margin-bottom: 20px; } .donate-gambit-article-module-title { font-weight: bold; color: #fff; } .donate-gambit-article-module-copy { color: #fff !important; font-size: 16px; } .donate-gambit-article-module-button { background-color: black; width: 50%; border-color: black; font-size: 16px; } .donate-gambit-article-module-button:hover { background-color: black; } @media only screen and (max-width: 600px) { .donate-gambit-article-module-button { font-size: 14px; width: 100%; } .donate-gambit-article-module-copy { font-size: 14px; } } BECOME A GAMBIT MEMBER AND JOIN OUR KREWE TODAY For more than 40 years, Gambit has covered New Orleans, for New Orleans. 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DRC: Early access to care and oxygen decisive for Ebola patients’ survival
In the Democratic Republic of the Congo (DRC), health workers fighting the country’s largest-ever Ebola outbreak are struggling to overcome critical challenges to patient care, the UN World Health Organization (WHO) warned on Tuesday.
DR Congo Ebola emergency: Calls grow for urgent humanitarian access
Aid teams trying to keep deadly Ebola disease from spreading in the Democratic Republic of the Congo (DRC) are increasingly concerned about ongoing fighting and violence that has forced thousands of people to flee a displacement camp in the vast, resource-rich east of the country.
Intel Panther Lake Teardown, 18A, BSPD, GAAFET, SemiAnalysis STEEL
Panther Lake debuts the first commercial implementation of backside power delivery (BSPDN), introduces Intel’s first iteration of gate-all-around (GAA) transistors, and showcases their advanced packaging capabilities with its Foveros-S assembly. With Panther Lake, Intel’s manufacturing arc has shifted from nebulous roadmaps to shipped silicon, a significant milestone on their long road back to competitive semiconductor manufacturing. To evaluate the extent of Intel’s comeback, we tore down Panther Lake. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Our teardown traces 18A from its four-sheet RibbonFETs (Intel’s marketing name for GAAFETs) and gate stacks through contacts, frontside and backside wiring, and the bonded carrier. We explain how these material and integration choices improve gate control and reduce resistance, while adding capacitance, thermal resistance, and process complexity. Our measurements put Panther Lake’s 18A compute logic and TSMC N3E GPU logic at similar logic density. However, 18A does not lead TSMC N3P, N2 or Samsung SF2 in peak density. Panther Lake’s CPU cores are incremental updates, and the high-end GPU still uses TSMC N3E. Panther Lake assembles one compute tile, one GPU tile, and one I/O tile atop a passive base tile using Intel’s Foveros-S advanced packaging. Both compute tile variants use Intel 18A. The Xe3 GPU options are a 4-core GT1 tile on Intel 3 and a larger 12-core GT2 tile on TSMC N3E. Both I/O tile variants use TSMC N6. [1], [2] Our analysis centers on the PTL-U compute tile, both the 4-core and 12-core GPU tiles, as well as the 12-lane I/O tile. In conventional chips, power and signal are routed through the same frontside metal stack towards the device frontend. Power rails consume scarce routing resources near the transistors, while tall via stacks carry VDD and VSS from the coarse upper wires to local rails. Backside power delivery (BSPD) moves the main power network behind the transistor layer, to the backside, separating it from frontside signal routing. We covered BSPD and its impacts in 2024. [3], [4], [5] Intel’s BSPD implementation, branded as “PowerVia”, routes power through dedicated backside metals to nano-TSVs, which connect those rails to local source/drain (S/D) contacts. Implementing that separation requires Intel to build the interconnect stacks from both sides of the wafer. The frontside comprises the M0-M14 signal stack, while the backside comprises the BM0-BM5 power stack. M0 and BM0 are closest to the transistors. The nano-TSVs connect the two sides, but Intel patterns and etches each via from the front after forming the contacts. A narrow via runs from the side of the contact deep into the silicon substrate. Intel then completes the frontside signal metal stack, bonds the wafer to a carrier, flips it and removes the original substrate until the buried via tips are exposed. The backside metal stack is then deposited directly on the revealed vias. The nano-TSV and backside-via profiles taper in opposite directions because Intel forms them from opposite sides of the wafer. The transistor structures form the FEOL. Local contacts and nano-TSVs connect them to the wiring. M0 begins the frontside interconnect stack. The silicon carrier remains attached above the frontside interconnects. It supports the device wafer during substrate removal and backside processing and remains part of the finished chip’s thermal path. PowerVia removes the main power distribution from the congested frontside metals, routing supply through shorter and wider backside wires. Its lateral landing still occupies area in the standard cell, so it recovers less cell area than a direct backside contact. [3] Nano-TSVs beside the logic devices carry VDD or VSS from the backside power network, while signal connections continue upward through the frontside metals. Backside Interconnects Samsung SF2 data is included for comparison to Panther Lake’s within this article. SF2 is the incumbent GAA foundry node but lacks BSPD, serving as a useful reference to evaluate 18A. A full teardown of Samsung’s S26 products, processed on SF2, will be shared soon.Nanosheet-cut EDS comparison. The PowerVia supply path runs from the backside Cu rails through Mo-lined W nano-TSVs to the local transistor contacts. In this cross section, the tapered connection spans roughly 150 nm from the contact level to BM0. The Ta liner confines Cu and promotes adhesion to the surrounding stack; the AlOₓ etch stop controls the next dielectric etch above the rail. Dielectric beneath the ribbons electrically separates the devices from the backside wiring and removes the conducting silicon body below the channel. [6] AlOₓ serves as an etchstop (ES), enabling endpointing and protecting the underlying layers. Low-volatility aluminum fluoride reaction products resist the fluorinated plasma, allowing a thin AlOₓ film to protect the metal while the surrounding low-k dielectric is removed. [6], [7]. While the BM0 and layers above the M1 lines show double AlOx layers, Our SMIC N+3 teardown showed single AlOₓ layers. SMIC uses a simpler local AlOₓ substack, while the remaining cap and etch sequence provide the required landing protection. So why double layers? The closely spaced AlOₓ doublets provide two protected endpoints in the etch sequence. Intel documents an AlOₓ/SiN/AlOₓ stack that explains the benefit. The main dielectric plasma etch stops on the first AlOₓ film; a selective wet clear opens that film; a second plasma etch removes the intermediate SiN and stops on the second AlOₓ film. The final wet clear exposes the metal landing surface. SiN is the intermediate dielectric in Intel’s published example. [8] The second stop protects the metal through a cap breakthrough. Wide openings can etch faster than narrow ones, and etch depth varies across the wafer. Metal under an early-clearing opening would otherwise be exposed while other openings still need more etching. Staged protection widens the process window and reduces metal erosion, corrosion and void formation. [8] TSMC documents AlN/AlOₓ/SiOC/AlOₓ above Cu, with AlN blocking Cu diffusion, and a simpler AlN/SiOC/AlOₓ variant that omits one AlOx film. [9] Levels with different opening sizes, aspect ratios, pattern densities and cap materials need different etch margins. A double AlOx stop is useful where another protected endpoint justifies the added processing. The extra film adds formation, selective opening and cleaning steps, plus another set of interfaces to control adhesion, moisture, and stress. These blanket films are opened through the existing via pattern, so each film does not require another lithography mask. AlOₓ adds parasitic capacitance when it replaces lower-k dielectric; two thin AlOₓ films can nevertheless contain less AlOₓ than one thick film. Total thickness, placement, and theintermediate dielectric determine the electrical cost. Deposition chemistry also changes AlOx permittivity and residual hydroxyl content, which can oxidize the underlying metal. [7], [8], [10], [11] The backside stack separates into relatively fine BM0-BM2 wiring near the devices and coarser BM3-BM5 power distribution. The largest pitch increase occurs between BM2 and BM3. BM0’s pitch closely matches the logic-row height, fitting local power delivery to the cell rows. Higher levels aggregate current through larger conductors: routing density becomes less important than low resistance and current capacity as the network approaches the package. This hierarchy provides wide power wiring for the power delivery network without consuming scarce frontside signal-routing resources. [3] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Frontside Interconnects Intel 18A combines Mo-lined W contacts and nano-TSVs with a separate backside Cu power network. Samsung SF2 keeps power on the frontside, using Ti-based contact interfaces and Ta-based barriers and Co liners around Cu wiring. In 18A standard-cell rows, backside power rails supply the devices through nano-TSVs within the cells, freeing frontside routing resources. Samsung’s M0 accommodates both power and signal connections. From the device toward M0, the connection runs through a Ti-based S/D interface, W contact fill, a Mo-lined W via, and the Cu M0 wire. Mo supplies a conductive nucleation and adhesion layer for W, replacing the resistive TiN liner used in conventional W integration. This increases the effective conduction volume within the feature while retaining W fill and its established polishing, cleaning and etching processes. Intel’s Mo/W patent describes this integration tradeoff. The nano-TSV uses the same Mo-lined W construction in the backside supply path. [12] The move from TiN to Mo is an incremental change. While a full Co or Mo fill can also reduce the volume lost to liners in very small features, it requires new integration schemes that increase complexity and risk. Cu remains attractive for wider wires due to its low resistance. As wires and vias shrink, the diffusion barrier consumes an increasing fraction of their cross-section. [12], [12], [14] Intel uses Co/Ru liners at M0-M1, Co at M2-M4, and Nb at M5-M9. The lower-level liners help Cu adhere and reduce void formation during trench fills. Applied Materials’ Endura has new thermal control that facilitate wetting process, so the thin film continuity is good enough that good capillary pressure will drive Cu atoms to the via bottom without voiding. Intel’s choice to use Nb is particularly interesting. Intel’s Nb patent describes a conductive diffusion barrier intended to reduce the barrier’s contribution to resistance relative to conventional Ta-based barriers, particularly at via bottoms where all current crosses the barrier. The patent pairs Nb in coarser levels with the option of lower-cost PVD processing. [15], [16] The upper metal layers support thicker barriers formed through physical vapor deposition (PVD) despite its worse coverage and uniformity. Meanwhile, the lower metal layers require thinner barriers deposited through conformal atomic layer deposition (ALD). Co/Ru adds another material interface and requires controlled deposition and Cu fill. Changing liners and barriers by metal layer allows Intel to optimize interconnect resistance, process complexity, and reliability. [15, 16] RibbonFET, Intel’s name for its gate-all-around FETs (GAAFETs), replaces the FinFET’s vertical fins with four stacked horizontal silicon nanosheets, allowing the gate to surround the channel on every side. The path to GAAFET begins with the planar transistor. A planar MOSFET places the gate above the channel between its source and drain. Pairing an NMOS with a PMOS transistor creates a CMOS inverter, in which the NMOS pulls the output low for a high input, and the PMOS pulls it high for a low input. The gate must retain electrostatic control of the channel to ensure clean switching. As gate lengths shrank, the drain began to compete with the gate for that control, increasing off-state leakage. Electrostatic control was restored through an architectural evolution that raised the channel into a vertical fin and wrapping the gate around three sides. Called “FinFET”, this new architecture packed more effective channel width into a smaller footprint. Further scaling made it harder to maintain both drive current and leakage within smaller cells, and reintroduced the same problems planar MOSFETs faced. Nanosheet GAAFETs close the fourth side by replacing the vertical fin with a stack of horizontal nanosheets, each surrounded by the gate. The tighter electrostatic control suppresses leakage at shorter gate lengths while stacking adds effective channel width within the cell footprint. In a FinFET process, channel width changes in discrete steps as designers must add or remove whole fins. Nanosheet width can instead be adjusted continuously within the process’s design rules. Wider sheets increase drive current, while narrower sheets reduce capacitance at the cost of drive current. Intel 18A uses stacks of four nanosheets each and varies their widths across logic and SRAM. At the process level, adding more sheets to each stack increases effective channel width and drive current, but complicates fabrication. RibbonFET vs MBCFET Samsung began GAAFET production in 2022 with SF3E, following with SF3 and now SF2. Its ‘MBCFET’ provides a useful structural comparison with Intel’s first RibbonFET implementation. [17] STEEL is digging deeper into SF2, used in the Exynos 2600, and TSMC’s GAAFET N2, used in Apple’s A20 Pro, in upcoming newsletter articles. We’re throwing some teasers on X. Let’s compare Samsung SF2’s MBCFET with Intel 18A’s RibbonFET. Subscribe Even to the untrained eye, Intel’s extra nanosheet is obvious. Intel stacks four ribbons to Samsung’s three. Samsung’s sheets are much wider in these fields, so both sheet count and width matter to the available channel perimeter. Sheet width also changes which silicon surfaces carry current. On conventional (001) silicon, wide nanosheets emphasize the broad top and bottom surfaces, favoring electron transport; the larger sidewall contribution in a narrow sheet favors hole transport. Thinner sheets improve gate control but increase confinement and scattering. This makes width and thickness part of the NMOS/PMOS balance, alongside strain and threshold voltage. [18], [19] GAAFET designs like 18A use different work-function-metal (WFM) stacks for NMOS and PMOS. Around each ribbon, a thin SiOx interfacial layer separates the silicon channel from the HfOx high-k dielectric, with La providing dipole tuning and the WFM wrapping the dielectric. NMOS uses a TiAl-based stack, while PMOS uses TiN WFM. W fills the remaining gate trench, providing a lower-resistivity path where the work-function layers are no longer needed. In this field, the PMOS stacks leave room for W between ribbons, while the NMOS stacks occupy more of those gaps. A silicon-based dielectric marks the P/N boundary, allowing the PMOS and NMOS gates, sharing the same gate trench, to be processed sequentially. Fast logic paths, retention circuits, and SRAM need a family of threshold options. Changing threshold without substantially changing device dimensions, capacitance or fabrication complexity is valuable. FinFET processes typically use different work-function-metal stacks. In a four-ribbon GAA stack, the narrow sheet-to-sheet gap limits how much WFM can fit around each channel. La in the gate dielectric creates interfacial dipoles at the SiOx/HfOx boundary, shifting effective work function and tuning threshold voltage. This gives Intel another control alongside its NMOS and PMOS WFM stacks. Low-threshold devices improve critical-path drive; higher thresholds reduce leakage elsewhere. Dipole tuning is especially useful in GAA because it changes threshold without consuming the narrow intersheet gap with thicker WFM. Precise control of La incorporation, diffusion and interface quality has long been a challenge, limiting viability in high volume production but is now seen from every leading-edge foundry. Intel’s patent describes depositing a dipole-forming oxide above HfOx and annealing it toward the interfacial oxide before completing the work-function and fill metals. This separates threshold tuning from the space available for metal. Newer research addresses the thermal cost: imec’s 2026 dipole-middle research inserts the shifter between two HfOx depositions, shortening the diffusion path while protecting SiOx during patterning. [20], [21]Matched-cut EDS, Intel 18A (left) vs. Samsung SF2 (right). Intel retains raised source/drain epi beneath its contacts, while Samsung recesses W deep into the epi to form a V-shaped Ti-lined interface. The deeper contact increases metal-to-semiconductor area and shortens the current path from the lower sheets, reducing contact and spreading resistance. It also removes epi volume and brings the contact etch closer to the channel ends. Retaining more epi preserves the material available for strain transfer, especially from SiGe into PMOS. These geometries balance contact access against stress engineering and etch margin. [22], [23] Samsung stacks three sheets to Intel’s four ribbons, and both processes use sheet width to tune drive strength. In our Samsung cross-sections, widths range roughly from 19 to 30 nm in the NPU rows and 37 to 50 nm in the CU cell. The Samsung nanosheets taper, with the widest sheet at the bottom and the narrowest at the top. Both processes use HfOx gate dielectric and Ti-based work-function stacks, with Al in the NMOS stack. In the Samsung devices shown here, the dielectric and WFM occupy the intersheet gaps, leaving W above the top sheet. Intel’s PMOS stack leaves more room between ribbons, and W fills those gaps while the thicker NMOS stack leaves W mainly in the upper trench. Gate-stack EDS maps. The W between Intel’s PMOS ribbons provides a conductive path close to the lower gates. Where WFM fills the entire gap, the gate still surrounds the channel, but voltage reaches it through the more resistive work-function films. Thinner WFM and dipole tuning preserve room for low-resistivity fill; Mo and Ru are alternative fill metals being developed for further scaling. [24] A masked, sequential WFM flow explains the different gate heights and inter-nanosheet fill. The proposed sequence below shows how separate NMOS and PMOS work-function steps produce that geometry. Enabled by the BSPDN process, Intel replaces the dense-logic silicon subfin with dielectric, removing the parasitic conduction path below the ribbons and reducing substrate-related capacitance. A retained silicon body as in classical, non-SOI, planar and FinFET designs needs junction and punchthrough-stop engineering to suppress leakage. Dielectric isolation makes that leakage less sensitive to the subfin doping profile but adds removal and fill steps. It also weakens the direct thermal path through silicon, making the contacts, metal stacks and package more important for heat extraction. [24], [26] Fluorine is concentrated around selected Intel device structures in the maps. WF6 is a standard precursor for W nucleation and fill, while barrier films protect adjacent dielectrics from fluorine attack. Low-fluorine W processes reduce the residual-F burden. Chloride-based precursors avoid introducing F during W deposition, but require control of chlorine attack, nucleation and fill quality. The integration target is a continuous, low-resistance W path with a thin protective liner and minimal chemical damage to the surrounding stack. [20], [27], [28] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. We measured cell height, gate pitch, metal geometry, and ribbon dimensions at the XTEM sites shown below. The tables group these dimensions by site and device polarity. Our “sheet cuts” cross the silicon channel and show the ribbons end-on. “gate cuts” run along the channel through successive gates. The 18A logic cell dimensions point to a five-track logic library while the N3E and Intel 3 cell dimensions evidence a seven-track logic library. The DDR-PHY uses wider M0 wires and much larger spacing than core logic. That trades routing density for lower wire resistance and weaker coupling between neighboring nets. The geometry suits the current delivery and coupling requirements of analog, clock, and I/O circuitry. PowerVia lets 18A combine a compact cell height with wider M0 geometry by moving the main power rails off the signal-routing tracks. That relaxes local wire scaling while preserving a small cell footprint. Cell height and gate pitch set the geometric density; pin access and routability determine how much of it a real block can use. [29] The biggest takeaway from our gate-pitch measurements is that Intel 18A compute logic and TSMC N3E GPU logic have similar density in the Bohr representative-cell model. The 18A example is 18.6% denser than the Intel 3 GPU example. Gate pitches are nearly identical across the three sites, so cell height drives most of the difference. The Bohr model combines a four-transistor NAND2 spanning three gate pitches and a 32-transistor scan flip-flop (SFF) spanning nineteen pitches, weighting their densities 60:40. The sensitivity column shows how independently changing cell height and gate pitch by ±1 nm changes the result. This compares representative cell geometries; whole-die density also depends on cell mix and placement. The 18A P-core gives M0 substantially more metal cross section than the N3E vector engine. Treating each profile as a trapezoid gives 2.63 times the area per line and 1.84 times the area after normalization by routing pitch. The larger section reduces the geometric contribution to line resistance and lowers current density for a given current. Taller and wider wires also add capacitance, so circuit delay depends on the balance of resistance and capacitance. The DDR-PHY has less metal area per routing width than the 18A core fields, while remaining above N3E. [30] Area = height × (top CD + bottom CD) / 2, including liners. Area/pitch normalizes by routing width. Taper is the symmetric sidewall angle from vertical, with the largest angle belonging to the DDR-PHY. Compute tile The measurements show how ribbon dimensions and gate-stack geometry vary across the compute tile and between NMOS and PMOS to balance channel drive, gate load and the space needed for the dielectric/WFM stack across logic, SRAM and the DDR-PHY. Width mainly changes available channel perimeter; thickness also changes electrostatic control and carrier confinement. Gate-stack thickness then determines the space left for low-resistivity fill P-core and LP E-core logic Both the P-core and LP E-core use multiple nanosheet widths. Widths are measured on high-magnification XTEMs while wider-field images demonstrate additional width choices within the LP E-core. Multiple widths are expected even within an LP E-core. Timing-critical paths, buffers and cells with different fanout need different drive strengths. The lower-magnification fields show this width diversity beyond the sites quantified in the table. L2 and L3 SRAM GAA gives SRAM designers another way to balance the pull-up (PU), pass-gate (PG), and pull-down (PD) transistors. FinFET bitcells set device strength through fin count while GAA adds nanosheet width as a sizing knob. In a 6T SRAM cell, a strong pull-down relative to the pass-gate limits read disturbance, while a strong pass-gate relative to the pull-up improves writability. During a write, the pass-gate and write driver pull the node storing “1” below the inverter trip point. During a read, the pull-down holds the node storing “0” low. Bias, threshold voltage, mismatch and assist circuitry set the remaining margin. FinFET high-current cells commonly use a PU:PG:PD fin-count pattern of 1:2:2, a device-sizing ratio rather than a current ratio. Ribbon width lets Intel balance SRAM strengths without adding whole fins. The L2 cell uses its narrowest ribbons for PU and widest for PD, improving writability and read stability respectively. Intel’s disclosed HCC operates without assist; its denser HDC uses negative-bitline write assist. Pulling the selected bitline briefly below ground increases pass-gate overdrive so it can overpower the pull-up at lower supply voltage. That buys density and low voltage writability at the cost of boosting circuitry, switching energy, and additional voltage stress that must be controlled. [31], [32] Four rectangular ribbons give the perimeter = 8 × (width + thickness), before corner rounding. PG/PU is 1.49 and PD/PG is 1.16. The L3 structures closely resemble L2 in layout and cell height. Fewer L3 nanosheet widths are tabulated because fewer high-magnification images were available. DDR PHY The DDR-PHY trades density for controlled analog behavior and reliable off-chip signaling. It contains drivers, receivers, delay circuits, and calibration logic that set drive strength, sampling time, and voltage margin. Repeated four-sheet devices with similar widths fit the use of regular transistor units for matching and programmable drive. Its wider local wiring provides room for current delivery and separation of sensitive signals, while consuming more area than a dense core-logic grid. The layout serves the memory channel’s electrical requirements as well as digital logic density. [33] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Intel 3 GPU devices Vector engine logic Intel 3’s XVE logic uses two-fin PMOS and NMOS devices with power rails in M0. Its cell height and M0 pitch give a seven-track geometry, two tracks more than the 18A logic. One-fin groups also appear among the two-fin devices. Intel 3 L2 SRAM The Intel 3 L2 SRAM uses the familiar HCC sizing pattern: one PU fin, two PG fins, and two PD fins. N3E GPU devices Vector engine logic The N3E XVE field contains repeated two-fin devices with seven-track cell geometry. N3E remains a FinFET process, giving Panther Lake a direct FinFET-to-RibbonFET comparison. N3E L2 SRAM The N3E L2 SRAM uses the same PU:PG:PD fin-count pattern of 1:2:2. Panther Lake-U follows Lunar Lake’s floorplan quite closely. Both pair 4 P-cores with 4 LP E-cores and NPU, media and display engines in similar locations. Lunar Lake also uses Xe2, the direct predecessor to Panther Lake’s Xe3 GPU. This makes Lunar Lake the most direct basis for our comparisons. Arrow Lake differs in core count and uses the older Xe-LPG GPU architecture, so we only use it where it offers a more direct component-level comparison. Compute tile Panther Lake compute-tile floorplans remain sparse even months after launch. Intel 18A’s backside metal and dielectric stack must be removed without damaging the underlying structures before a clean transistor-level floorplan can be imaged. Most published die shots hide or heavily process the background, but we are quite proud of the die shot we achieved and are excited to show the work we have done. We measured the areas of the key components on the compute tile and compared them with their Lunar Lake predecessors on TSMC N3B. These help us to capture changes in block area and compare the two chips across process nodes and designs. Our total tile areas exclude the scribe-line area. The compute-plus-GPU subtotal below uses the PTL-U compute tile and GT1 GPU; it excludes the I/O tile and passive base. Individual block areas use the boundaries marked on the floorplans The compute-plus-GPU row is recomputed from the displayed PTL-U and GT1 areas. Component rows use their stated per-region counts and are not an additive partition of the whole tile. The P-core area remains almost unchanged between Lunar Lake and Panther Lake, despite L2 capacity increasing from 2.5 MiB to 3 MiB. Arrow Lake uses the same Lion Cove core as Lunar Lake but also has a 3 MiB L2. Cougar Cove fits 20% more L2 into the same P-core area. The larger private cache keeps more of each core’s working set close to its execution units, reducing access to shared L3 and DRAM. Extra capacity adds storage leakage and lookup energy, so designers balance it against avoided lower-level accesses. The shared P-core L3 cache also shrank by 14.8%. [2] Cougar Cove combines a similar footprint with Intel’s reported power-efficiency improvements. RibbonFET’s tighter channel control reduces leakage, while PowerVia reduces supply droop and allows tighter voltage guardbands. [1] Darkmont’s four-core LP E-core cluster is 5.0% smaller than Skymont’s on Lunar Lake, with most of the reduction in its L2 regions. The 1 MiB region shrank by 8.4% and the 1.5 MiB region by 14.9%. The tag arrays also use one fewer visible row. Tags identify which memory addresses the data array holds, so rearranging them changes the cache’s layout and wiring without requiring less data capacity. [2] The LP E-cores share one L2. This pools capacity and avoids duplicating all the cache machinery, but the four cores contend for its banks and bandwidth. Their separate cluster also keeps light work away from the performance cluster and its L3, allowing that larger domain to sleep. [1], [2] Cache area includes more than the storage cells. Tags identify each line, decoders select rows, sense amplifiers read the small bitline signal, and wires connect to the banks. Splitting an array into smaller sections shortens wordlines and bitlines, improving access speed, but duplicates peripheral circuits. Panther Lake’s smaller cache regions therefore reflect the complete memory implementation, including how much of each region is devoted to storage. [34] Unlike Meteor Lake and Arrow Lake, Panther Lake has no separate SoC tile. The NPU, LP E-cores, memory controllers, PHYs, media and display engines now share the compute tile. This removes an active die and keeps CPU memory traffic on one die. The cost is moving PHY and I/O-related circuitry onto 18A: drivers, receivers and analog circuits must still meet external voltage, loading and signal-integrity requirements, so their area does not shrink like dense digital logic. [1], [2] The biggest shrink comes from the NPU, which occupies 36.9% less area. NPU 5 consolidates the same total INT8 MAC count into half as many neural compute engines. Each of the three NCEs has a larger MAC array to make the complete NCE envelope 22.6% larger than an NPU 4 engine. Consolidation also halves the number of scratchpads and SHAVE DSPs, from 12 to 6. The MAC array handles matrix multiplication and convolution, while SHAVE executes vector and custom operations that fit the array poorly. [1], [2], [35] The paired floorplans identify each NCE envelope and its scratchpad, MAC, and SHAVE regions. Each measured MAC polygon is counted once per NCE in the area accounting below. The scratchpads store weights, activations, and intermediate results near the MAC arrays, allowing repeated use without fetching them again from DRAM. Halving their number delivers the largest measured area saving but leaves less local storage for the same total MAC count. Layers that no longer fit locally require smaller working tiles or more transfers of intermediate data. The benefit depends on keeping the enlarged arrays busy while managing that tighter storage budget. [36] NPU 5 also adds native FP8. Using half the operand width of FP16 reduces storage and transfer demand, helping workloads fit the smaller local memory budget. Lower precision and format-dependent range make scaling and model validation part of deployment. Hardware activation functions further reduce work that would otherwise occupy the programmable DSPs. [1], [2] Microsoft requires an NPU to deliver at least 40 TOPS for Copilot+ PCs. Both Lunar Lake and Panther Lake meet this threshold, but Panther Lake uses significantly less silicon. GPU tiles Panther Lake is Intel’s first product with Xe3, its latest GPU architecture. It offers two different GPU tiles: a smaller GT1 tile with 4 Xe3 cores on Intel 3 and a larger GT2 tile with 12 Xe3 cores on TSMC N3E. Panther Lake allows us to compare the same GPU architecture across both Intel 3 and TSMC N3E. Wildcat Lake adds a third Xe3 implementation on Intel 18A. A future newsletter will detail Xe3 and its implementation differences across all three process nodes. GT2 scales Xe3 to a different physical layout, with render slices arranged vertically instead of GT1’s horizontal arrangement. Slice placement sets the distances to shared cache banks and the D2D interface. Those wires consume area and add delay, so scaling the number of Xe cores also requires a new balance of cache placement, routing and timing. [1] What’s immediately obvious is that the GT2 tile on TSMC N3E has much smaller Xe cores than GT1. These block areas include logic, caches, and routing. An Xe core on the GT1 tile is ~69% larger than one on Lunar Lake, and ~55% larger than one on GT2. Intel 3 therefore uses substantially more area per Xe core. The block-area gap exceeds the measured logic and SRAM density gaps, bringing routing, timing targets, cell mix, and floorplan allocation into the comparison. The measured vector/matrix engine region is almost unchanged between Lunar Lake and Panther Lake’s GT2 tile. Xe3 retains eight 512-bit vector engines and eight 2048-bit XMX engines per core. Its gains also come from feeding those engines more effectively: more resident threads hide stalls, and variable register allocation lets shaders trade registers per thread against the number of threads kept active. [1] The shared L1/SLM capacity increased by 33% from 192 KiB to 256 KiB, while its area increased only 5%, raising effective density by 27%. L1 retains reused cache lines, while software-managed SLM lets a thread group share data locally. Both reduce traffic to more distant memory. Allocating more SLM per group can also limit how many groups reside on a core at once. [1], [37] The GT1 tile carries 4 MiB of L2 against 16 MiB on the GT2 tile. GT1 divides its L2 cache into four 1 MiB banks, while GT2 uses eight 2 MiB banks. Each bank contains 128 macros, but each N3E macro stores 16 KiB, twice the Intel 3 macro’s 8 KiB capacity. The N3E macro is only 54% larger while holding twice as many bits, giving it 30% higher density: ~23.7 Mbit/mm² versus 18.3 Mbit/mm². Including bank-level circuitry, the gap widens to ~16.9 Mbit/mm² on GT2 versus ~10.4 Mbit/mm² on GT1. GT2 gains density with its macros storing more bits per unit area, and those macros occupy more of each cache bank. Larger macros spread decoder and sense-amplifier overhead across more storage, while a more compact bank layout reduces the share spent on control and routing. The compromise is longer wordlines and bitlines that carry more capacitance. [34] I/O tile Panther Lake uses two I/O tile variants, both fabricated on TSMC N6. The smaller one provides 4 PCIe 5.0 and 8 PCIe 4.0 lanes and serves lower-tier systems as well as those without a discrete GPU, while the larger one adds 8 PCIe 5.0 lanes, bringing the total to 20 lanes, for discrete-GPU connectivity. Panther Lake SKUs with the larger 10- or 12-Xe GPUs use the smaller I/O tile. [38] The smaller I/O tile adds a PCIe 4.0 block and a Thunderbolt block to Lunar Lake’s I/O layout, providing four additional PCIe 4.0 lanes and another Thunderbolt 4 port. Its repeated N6 blocks retain nearly identical areas and layouts. Reusing these proven PHYs and controllers avoids porting and requalifying external interfaces on 18A, where faster digital logic offers less benefit to circuits constrained by the off-chip link. [38] SemiAnalysis’s teardown lab (STEEL) dives deep into the world’s advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. We’re hiring technical experts from system to transistor and everywhere in between. Check out our Careers page. Panther Lake offers scalability and modularity through its disaggregated packaging that partition compute, GPU, and I/O silicon into separate tiles allowing for a suite of tile configurations. This partitioning makes the package part of Intel’s node economics as it determines how much leading-edge wafer area each product consumes, which functions can remain on other processes, and how much configuration freedom Intel can offer from a shared set of tiles. Furthermore, fabricating the compute and GPU tiles separately confines the new 18A process to the compute tile and allows graphics and I/O to use other, more established, and more cost-effective processes. For Panther Lake, the GPU and I/O tiles are assembled alongside the compute tile on a passive silicon base using Foveros-S. Intel’s current technology brief lists a nominal 36 µm pitch for Foveros-S. Through-silicon vias (TSVs) in the base connect the fine wiring above to the larger package connections below. The functional tiles sit side by side on that passive base in a 2.5D configuration. [39] Our cross-section through the compute and GPU tiles shows the package’s wiring hierarchy. Microbumps connect each active tile to the passive silicon base; its fine redistribution layer (RDL) carries the short, dense tile-to-tile links. TSVs carry connections through the base to the package substrate, which fans them out to the much coarser motherboard solder joints. The base supplies interconnect, while computation remains in the active tiles above it. [39] At the compute-tile edge, the higher-magnification inset shows a local microbump spacing of approximately 25.24 µm and a feature width of 12.33 µm. These local spacings are finer than Intel’s nominal Foveros-S value. The X-ray fields further confirm tighter neighboring bumps, consistent across every die-to-die area found on each tile. Additional X-ray analysis is offered after the paywall. Putting the memory controller beside the CPU removes the D2D transfer that CPU memory requests required in Meteor Lake and Arrow Lake. This avoids the extra transmitter, receiver, and link traversal, saving interface energy and latency. Panther Lake’s separate GPU still crosses a D2D link to reach DRAM, so its larger local caches also help contain package traffic. [1], [40] Smaller dies are less likely to contain a random fatal defect, and screening them before assembly prevents one bad tile from consuming a complete package of good silicon. Reuse also spreads design and qualification work across more products. Against those gains, Intel pays for the passive base, D2D circuits, extra bonding and test steps, and losses during assembly. Cost per working product across the portfolio captures the combined effect of wafer yield, reuse, test, and assembly. [29] Wildcat Lake packaging Intel launched Core Series 3, formerly Wildcat Lake, on 16 April 2026 for value mobile and edge systems. Wildcat Lake keeps 18A but removes the passive base and combines more functions on one die to simplify the package. The two products therefore reveal two distinct ways to commercialize the same leading-edge process. [41] Wildcat Lake’s 18A die combines up to two Cougar Cove P-cores, four Darkmont LP E-cores, two Xe3 cores and a smaller NPU. A separate platform-controller die supplies I/O, connected through UCIe, Intel’s first processor implementation of the standard. Consolidating graphics remove a tile boundary and the passive base, reducing assembly complexity for a modest-bandwidth value product. It also ties CPU and graphics scaling to the same die, giving up Panther Lake’s ability to swap in a much larger GPU. [42], [43] In July 2021, Intel CEO Pat Gelsinger set out an ambitious process roadmap aimed at regaining performance leadership by 2025, later described as five nodes in four years. Five years and one CEO later, Intel’s comeback story is not as unambiguously positive as Pat may have hoped. [44], [45] Intel once set the pace for process technology, bringing high-k metal gate technology and FinFETs into volume production years ahead of the rest of the industry. Its 22 nm FinFET process reached consumers with Ivy Bridge in 2012. [46] Intel’s integrated device manufacturing (IDM) model allowed its architects and process engineers to co-optimize products and processes. Starting with Sandy Bridge, Intel dominated x86, while AMD struggled with Bulldozer. That lead faltered at 14 nm and broke at 10 nm. Intel targeted a massive 2.7× density increase, but the node arrived years late and required several revisions before it could support Intel’s full lineup. This delay forced Intel to stretch 14 nm across six generations, while TSMC moved ahead in process technology and AMD recovered in x86. By 2019, Intel was still shipping 14 nm across most of its product stack, with its 10 nm client ramp focused on Ice Lake mobile processors. Meanwhile, TSMC was shipping N7 and N7+, and AMD’s Zen 2 compute chiplets used N7 to raise core counts and improve efficiency. Intel’s process failures were central to its decline, but unsound business decisions furthered their downward slide. Product delays compounded product mistakes, pushing client, server, and FPGA roadmaps off schedule. Several attempts to enter AI (Nervana and Gaudi) and networking (Tofino) also failed to establish lasting businesses. Intel’s recovery has focused on consumer CPUs and advanced packaging. Tiger Lake, Alder Lake, Lunar Lake and now Panther Lake have restored Intel’s consumer roadmap. On the process side, Intel 4 shipped with Meteor Lake, Intel 3 with Granite Rapids and Sierra Forest, and Intel 18A with Panther Lake. Intel has also made advanced packaging part of its foundry offering. However, Intel is still playing catch-up in servers. Several Xeon generations arrived years late and trailed contemporary AMD and Arm server CPUs in performance, efficiency, and core count. The process roadmap is back, but Intel does not hold the same process-technology leadership position it held prior to 10 nm. The introduction of gate-all-around nanosheets and backside power delivery are two of the biggest changes to transistor integration in a decade. Intel took on both changes at once: 18A paired its first RibbonFET with PowerVia in Panther Lake. Panther Lake is a substantial manufacturing milestone. Our cross-sections show how RibbonFET and PowerVia reshape local contacts and wiring, while the floorplans show where architectural consolidation and process choices save area. A sustained competitive lead depends on product performance, cost, yield, and the next implementation. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page.. 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LIVE: Six years on from COVID-19, is the world ready for the next pandemic?
COVID-19 killed millions, shattered health systems and brought the global economy to a virtual standstill. World leaders are meeting Friday to review the lessons learned and cement a new approach to prevention and preparation for the next pandemic. Hopes are high that a World Health Organization-led international agreement can move forward.
Venezuela seeking rebirth after political crisis and devastating earthquakes, President tells UN
Venezuela is seeking to rebuild after a period of political upheaval and the destruction caused by twin earthquakes earlier this year, Acting President Delcy Rodríguez told world leaders at the United Nations on Wednesday.
UN health agency calls for investment boost to save young lives from cancer
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Micron 2 GB GDDR7 Memory Chips Reach End Of Life, Leaving RTX 50 Series Fully Dependent On Samsung And SK Hynix
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In a recent video [Jeff Geerling] addresses an issue discovered with the Raspberry Pi firmware, specifically how since around 2024 the firmware locks down what RAM size and even module is supported…
Ebola vaccine trial begins in DR Congo
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The race to build a pandemic-proof world
Six years after COVID-19 killed millions, battered health systems, disrupted lives and brought the global economy to a virtual standstill, the world is still grappling with how we can prepare better for the next pandemic.
World News in Brief: Shipping alert from IMO, democracy vanishing in Nicaragua, alert over political ‘denialism’
Amid a rising number of attacks on shipping in key waterways in the Middle East linked to the US-Iran war, the head of UN maritime agency, Mr. Arsenio Dominguez, has insisted that the conflict is not a “pretext” to target “innocent seafarers”.
UNICEF says thousands of children require mental health support after Nepal floods
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Ebola responders grapple with widening outbreak in DR Congo
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K-Air purification technology heads to India’s railway market to tackle extremely high fine-dust levels
A research team at the Korea Institute of Machinery and Materials (KIMM) – including Principal Researchers Dr. Sang Bok Kim and Dr. Inyong Park and Senior Researcher Dr. Younghun Kim of the Department of Urban Environment Research, Eco-friendly Energy & Environment Research Division – has begun developing a compact electrostatic precipitator-based air purification module for use in Indian trains. The project is a collaborative effort with THN Co., Ltd., a KIMM Family Company (partner firm), as part of KIMM’s flagship air purification brand, Air Five.
UN hails Libya election deal as Security Council urges Libyans to seize the moment
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Integrated pollution and carbon mitigation delivers major health and economic cobenefits in China
Synergistic mitigation of air pollutants and greenhouse gases is crucial for achieving clean air and carbon neutrality, but quantitative evidence of sectoral and regional health co-benefits in China remains limited. Authors develop an integrated Energy-Economy-Air Quality-Health framework coupling CEEPA, GAINS, and a province-level health module to simulate fourteen policy scenarios from 2020 to 2050. Coordinated strategies reduce CO2 and pollutants (SO2, NOX, PM2.5) by 75% relative to 2020, avoiding more than 500,000 premature deaths by 2050 and yielding monetized gains of 1.07 trillion CNY. Health benefits concentrate in industrially dense and populous provinces, with near-term PM2.5 reductions driven by pollution control and long-term improvements reliant on decarbonization. The integrated approach achieves a benefit-to-cost ratio of 1.42, lowering abatement costs by 11% relative to pollution-only measures. These findings highlight the value of coordinated, sector- and region-specific strategies for simultaneous climate mitigation, air quality improvement, and public health protection.
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Building the beat: How New Orleans can grow the business behind the music
People dance to the music of the TBC Brass Band Photo by Michael DeMocker / The Times-Picayune This week New Orleans hosts the annual Cutting Edge CE Conference, which brings together members of the music industry, musicians, lawyers and others to learn about and discuss the latest changes in the business of making, producing and selling music. googletag.cmd.push(function() { googletag.display('ad-1492300'); }); The conference comes as AI and streaming are causing upheavals in the industry. Meanwhile, we’ve seen at least a partial collapse of the global festival industrial complex which has long been a key financial lifeline for many artists.All of that can feel a bit removed from life in New Orleans. After all, we are a city filled with music. On any given day or night, there are dozens of shows across the city, ranging from jazz and blues to hip-hop, bounce and house. Whereas in other cities kids dream of being the star of their local sports team, in New Orleans more often than not they dream of leading their own band.And music is a huge part of our economy. Before New Orleans was known as a foodie destination, it was already drawing millions of visitors from around the globe to experience our jazz, soul and funk scenes firsthand.But the reality is, if you want to make it big, you’re probably going to end up leaving the city. We’ve seen major performers like Lil Wayne, Master P and Jon Batiste (though he’s back on the Northshore) decamp to Los Angeles, Miami and New York. Likewise, up-and-coming musicians like Greer Grimsely, $leazy EZ and Lucky Daye have also left town in search of more profitable pastures.Meanwhile, our local universities train some of the best producers and engineers in the business — only to see them head to one of the big music industry cities after graduation.It’s not a new phenomenon, though the reasons have changed over the years. Like a lot of early jazz musicians, Louis Armstrong famously left New Orleans, first for Chicago before ultimately settling in New York City. But while those early migrations had more to do with racism, in today’s day and age, musicians end up leaving because New Orleans doesn’t have the industry infrastructure necessary to sustain the kind of growth and, well, success, a lot of folks dream of.It’s a hard, but very real, truth. Artists have to go to Nashville for publishing, Los Angeles for production, Atlanta to join a label or New York for representation. That, in turn, is a drain not only on the city’s talent pool but on money that could be staying here at home.Not being an industry town inevitably makes it that much harder for musicians who don’t leave to get the recognition and success they deserve. It also undoubtedly plays a part in keeping the wages working musicians in New Orleans make at their gigs here lower than in places like Austin or Nashville.That’s not to say we don’t have any of the infrastructure needed to make New Orleans a music industry town. We’ve got live music venues, studios, record labels, management companies, copyright attorneys ... all the various building blocks are there. We just haven’t ever built upon that solid foundation. googletag.cmd.push(function() { googletag.display('ad-1492297'); }); The question is how do we do that in a way that supports our existing industry and artists, respects our cultural traditions and ensures the wealth generated is equitably distributed so it isn’t just C-suite executives who end up reaping the benefits. And the time to start figuring out the answers is now: next year the legislature will focus on taxes and spending, making it vital that New Orleans leaders have a plan to try and secure funding to help grow our industry.So we asked a group of New Orleanians to give us their thoughts, ranging from industry attorneys and venue operators to working musicians and cultural advocates. Their answers point toward turning New Orleans into a music industry city without leaving musicians behind or abandoning what makes us the greatest music city on earth.If a dusty city like Austin can transform itself into a major hub not just for music but the industry behind it, surely the birthplace of jazz — and pretty much all modern music by extension — can figure it out as well. +3 Mailbox Money: The Recording Academy’s Reid Wick on supporting, and growing, New Orleans’ music industry Reid Wick has been a part of the New Orleans music landscape from virtually every angle. He'… California Dreaming: Pell discusses his time in L.A. and how New Orleans can help young musicians In 2015, New Orleans-born rapper Pell decided to make the move to Los Angeles. He was fresh … +2 Up from the street: To build a stronger music industry, support community first. At MaCCNO, most of our team aren’t just advocates, we’re also working musicians. Here are a … +2 Live and direct: Public investment in independent venues is key to a robust music economy. I’ve spent most of my adult life looking at the New Orleans music business from every side o… +2 Helping Hand: New Orleans doesn’t need more talent. It needs more infrastructure. People love to call New Orleans a music town. And they’re right. +2 \We out here: New Orleans doesn't need to be Austin. It's already a music industry city. +2 Futureshock: New Olreans has the music talent. Now it needs the innovation. New Orleans has long been known as a place for music creation and innovation. People travel … .donate-gambit-article-module-container { text-align: center; padding: 10px; /* background-color: #24da6d; */ background-color: rgb(153, 0, 0); margin-bottom: 20px; } .donate-gambit-article-module-title { font-weight: bold; color: #fff; } .donate-gambit-article-module-copy { color: #fff !important; font-size: 16px; } .donate-gambit-article-module-button { background-color: black; width: 50%; border-color: black; font-size: 16px; } .donate-gambit-article-module-button:hover { background-color: black; } @media only screen and (max-width: 600px) { .donate-gambit-article-module-button { font-size: 14px; width: 100%; } .donate-gambit-article-module-copy { font-size: 14px; } } BECOME A GAMBIT MEMBER AND JOIN OUR KREWE TODAY For more than 40 years, Gambit has covered New Orleans, for New Orleans. We’ve stood up to city hall with you, cheered the Saints with you, danced in the streets with you and cried over our collective loss with you. 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Zambia: Arrests and detention of political opponents following election raises concern
In the wake of President Hakainde Hichilema of Zambia’s re-election for a second five-year term, UN human rights chief has raised concerns over the reported arrests and detention of political opponents in the country.
Smithsonian Brings Sandy Beach Scientists to Texas A&M Galveston
Scientists from the U.S. and South America are workshopping at Texas A&M University at Galveston (TAMUG) this week to expand sandy beach research and broaden collegiate learning opportunities.The Tides of Opportunity Project, co-led by the Smithsonian’s Marine Global Earth Observatory (MarineGEO) Program, TAMUG, the Smithsonian Marine Station, the Smithsonian National Zoo and Conservation Biology Institute, and the University of Miami, is a collaborative monitoring project with marine science professors and their students.Tuesday, Aug. 18, through Friday, Aug. 21, 15 professors and marine science professionals from the United States, Brazil, Peru, and Urugay will co-design a sandy beaches monitoring protocol and associated course modules and test the protocol in the field.The goal is to incorporate sandy beach monitoring protocols into marine science courses, which college faculty and students can use to achieve learning goals while providing essential data can help researchers diagnose the health of an understudied critical coastal habitat.Dr. Guilherme Corte, an assistant professor of marine biology in the College of Marine Sciences and Maritime Studies at TAMUG, is a principal investigator for MarineGEO. Texas A&M University at Galveston students and faculty package samples collected on the beach to take to campus for study in the Benthic Ecology Lab. Credit: TAMUG Division of Marketing and Communications“One third of the world’s ice-free coastlines are made of sandy beaches, and they go from pole to pole,” Corte said.However, despite their abundance and place as one of the most accessible coastal ecosystems for college-level education and research, they remain critically understudied.The Tides of Opportunity Project recognized that accessibility makes sandy beaches uniquely suited for engaging professors and students, including those with limited resources.“Any students can do sandy beach research,” Corte said, encouraging instructors to help students take a break from typing questions into artificial intelligence tools and embrace opportunities to do real science. “Providing this hands-on experience is something unique.”Tides of Opportunity Project goals include:Training a cohort of professors from across the Americas in standardized sandy beach monitoring methods; Equipping participating faculty with classroom modules, field tools, and multilingual teaching materials; Expanding MarineGEO with new monitoring sites focused on the implementation of long-term sandy beach monitoring; Strengthening hands-on, college-level learning experiences; And cultivating interest, learning, and efficacy in science among college-level students.By the end of this week, workshop participants plan to have a final version of the protocol and associated course modules that we can share with professors shortly after the workshop ends to then test with their students in courses that take place between September 2026 and February 2027.The scheduleDay 1: Tuesday, Aug. 18Location: Aggie Special Events Center (ASEC), Rooms 102 B and C, Texas A&M University at Galveston 8:30 – 9 a.m. Breakfast9 – 9:30 am Welcome and brief group introductions9:30 – 10 a.m. Introduction to Tides of Opportunity Project, Design Workshop, MarineGEO, and the Connecting Coastlines to Campuses Program (presentation)10 a.m. – 1 p.m. Introduction to workshop participants and project coordination team (presentations by each participant)• Brief lunch break from 12-12:30 p.m.1 – 3 p.m. Discussion about why collaborative science matters (presentation and interactive group discussion)3 – 4:15 p.m. Introduction to sandy beaches (presentation and group discussion)Day 2: Wednesday, Aug.19Location:• Morning sessions: ASEC Rooms 102 B and C, Texas A&M University at Galveston • Afternoon sessions: Corte’s field site (location available upon request)8:30 – 9 a.m. Breakfast9 a.m. – noon Prep for fieldwork (presentation and interactive group discussion)• Finish conversation about importance of studying sandy beaches• Go through sandy beaches monitoring protocol and field sheetsNoon – 12:45 p.m. Lunch12:45 – 1:30 p.m Prep for field (including driving to the field site)1:30 – 5:30 p.m. Fieldwork & bring samples back to TAMUGDay 3: Thursday, Aug. 20Location:• Breakfast: ASEC Rooms 102 B and C, Texas A&M University at Galveston • Fieldwork: Guilherme’s field site (location available upon request)• Lab/afternoon sessions: TAMUG lab (location available upon request) and ASEC Rooms 102 B and C8:30 – 9 a.m . Breakfast9 – 11 a.m. Return to field• Shorter field trip – recovering samples left out overnight11 a.m. – noon Lab work12 – 12:45 p.m. Lunch12:45 – 2:45 p.m. Continue lab work3 – 5 p.m. Discuss with professors the feasibility of implementing protocol in their courses and where might need to make changes (discussion)Day 4: Friday, Aug. 21Location: ASEC Rooms 102 B and C, Texas A&M University at Galveston 8:30 – 9 a.m. Breakfast9 a.m. – noon Group Discussion• How to evaluate student learning and engagement• Course modules• Next steps
Paragon lays off staff after Gateway cancellation
A subcontractor for a module that was being developed for NASA’s lunar Gateway has laid off 70 people after NASA halted work on the program.
Norris Consultant Group Launches New Credit-to-Capital Curriculum on The Wealth Blueprint Platform
ANDERSON, S.C., Aug. 10, 2026 (GLOBE NEWSWIRE) -- Norris Consultant Group, the parent company and operating entity behind The Wealth Blueprint, today announced the launch of a new curriculum module on its educational platform, expanding the program's business credit and funding-readiness training for aspiring entrepreneurs. The new module went live in early August 2026 and is now available to members of The Wealth Blueprint community. Norris Consultant Group operates The Wealth Blueprint as its
Wildfire smoke poses hidden health threat
Wildfires are often associated with the destruction they leave behind, but the smoke they produce can pose a serious health threat far beyond the fire zone, the World Health Organization (WHO) has warned.
‘Business as usual is a business of death’: UN adopts road safety pledge over US objection
The UN General Assembly closed its first ever High-level Meeting on road safety on Tuesday by adopting a sweeping new declaration aimed at halving road deaths by 2030 – over the sole objection of the United States.
Garmin CIRQA leaks in four colors with outdated sensor
Shortly before the launch of the Garmin CIRQA, leaked images reveal not only the design but also all four colors and even the sensor module. Garmin appears to be using a slightly older sensor to keep costs down.
Health response brings lifesaving care closer to thousands in Yemen
Thousands of people in some of Yemen's most conflict-affected communities are receiving lifesaving health care closer to home, thanks to funding from the UN aid coordination office (OCHA) through the Yemen Humanitarian Fund.
Haiti: Signs of hope despite gang violence and political uncertainty
For millions of Haitians, daily life has become a struggle to stay safe, find enough food and simply move around their own neighbourhood.
Restoring dignity: Senegalese surgeon and Burundian foundation win reproductive health awards
A Senegalese surgeon who has dedicated his career to restoring the health and dignity of women living with obstetric fistula, and a Burundian foundation supporting vulnerable women and children, have been named the winners of the 2026 United Nations Population Award.
Display Assistant app on Galaxy devices gets ready for One UI 9
Samsung has released a new update for the Good Lock's Display Assistant module. It is now ready for Android 17 and One UI 9.0.
A safe return home: Tackling stigma on Uganda's Ebola frontline
As Uganda works to contain an Ebola outbreak that is also affecting neighbouring Democratic Republic of the Congo (DRC), health workers are doing more than responding to a deadly virus. They are helping families navigate fear, misinformation and stigma.
Taking the world’s temperature: WHO chief spotlights global health emergencies
The hantavirus global outbreak is officially over, Ebola outbreaks are growing in Africa and responders are helping recovery efforts in quake-hit Venezuela, the World Health Organization (WHO) chief said on Thursday, announcing updates on global health emergencies.
‘The science is here’: UN chief welcomes first global AI assessment
Fresh scientific evidence and options for harnessing artificial intelligence (AI) were unveiled Wednesday following the launch of the first global, independent scientific assessment of opportunities, risks and impacts by a pioneering UN expert panel.
Oracle E-Business Suite Payments flaw under attack (CVE-2026-46817)
Exploitation attempts targeting a vulnerability (CVE-2026-46817) in Oracle's E-Business Suite's Oracle Payments module have been spotted.
Venezuela quake: key services crippled and health workers missing
Search and rescue operations continued in Venezuela on Tuesday as thousands of displaced people struggled to find shelter and humanitarians warned about the spread of infectious disease.
Leaked A20 Pro Image Hints at iPhone 18 Pro Performance Gains
An alleged image of the iPhone 18 Pro motherboard has leaked online, showing the A20 Pro chip will use a new packaging technology that should offer notable performance gains over the previous model. The leaked image, which has been shared by the accounts "WHYLAB" and "Ice Universe" on Weibo, appears to show the A20 Pro chip integrated into TSMC's new packaging architecture, known as Wafer-Level Multi-Chip Module (WMCM) technology.
Europe heatwave breaks records as UN agencies ramp up health warnings
As a record-breaking heatwave grips large parts of Europe, the World Meteorological Organization (WMO), national weather services and partners are mobilising heat-health action plans for millions of people facing dangerous temperatures.
New Orleans Summer Entertainment & The Omni Hotel Controversy
This week on The Get Down, John Stanton breaks down the week ahead in New Orleans, including the City Council's final vote on the controversial Omni Hotel redevelopment plan. googletag.cmd.push(function() { googletag.display('ad-1492300'); }); Jake Clapp shares some upcoming entertainment picks, including Ilana Glazer's tour stop at the Joy Theater, and we take a look at summer bucket list ideas in The Pearl for making the most of the season in New Orleans.Be sure to grab a copy of our latest issue of Gambit and stay tuned for the latest on all things New Orleans at bestofneworleans.com. .donate-gambit-article-module-container { text-align: center; padding: 10px; /* background-color: #24da6d; */ background-color: rgb(153, 0, 0); margin-bottom: 20px; } .donate-gambit-article-module-title { font-weight: bold; color: #fff; } .donate-gambit-article-module-copy { color: #fff !important; font-size: 16px; } .donate-gambit-article-module-button { background-color: black; width: 50%; border-color: black; font-size: 16px; } .donate-gambit-article-module-button:hover { background-color: black; } @media only screen and (max-width: 600px) { .donate-gambit-article-module-button { font-size: 14px; width: 100%; } .donate-gambit-article-module-copy { font-size: 14px; } } BECOME A GAMBIT MEMBER AND JOIN OUR KREWE TODAY For more than 40 years, Gambit has covered New Orleans, for New Orleans. We’ve stood up to city hall with you, cheered the Saints with you, danced in the streets with you and cried over our collective loss with you. And we’re plannin’ on being here for 40 more. To do that, we need your help. Become a Gambit member today and help us continue our mission SUPPORT GAMBIT
Apple Approves Production of OLED Panels for Foldable iPhone
Samsung Display has received Apple's approval to begin module production of OLED panels for Apple's first foldable iPhone, according to a report today from TheElec. Citing industry sources, the report says Samsung Display has started operating part of its back-end production lines in Vietnam to fulfill an initial order of around three million panels scheduled for delivery this year.
Coles awards more than $3.5 million to help turn producers’ ideas into reality
June 21, 2026 -- More than $3.5 million in grants has been awarded to eight small and medium-sized businesses across Australia through the lates...
WHO Step-by-Step programme recognized as a promising innovation for mental health in humanitarian settings
WHO, in collaboration with the Pan American Health Organization (PAHO) and Lebanon’s National Mental Health Programme, showcased Step-by-Step at the World Bank Group’s biennial Fragility Forum in Washington, DC. The forum convened more than 1500 representatives from governments, international organizations and civil society to advance the development agenda in the world’s most fragile and crisis-affected communities. WHO was invited to demonstrate Step-by-Step – a digital self-help intervention for depression, alongside innovations presented by Stanford University and Google. The World Bank Group selected Step-by-Step from among more than 50 innovations that they reviewed in the lead up to the Forum.About Step-by-StepStep-by-Step is a free digital tool developed by WHO in collaboration with Lebanon’s National Mental Health Programme and other partners, that helps people manage depression and anxiety on their own, with light guidance from a trained supporter. It uses a picture-based story to walk users through evidence-based techniques for managing common mental health conditions. Users complete five modules, with weekly contacts – of around 15 minutes each – from a trained non-specialist helper, such as a community health worker.Evidence-basedClinical trials in Lebanon involving nearly 1250 participants – including 680 Lebanese participants and 569 Syrian participants – showed that Step-by-Step significantly reduced depression, anxiety and stress, and improved daily functioning. By the end of the programme, a reduction in depressive symptoms of more than 50% was reported by almost half (46%) of Lebanese participants and more than one third (37%) of Syrian participants compared to approximately 14% of those who did not use the programme. Cost-effectiveness analyses further suggest that Step-by-Step may offer a cost-saving response to depression in humanitarian emergencies in low- and middle-income countries.Used globallyStep-by-Step is already in use nationwide in Lebanon and Thailand, as part of each country’s mental health system. In India, the NGO – Kaya Guides – has adapted Step-by-Step for delivery through a widely used messaging app. Together, these programmes have provided thousands of people with evidence-based support for depression. The content is freely available from the WHO website for any organization or country to adapt for their own context.A new implementation guideThe Fragility Forum coincided with the recent launch of WHO’s new practical guide: Psychological self-help interventions: delivering self-help for individuals, featuring Step-by-Step and Doing What Matters in Times of Stress (WHO, 2026). The guide is designed to help governments, health workers, organizations and planners bring evidence-based mental health support to more people, particularly in low-resource and crisis-affected settings.
Dragon Undocks to Return Science Experiments to Earth
At 12:25 p.m. EDT, the unpiloted SpaceX Dragon spacecraft undocked from the forward‑facing port of the International Space Station’s Harmony module after a command from SpaceX ground controllers. Flight controllers delayed the undocking slightly to power‑cycle a navigation sensor and restore full redundancy before departure.
After years of waiting, One UI 9 finally brings this status bar feature to Galaxy phones
One UI 9 now supports adding a network speed indicator to the status bar and disabling live activities using a Good Lock module.
Holding Space for Science: 100K Hours of Microgravity Science Glovebox
On June 9, 2026, the Microgravity Science Glovebox (MSG) aboard the International Space Station reached 100,000 hours of operation since its installation in the Destiny Module in 2002! This crucial laboratory facility consists of an enclosed area with the capability of accommodating experiments of many different disciplines, including those with hazardous components like bacteria and reactive chemicals. Equipped with arm inserts, this facility allows safe hands-on execution of experiments while keeping astronauts and the surrounding area free from contamination. In recognition of the facility’s milestone, check out this MSG image gallery highlighting science and scientists throughout its 100,000 hours of holding space for science.
Building trust and lab testing at the heart of DRC Ebola response: WHO
In Ebola-stricken eastern Democratic Republic of the Congo (DRC) a massive push for early testing and contact tracing is helping to contain the virus, the UN World Health Organization (WHO) said on Tuesday.
World Ocean Assessment highlights urgent need for science and global action
In the wood-panelled rooms of New York’s storied Explorers Club, where portraits of pioneering adventurers line the walls, diplomats, scientists and ocean advocates gathered on Tuesday evening with a shared sense of urgency – and anticipation.
Regional health agency issues measles alert for World Cup
As World Cup fever rises in the Americas, countries are urged to strengthen measles surveillance and vaccination amid ongoing outbreaks across the region.
Motorola Edge (2026) for US and Canada unveiled with smaller 6.3" display
The 2024 and 2025 models had 6.6" and 6.7" displays, respectively. The new model has a 50MP 1/1.56" main camera and a 10MP 3x telephoto module.
Kuo: Apple’s iPhone camera roadmap includes a costly upgrade
Analyst Ming-Chi Kuo is out with a new look at Apple’s upcoming iPhone camera plans, including an under-the-hood ultra-wide module change and a surprisingly steep cost increase.
Ebola outbreak in DR Congo collides with conflict and hunger, WHO warns
The UN World Health Organization (WHO) on Wednesday warned that eastern Democratic Republic of the Congo faces a “catastrophic collision of disease and conflict” as a fast-spreading Ebola outbreak outpaces containment efforts in a region already battered by armed violence, mass displacement and acute hunger.
Ebola epidemic spreading rapidly and outpacing containment efforts
There are more than 900 suspected cases of the Bundibugyo strain of Ebola in the Democratic Republic of the Congo, and 220 suspected deaths, the head of the World Health Organization (WHO), Tedros Ghebreyesus, said on Monday.
WHO chief calls for urgent Ebola action and pandemic preparedness
The recent Ebola and hantavirus outbreaks demonstrate that the world is still vulnerable to rapidly spreading infectious diseases, Tedros Ghebreyesus, the head of the World Health Organization (WHO), warned on Saturday at the close of the 79th World Health Assembly in Geneva.
From Kharkiv to the UK’s health service: Ukrainian doctor rebuilds her life – and helps others do the same
On 23 February 2022, in her home city of Kharkiv, Dr Inna Soldatenko finished work, collected her daughter from school, cooked dinner and prepared a lecture for her students. The next morning, she awoke to explosions.
Exploit available for new DirtyDecrypt Linux root escalation flaw
A recently patched local privilege escalation vulnerability in the Linux kernel's rxgk module now has a proof-of-concept exploit that allows attackers to gain root access on some Linux systems.
Optical condensation using a fiber-based photothermal module
The system achieves about tenfold higher collection efficiency than conventional approaches, enabling the assembly of approximately 10,000 microparticles or bacteria in just 60 seconds.
Ebola outbreak in Central Africa declared a ‘Public Health Emergency of International Concern’
The World Health Organization (WHO) has declared the ongoing Ebola outbreak in the Democratic Republic of the Congo (DRC) and Uganda a Public Health Emergency of International Concern, citing rising cases, cross-border spread and significant uncertainties about the scale of the epidemic.
ASUS Demos Its First “ROG” DDR5 Memory Running at 8800 MT/s On Its Crosshair X870E APEX Motherboard
ASUS's first DDR5 memory modules, the ROG 20th Edition, have been demoed on the ROG Crosshair X870E APEX motherboard.
SpaceX Dragon Docks to Station Filled with New Science Experiments
At 6:37 a.m. EDT, the SpaceX Dragon spacecraft docked to the forward port of the International Space Station’s Harmony module, carrying nearly 6,500 pounds of food, supplies, and equipment for the Expedition 74 crew. This is the 34th SpaceX commercial resupply services mission to the space station for NASA.
SpaceX Dragon Approaching Station Packed with Science and Supplies
At approximately 9:50 a.m. EDT, Dragon will dock autonomously to the forward port of the space station’s Harmony module.
Learner spotlight: Vivian’s path to rights based mental health advocacy
For Vivian Anyango Aola, mental health is deeply personal. Growing up she witnessed people around her struggling with emotional distress without access to support, understanding or solutions. Those early experiences laid the foundations for her work today as a mental health advocate at St. Daniel Comboni mission in Nairobi, Kenya.“Mental health is about feelings – something we all experience every day,” Vivian explains. “Ensuring people are supported in those feelings is what drives my work.” Creating safe spaces and challenging stigmaIn her role, Vivian works closely with people living with mental health conditions and psychosocial, intellectual and cognitive disabilities. Through dialogue, listening and shared learning, she helps create safe spaces where people feel seen, heard and respected. However, stigma and discrimination remain significant barriers.“Witnessing stigma only strengthens my resolve to fight for inclusion, acceptance and equal treatment for all,” she says. Vivian enrolled in the WHO ‘QualityRights in Mental Health’ online, self-paced course available on the WHO Academy learning platform to strengthen her knowledge and advocacy skills. The six-module course provides the foundation for challenging stigma and discrimination and for promoting person-centred, rights-based approaches in mental health.“The course gave me a new perspective,” she says. “It showed me how to support people in ways that respect autonomy and promote recovery, rather than focusing only on treatment.”The importance of language and cultureSince its launch, more than 141 000 people have enrolled in the course globally, and it is now available in 17 languages on the learning platform – the highest number of languages of any WHO course. For Vivian, accessibility is key to transforming mental health systems. “Language is a bridge between professionals and communities,” she explains. “When mental health resources are available in local languages, they reduce misunderstanding, build trust and encourage people to seek help. It also empowers health workers to deliver care in ways that are culturally sensitive and relevant.”In a global evaluation of the course, which analysed data from over 3000 learners, attitudes toward people with mental health conditions improved by 22.78% overall after completing the course, with even greater shifts in low- and middle-income countries (29.18%) compared to high-income countries (20.58%)[1].“The course equips participants with the essential knowledge and skills to transform mental health into a more rights-based, inclusive and recovery-oriented system,” explains Vivian. “It reinforces that change is possible. When people understand rights, dignity and recovery, the entire system can begin to shift.”Mental Health, Brain Health and Substance Use[1] Breaking stigma, discrimination and promoting rights: global evaluation of the World Health Organization QualityRights e-training on mental health, recovery and community inclusion
Framework Laptop 16 Gets NVIDIA RTX 5070 12 GB Upgrade Module for Eyewatering Price
Framework, known for its repairable and upgradeable gaming and productivity laptops, has officially released a Laptop 16 graphics upgrade module with the new NVIDIA GeForce RTX 5070 12 GB. Framework's original Laptop 16 graphics expansion module, which upgrades the original $350 AMD Radeon RX 7700S,...
Science in Space
Astronauts Chris Williams of NASA and Sophie Adenot of the European Space Agency work together in the Kibo laboratory module’s Life Science Glovebox,
Afghanistan risks losing 25,000 women teachers and health workers
Restrictions on girls’ education and women’s employment in Afghanistan could leave the country with a deficit of over 25,000 female teachers and health workers by 2030, the UN Children’s Fund (UNICEF) warned on Tuesday.
Crew Awaits Space Cargo Delivery and Works Advanced Life Science
A Progress 95 cargo craft is orbiting Earth on its way to resupply the Expedition 74 with about three tons of food, fuel, and supplies. Two cosmonauts will be on duty monitoring the Progress 95 when it automatically docks to the International Space Station rear port on the Zvezda service module at 8 p.m. EDT on Monday.
JRC Summer School non-animal approaches in science
The JRC hosts an international biennial Summer School on non-animal approaches in science for post-graduates and early-career scientists, sharing knowledge on cutting-edge non-animal methods, promoting their use in research and regulation, and exploring related career paths.
Space Health Research Fills Day Before Cargo Craft Departs
The trash-packed Progress 93 cargo spacecraft from Roscosmos will depart the International Space Station later today completing a seven-month mission docked to the Zvezda service module’s aft port.
Station Orbits Higher as Crew Runs New Science Experiments
The International Space Station is orbiting higher today after the Progress 93 resupply ship, docked to the Zvezda service module, fired its engines for just over five minutes Wednesday night. The orbital reboost places the space station at the correct altitude for the upcoming Progress 95 cargo mission scheduled to resupply the Expedition 74 crew at the end of April.
AMD Linux Graphics Driver Introducing "Power Module" To Better Match Windows Behavior
With the set of today's AMDGPU kernel graphics driver Display Core (DC) patches is a rather curious addition with wiring up the Linux code to a 'power module' that looks like it will better match Microsoft Windows behavior with the AMD Radeon driver around display-related power savings features.
NVIDIA GeForce RTX 5060 and 5060 Ti Planned With 9 GB VRAM
It was recently revealed that NVIDIA plans to launch a version of the RTX 5050 GPU with 9 GB of VRAM—three 3 GB modules of GDDR7 over a 96-bit bus and 336 GB/s total memory bandwidth. Now, according to a new leak by Hakuitado on the Board Channels forum (via Gazlog), NVIDIA is planning to make the s...
NVIDIA N1 Gaming SoC Surfaces on Laptop Motherboard with 128 GB LPDDR5X Memory
NVIDIA's upcoming N1 SoC, designed for gaming laptops, has officially appeared for the first time alongside its motherboard intended for a laptop. Featuring 128 GB of LPDDR5X memory running at 8,533 MT/s, the SoC is paired with SK hynix modules. NVIDIA's OEM partners for this launch, including Dell ...
As World Cup kick-off nears, a reminder of the power of sport to build bridges and break barriers
The 2026 World Cup final will take place at the MetLife Stadium in New Jersey, a few miles away from UN Headquarters where, on Wednesday, elite athletes and sports administrators spoke about the power of football and other international sports to change the world for the better.
‘We watched them die before our eyes’: Sudan health workers helpless amid medical shortages
As violence forces tens of thousands to flee Sudan’s South Kordofan state, doctors in a key maternity hospital are facing impossible choices – with too few supplies, too many patients, and lives slipping away.
Shaping effective leaders in women’s health: New FIGO Leadership Empowerment Series
FIGO is pleased to launch the Leadership Empowerment Series, a 15-module foundational leadership series designed to equip early career OBGYNs and other women’s health professionals with key skills, confidence and strategic insight needed to drive meaningful, lasting change at local, national and global levels. This series represents a meaningful step forward in FIGO’s commitment to strengthening leadership capacity across our member societies.
DDR5 RAM prices show rare drop amidst memory shortage after TurboQuant announcement
U.S. buyers are starting to see memory prices level off at major retailers. Amazon shoppers will find that some Corsair Vengeance DDR5 RAM is now slightly more affordable. Google’s TurboQuant algorithm may allow AI data centers to use fewer modules, increasing supply for gamers.