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The surprising psychology of morbid curiosity
US defence secretary Pete Hegseth’s plan to livestream the execution of Nidal Malik Hasan has incurred condemnation from human rights groups and politicians on all sides. But according to Coltan Scrivner, an author and psychologist at Arizona State University and expert on morbid curiosity, people are still likely to watch in large numbers. He explains why we are drawn to dark and disturbing content, and Madeleine Finlay tells Ian Sample how consuming this kind of material can harm observers’ mental health
Trump approves firing squad execution for Fort Hood shooter Nidal Hasan
Thirteen people were killed and more than 30 injured in the 2009 shooting at a a medical building
Florida State’s Third-Down Failures Prove Costly Against SMU
Florida State’s third-down failures proved costly against SMU, as execution issues on both sides helped turn opportunities into a 27-24 loss.
Vance doubts Pentagon plan to livestream Fort Hood shooter's execution
The Republican vice president said, “I don’t know that that’s actually going to happen.”
No. 6 Stanford Falters Again in Loss to Louisville
The overall performance was improved, but the execution left Stanford on the losing end yet again
ABC and Trump's FCC battle in federal court over free speech and jurisdiction issues
A lawyer for ABC on Tuesday asked a federal judge to prevent the Trump administration from conducting an unusual, early review of its broadcast licenses, likening it to a looming execution by guillotine that was already chilling the network’s editorial decisions just weeks before the U.S. midterm elections.
Progress Stopped: Titans’ Latest Defeat Offers Few Positives
For weeks, Tennessee Titans head coach Robert Saleh has preached progress, pointing to improvements in the team's execution and understanding of the system. However, the Titans' latest defeat, a 26-3 loss to the Houston Texans on Sunday, leaves little evidence that the team is moving in the right direction.
Fort Hood Victim’s Daughter Opposes Killer’s Livestreamed Execution, Says It’s Not for ‘Entertainment’
The execution of Nidal Hasan, who killed 13 people in 2009, could be streamed live, though President Trump has not made a final decision
Sean Mannion’s offense looks for progress against the Patriots
The Eagles need cleaner execution, better protection and more quarterback rhythm when Sean Mannion’s offense faces New England
A survived execution in Tennessee exposes the grim science of lethal injection
The survived execution of Tennessee death row inmate Christa Pike has exposed the grim science of lethal injection.
Week in Politics: Hegseth's livestream backlash; Greece ambassador Guilfoyle scandal
Bipartisan blowback on Defense Secretary Pete Hegseth's plans to livestream a military execution, plus a scandal involving Kimberly Guilfoyle, the US Ambassador to Greece.
SPECIAL REPORT: Tough Business
A string of vacant restaurant buildings shows that many restaurants in the region are struggling — and several are closing By Stefan Yablonski [caption id=attachment_11132 align=alignright width=401] Smokey Bones Bar & Fire Grill on Route 31 in Clay closed its doors in April. It had been in operation since at least 2008.[/caption] By their nature, most restaurants have a limited life. An astonishing 60% go out of business within three years of opening, largely due to fundamental flaws in the planning of the operation. But even restaurants that experience years of success almost always face eventual closure. The restaurant business is very hard and because of both personal factors and external factors beyond anyone’s control, restaurants don’t last forever. For many restaurants, age is a big factor, according to Kenneth Walsleben, professor of practice, entrepreneurship and emerging enterprises at Syracuse University. “The owners have been at it for 20 or 25 years, if not longer, they want some time to themselves,” he said. Such was the case for Jocko’s Famous Ritz Diner in Oswego. Jocko Reitz bought the building in the late 1970s from Robert Shapiro. However, when he stepped away from the business, it eventually closed. [caption id=attachment_11142 align=alignright width=402] For nearly 80 years, Vona’s Restaurant passed through three generations of family in Oswego. It closed its doors on Dec. 31, 2025.[/caption] For nearly 80 years, Vona’s passed through three generations of family in Oswego. Vona’s Restaurant officially closed its doors on Dec. 31, 2025, when no family member wanted to take over. It is on the market. The Ruby Tuesday in Oswego operated for about two decades before permanently closing in April 2026. The restaurant faced multiple temporary health department closures in 2024 and 2025 due to persistent fruit fly and foundation pest issues. Management posted a final closure notice on the doors in mid-April 2026 and the building was put up for sale. The same pattern has been happening in Onondaga County. The big building once used by Smokey Bones Bar & Fire Grill on Route 31 in Clay remains empty, more than six months after the restaurant closed its doors in April. It had been in operation since at least 2008. [caption id=attachment_11130 align=alignright width=401] Ruby Tuesday in Oswego operated for about two decades before permanently closing in April 2026.[/caption] Just down the road from Smokey Bones, the popular Outback Steakhouse closed in August 2024. Another restaurant took its place, La Cocina Mexican Restaurant, but it closed shortly after. The building sits empty. Other very popular restaurants in the northern suburbs of Syracuse have recently closed. Among them, Fireside by the River in Baldwinsville and Primo Nestico’s Bistro Bar in North Syracuse. “I haven’t really paid attention to the Syracuse area. There has always been some turnover, but there probably has never been a tougher time to be a restauranter than now. It’s just brutal,” Walsleben said. In the first year, roughly 20% to 25% of restaurants close or change hands, according to the National Restaurant Association. [caption id=attachment_11122 align=alignright width=401] Outback Steakhouse closed in August 2024. Another restaurant took its place, La Cocina Mexican Restaurant, but it closed shortly after. The building sits empty.[/caption] “Depending on what statistics you look at, you’ll find that any business has a high mortality rate in the first year. That is just the nature of entrepreneurship,” Walsleben said. “There are certain ones that are getting hit hard while others are more fruitful. “And when you look at the restaurant industry you have to factor in labor which is a large part — typically a third of your expenses — and those costs are going up. And there is always turnover which means investing money to train people. Then you’ve got food costs, which is also a third of the typical restaurant budget. Since the pandemic labor has gone up 41%, food costs have gone up 35%. That’s a big tight squeeze righty there. That’s two-thirds of your budget that has gone up 35% to 40% in the last few years. And then the only way you can make that work is to raise the prices.” The National Restaurant Association reports menu prices are up 36% since February of 2020. In a survey released by the association, more than eight in 10 restaurant owners reported that their food, beverage and labor costs are now higher than before the pandemic. You have to deal with the reality of are the customers willing to pay for that? Walsleben added. Restaurants historically have very thin margins; their profit margin is about 5%. “You have a third that goes into food, a third that goes into labor and about 28%, 29% that goes into everything else — overhead, insurance etc. So that brings you down to your 5% leftover,” he said. “Everything is going up. Customer expectations are going up and people aren’t going to spend that much more. So, you have a tight squeeze here,” Walsleben continued. “Restaurants who use delivery apps, they pay a fee to those guys. Those guys don’t work for free. So, you can kind of see where the squeeze comes from.” Stuck in the middle There are pockets of opportunity; the two extremes of the market can make a profit. But the middle gets squeezed out. “If you are a low-end fast-food kind of place, there is room for that. People have changed their budgets. They are still going out, but they are not spending more,” according to Walsleben. “The high end remains positive. If you have a restaurant that brings a specific experience … a great food product or you are catering to high end customers who aren’t so budget conscious, those patrons are going to expect a high-end experience. They expect excellent food every time. They are expecting excellent service. If you can meet those expectations there is room for you at the top. It’s just the guys in the middle are getting the squeeze from both ends. Tough competition, customer expectations, costs are up. Menu items, you can’t raise the prices as much as you need to. That is why you are seeing a lot of restaurants baling out.” The ones that can adapt quickly are the ones who are doing OK. “Success is heavily dependent on the strength of a restaurant’s concept development and the planning of its execution. Eventually things aren’t always new. Things change. So, if you are in the restaurant business you have got to change your menu — keep things new, fresh and update your meals. It is very fickle industry. One year carbs are out, the next year berries are out. Everybody’s diet changes — constantly chasing the latest phase. You have got to adjust your menu and move with those modifications. If you have a static menu that you have used the last couple years that hasn’t changed except for the pricing, you’ve got a problem,” he said. A lot of times these buildings are singular purpose, he added. “You have a commercially viable kitchen and you got a seating area. There is not a lot of other businesses that cater to that type of a layout. So, it’s pretty common to see another restaurant slide in,” he said. One of the things a banker learns early on is you don’t lend money to restaurants … because they fail so quickly. It is very hard to predict who the winners will be. So, if you are a restaurant in addition to all the other challenges, it is very difficult to get loans, according to Walsleben. “You might work really well in the kitchen. But that doesn’t mean you are a great businessperson,” he said. “Restaurants can fail because the owner didn’t know how to manage things properly. There are a lot of challenges. “There is opportunity at the high end and the low end. But in the middle, that’s the death valley. There are just so many things working against you. You really need to have something that will pull people in and continue to pull people in because you to constantly have to change. Think about a theme and a product that is unique to the area people don’t travel that far these days you have to be able to deliver it in an innovative fashion and keep updating to keep people coming in the door.” Out of Business? How Fast? Do nine out of 10 restaurants fail in their first year, as commonly claimed? No. Survival analysis of 1.9 million longitudinal microdata for 81,000 full-service restaurants in a 20-year U.S. Bureau of Labor Statistics non public census of business establishments in the western US shows that only 17% of independently owned full-service restaurant startups failed in their first year, compared with 19% for all other service-providing startups, according to ResearchGate. The median lifespan of restaurants is about 4.5 years, slightly longer than that of other service businesses (4.25 years). However, the median lifespan of a restaurant startup with 5 or fewer employees is 3.75 years, slightly shorter than that of other service businesses of the same startup size (4.0 years). What Makes a Restaurant Successful? Opening and maintaining a successful restaurant is not as easy as creating a great menu and serving excellent food. It takes more than that, according to local restaurant owners who have been in business for decades in the region. They all agree that there are some guidelines to running a successful restaurant. • Quality food: Successful restaurants know exactly what they serve and who they serve it to. Delivering the same great taste every single time builds loyal customers. • Smooth operations: Friendly greetings and attentive staff make guests feel welcome from the moment they walk in. Hiring staff for personality and training for skill ensures reliable, caring service. • Smart marketing: Exceptional food and experiences naturally get people talking and sharing online. Word of mouth can help entice customers. Consistent social media and targeted advertising brings in new and repeat guests also. The menu is what keeps patrons coming back to Mimi’s Diner in Fulton, located at 201 N. Second St. “We locally source our produce and our meats. Our chicken and biscuits is a popular, popular special,” said Richard Tagliareni, the third-generation owner and general manager. “It’s all homemade. We have consistently served quality food.” His grandfather started the business more than 55 years ago. Mimi’s is engrained in the community. They cater to the community and are very involved in everything from the schools to local events. The first Mimi’s Drive-In opened in Mexico. Then a second in Oswego and then Fulton. Fulton’s Mimi’s is the only one left. “The last couple of weeks have been kind of slower than normal. October is usually a busier month for us People will start coming back around again. Also, the price of gas is affecting some things,” Tagliareni added. “We try to keep our prices in line. You go out to eat, you’re going to spend about a hundred bucks or so for two people for dinner. You come here to Mimi’s you are probably for two people for dinner it’s between $50 and $60. We are trying to keep our prices in line. We did have to increase our prices a little bit but things are looking OK.” For the Press Box, 29 E. First St., Oswego, it’s also about great food and a family atmosphere. “Our sports bar and restaurant was established in 1984,” said Alison Canale Scanlon, manager. “I think putting the time into everything makes a big difference and treating people like family when they walk into your restaurant. That’s how we have always operated since 1984.” “It’s the family oriented aspect,” she added. “Consistency, quality and presentation of our food — that’s the secret to a successful restaurant. We try to be very consistent with it. We treat people like family when they come in; because we know how we want to be treated when we go to a restaurant. We treat people the same or better.”
Cowboys Defense Must Prove its Meeting Meant Something
The Cowboys defense held an honest meeting after its latest loss. Now Dallas must turn accountability into better execution against the Green Bay Packers.
BETMGM Q2 2026 BUSINESS UPDATE
Q2 continued delivery of profitable growth with ongoing focused strategic execution JERSEY CITY, N.J., July 28, 2026 /PRNewswire/ -- BetMGM LLC ("BetMGM"), a leading sports betting and iGaming...
Why America’s Political Divide Is Also an Economic Divide
Plus, the Justice Department sued California to block mail-in ballots from 20,000 people, and Trump nixed the planned livestream of a military execution.
Mt. Frustration and Misery: the sequel
TL;DR: Isolated power and lack of execution sinks chance for a desperately-needed win.
Florida HC Jon Sumrall Has Several Worries Before Auburn Game
Despite a dominant 2-0 start, Coach Sumrall warns of a potential SEC embarrassment as undisciplined penalties and inconsistent execution threaten to derail the Gators' looming clash at Auburn.
Tennessee to execute Anthony Hines as attorneys raise concerns over health, execution team
Fox 17 provides local news, weather, sports, traffic and entertainment for Nashville and nearby towns and communities in Middle Tennessee, including Forest Hills, Brentwood, Franklin, Fairview, Dickson, Clarksville, White House, Greenbrier, Springfield, Gallatin, Hartsville, Lebanon, Mt Juliet, Smyrna, College Grove, Thompson’s Station, Centerville, Murfreesboro, Columbia, Lewisburg, Shelbyville, Manchester, McMinnville, Smithville, Sparta, Cookeville, Hohenwald, Waverly, Camden, Paris, Lafayette, Portland, and in Kentucky, Russelville, Bowling Green, Franklin, Alvaton, Scottsville, Hopkinsville, Glasgow.
It’s Obvious Now Why “Woke 1” Failed. I Have an Idea for How Progressives Can Be Less Annoying Next Time.
It wasn’t the ideas that were the problem. It was the execution.
BREAKING: Netflix to shut down two more game studios
Netflix is sticking with video games but once again reducing the number of studios it owns making games. The streaming giant is closing Los Angeles-based Night School studio, which it acquired in 2021 and plans to close Helsinki-based Moonloot, which was founded in 2022. Just six weeks ago, Night School had released Unhinged, a novel 30-minute first-person horror game, streamable on TVs to Netflix users. The game was hailed by Netflix co-CEO Greg Peters in a call with investors. Six weeks later, Night School is closing. Prior to its Netflix tenure, Night School had developed the award-winning supernatural thriller Oxenfree. A second Oxenfree game followed after the purchase, as well as a mobile game designed to tie in to an episode of the Netflix show Black Mirror. Netflix attributed the studio closures to a prioritization around kids gaming, party games, story-driven fare and games with mainstream hooks, such as a recently released FIFA game. “We see an opportunity to be more focused in our execution, so we are making organizational changes to the business to match those priorities,” a Netflix spokesperson told Game File. Netflix is also cutting jobs from its internal games team. A rep declined to say how many jobs were being lost by these cutbacks. “We are incredibly grateful to the talented colleagues we’re saying goodbye to today. We thank them for all their contributions to Netflix, and wish them the best,” the rep said. Netflix started releasing video games, initially on mobile as a free bonus to subscribers, in 2021. By 2023, Mike Verdu, then the head of Netflix’s game operations, was telling me that the company was committed to growing carefully, as it offered more games and built up internal game studios. At the time, it hadn’t made any gaming job cuts. Since then, Netflix has altered its approach. In 2024, it shut down Team Blue, a start-up studio led by ex-Call of Duty and Halo developers that was exploring making a high-end first-person game for the service. Last October, Netflix shut down another studio, Boss Fight, shortly after Peters praised the team’s Squid Game game to investors. (One of Boss Fight’s main developers now works on the Netflix FIFA game for outside studio Delphi.) And in December, Netflix sold cozy game studio Spry Fox back to its founders. Amid all of this, Netflix has shifted from emphasizing mobile games to offering games through TVs and PCs, via streamed connections, with phones used as controllers. That’s how Night School’s Unhinged worked, along with games such as Boggle and Party Crashers that have collectively helped the Netflix game controller app chart well on mobile app stores. The studio cuts leave Netflix with a central gaming team that works with external developers, and a dedicated first party studio in, Helsinki-based Next Games, which produced many of the company’s couch-centric party games. The move away from having a roster of internal game studios aligns with Netflix’s own approach to shows and movies, which are largely produced externally. The company owns few TV/film production studios of its own. The gaming industry overall is seeing large holders of multiple studios cut back, with Sony, Ubisoft, Embracer, Microsoft and other giants closing or selling off studios. Cuts in California-based studios, where costs often run relatively high, have been particularly acute. Netflix has faced skepticism about its gaming plans for years. The moves today are likely to fuel them, and the company has few upcoming projects to counter the narrative. Among the few hinted, acclaimed independent studio Don’t Nod said last year it was working on a game tied to a major Netflix franchise.
Trump says Fort Hood shooter execution won't be livestreamed after bipartisan backlash
The announcement earlier this month from Defense Secretary Pete Hegseth that Hasan's execution would be public prompted significant blowback from both Republicans and Democrats, with many pointing out that the images could be used to fuel radicalization.
Rambling about politics, Christa Pike and the changing times
Are we at risk of creating another convicted murderer with a fan club?
'It's not entertainment': Black soldier who survived 2009 Fort Hood shooting slams idea of livestreaming shooter's execution
Retired Army Sgt. Alonzo Lunsford says he'll attend Nidal Hassan's execution, but does not want it to be seen as "entertainment."
Patrick’s Politics: The public execution of morality
Content Warning: The following article contains discussions of execution The United States military is about to carry out its first execution in 60 years, and this time they’re putting in a v…
Avatar Entertainment Adapting Vicente Vallés Novel ‘La Caza Del Ejector’ As TV Series
EXCLUSIVE: Avatar Entertainment has acquired rights to Spanish journalist Vicente Vallés’ novel Hunting the Executioner (La Caza del Ejecutor). The London- and L.A.-based production and management com...
Pete Hegseth vows to make first firing squad execution in decades ‘public’
US Defense Secretary Pete Hegseth vowed in an interview this week that the execution of the man who killed 13 people in a mass shooting at Fort Hood in 2009 would be “public.”
The First AI Advantage Was About Productivity. The Next One May Give Entrepreneurs a Bigger Edge.
The next AI advantage for entrepreneurs isn't about more content or productivity. It's moving from idea to execution faster.
‘SNL’ Mocks Trump’s Nobel Peace Prize Snub, Public Execution Plan
The NBC comedy show took aim at the president’s Nobel ambitions and Pete Hegseth’s proposal in its latest episode.
Black Book: Australia's 2027 Health IT Market Shifts From Pilots to Proof
Post-HIC 2026, provider study finds interoperability, clinical cyber continuity and statewide EHR execution will dominate the next buying cycle NORTH SYDNEY, AU / ACCESS Newswire / August 9, 2026 / Black Book Research today announced the publication ...
Pentagon plan to livestream execution of Fort Hood shooter prompts fierce political backlash
The move has been branded as ‘disturbing’ and compared to the actions of terror groups by US lawmakers
Kustom Entertainment Amends Divestiture Terms with Cycurion into Upgraded $6.1M Deal Featuring Immediate Cash Injection and 12% Yielding Preferred Equity
Captures $250,000 in immediate non-refundable capital, eliminates warrants in favor of preferred equity, and sharpens execution on its $100B live entertainment and ticketing expansion. OVERLAND PARK, KS, July 27, 2026 (GLOBE NEWSWIRE) -- Kustom Entertainment, Inc. (Nasdaq: KUST) (“Kustom” or the “Company”), an emerging force in live music festival production and proprietary ticketing operations, today announced a major upgrade to its divestiture strategy. On July 23, 2026, the Company executed t
Lewis Line Appoints Jackie Trimble as Director to Lead Growing Entertainment Division
Today, Lewis Line, the Gen-Z-owned public relations firm based in LA, announces the appointment of Jackie Trimble as Director of Entertainment, where she will lead strategy and execution as the firm expands from music into the wider entertainment industry.
TN Politics: Task force anniversary brings lower crime, ongoing questions
Otis Sanford discusses the Memphis Safe Task Force, Marsha Blackburn's campaign and botched executions.
CEOs Are Using AI, but Few Are Planning for What Comes Next
AI should be embedded into business planning to strengthen execution, governance, competitiveness, and long-term growth.
Chino Hills Murder-Kidnapping Tied to Business Dispute, Officials Say
The execution-style killing last week stunned the city of Chino Hills, an upper-middle-class community roughly 35 miles east of downtown Los Angeles.
Will Brazil Betting Ban Change Flutter Entertainment's (FLUT) Narrative
Flutter Entertainment reported that Don Liu resigned as Chief Legal Officer effective September 30, 2026, with Group Company Secretary Edward Traynor stepping in as interim Chief Legal Officer from October 1, 2026. Brazil's recent ban on online betting removes a previously important market opportunity for Flutter Entertainment, placing greater emphasis on execution in existing regulated regions and any remaining expansion plans. We will now look at how Flutter Entertainment's investment...
Byrum Brown's Turnovers Headline Joel Gordon's Concerns Before Georgia
Auburn offensive coordinator Joel Gordon addressed three major concerns ahead of facing No. 1 Georgia: Byrum Brown's interceptions, slow offensive adjustments and pre-snap penalties. The Tigers must improve their decision-making and execution to compete in Athens.
Attitudes on the death penalty have changed since Christa Pike was convicted. Using the issue for politics hasn’t
When Christa Pike tortured and killed her classmate Colleen Slemmer in 1995, support for the death penalty was near its peak in the United States.
iOS 27 and iOS 26.7 Fix More Than 100 Security Bugs
Today's iOS 27 update addresses over 100 security vulnerabilities, which is a good reason to install the new software. If you don't want to update to iOS 27 yet, Apple also released iOS 26.7 with over 80 security fixes. 75 of the fixes are shared across both updates, so iOS 26.7 addresses many of the same issues. There are multiple kernel fixes, including one that could allow a malicious app to gain root access and another that could allow for Bluetooth remote code execution.
Anthropic merges its Claude chat and agentic Cowork products into a single AI assistant as part of a push to build an AI superapp
Anthropic is folding its chat and autonomous task-execution products into one Claude interface, while adding collaborative document and presentation tools.
Analysts eye RevMed’s pancreatic cancer launch, Merck’s data blitz for Q3 earnings
Bellwether Johnson & Johnson will kick off the third quarter earnings reporting period on Tuesday, with analysts searching for news on business development, launch execution and more.
After Failed Execution, Health Workers Say State’s Rules Flout Medical Ethics
The death penalty is legal in 27 states, and lethal injection is the primary method. That means involving medical professionals to store, test, and inject the drugs. After a botched execution in Tennessee, doctors and nurses there say medical professionals need to be removed from the process completely.
Dave & Buster's Entertainment Q2 Earnings Call Highlights
Dave & Buster's Entertainment (NASDAQ:PLAY) reported lower second-quarter revenue and earnings but said same-store sales trends improved during July and the early weeks of its third quarter as the company pursues a “back-to-basics” strategy centered on traffic, value and store execution. Revenu
Christa Pike's health has seen 'profound turnaround' in last three days, lawyers say
Pike's lawyers say her recovery is "remarkable" as they give an update on her condition after she survived an execution attempt by lethal injection.
Inside Hegseth’s political ambitions — and the risks threatening them
Defense Secretary Pete Hegseth has rarely shied away from controversy, but his latest spectacle — announcing that the convicted Fort Hood mass shooter’s execution would be livestreamed — proved a bridge too far even for President Donald Trump.
Kustom Entertainment Amends Divestiture Terms with Cycurion into Upgraded $6.1M Deal Featuring Immediate Cash Injection and 12% Yielding Preferred Equity
Captures $250,000 in immediate non-refundable capital, eliminates warrants in favor of preferred equity, and sharpens execution on its $100B live...
Seaport Entertainment: Qualitative Story Seems Interesting, But Execution Risks Suggest Caution
Seaport Entertainment Group appears to have 90-150% upside, yet positive cash flow remains elusive. See why SEG stock is a Hold.
After failed execution, health workers say Tennessee's method flouts medical ethics
After a botched lethal injection in May, dozens of Tennessee medical professionals told the governor that healthcare professionals shouldn't help with executions, no matter the method.
Trump says he will ‘make a decision’ on Hegseth plan to live-stream execution
The Pentagon has said a firing squad for the Fort Hood shooter is scheduled for Dec. 3. “By showing it, maybe other people won’t be doing what he did,” the president said.
PROFILE: Ben Sio
New President of CenterState CEO Brings Nearly Two Decades of Experience to Drive CNY Growth By Stefan Yablonski Ben Sio serves as president of the CenterState Corporation for Economic Opportunity — or CenterState CEO. The independent Syracuse-based nonprofit is committed to creating inclusive, equitable and sustainable economic growth in Central New York. “I started in this position in March, so it has been six months. I’m in my 19th year with CenterState,” he said in August. As president, he is responsible for overseeing the organization’s administration and governance, while leading and executing its vision to be an effective advocate, exceptional employer and a force for positive outcomes for the community. He previously served as chief of staff and senior vice president of strategy, policy and planning, overseeing the organization’s long-term strategic planning, consulting, corporate governance, fundraising and development, land-use planning and government relations. In his years with the organization, Sio has led or supported many high-profile strategic initiatives including the creation of the CNY Rising Plan, the launch of the NUAIR Alliance and the region’s UAS strategy, the creation of the Micron-enabled Community Priorities Document and the recently awarded NY Smart I Corridor Tech Hub. “When we decided to split Rob’s [Simpson] role into two positions, he has the CEO title and I got the president title. Rob remains focused on forward looking vision strategy for the organization and I’m more focused on the day-to-day operations,” he explained. “I’m also responsible for building consensus around strategic needs and priorities and managing the change necessary to drive execution. It’s an eventful job. “The experiment that we call CenterState is always evolving and shifting and addressing where we see market demand and market failure. “If we see something in our economy that isn’t going the way we think it should go, then whether it is housing development or workforce development or something else, we are always figuring out how to step into these situations and address those challenges.” “We are the largest ever in terms of staff that we have ever been. We are no longer the 20-person organization we were when we started out many, many years ago,” he said. “There are more day-to-day things to take care of. But also there is just so much happening in the community right now that is pulling CenterState and our expertise in so many directions. I tell people if we were bored and not busy, then I’d be really concerned about what we are doing. But we are not bored. We’ve certainly got our hands full — and that is a good thing.” CenterState has now approximately 63 employees on its staff, according to recent nonprofit database records. It’s involved in myriad programs, ranging from Genius NY, a business accelerator competition for uncrewed systems, IoT and robotics startups, to CenterState Up Start, a collaborative business development program that connects local, service-based businesses and aspiring entrepreneurs to the tools and networks that help them thrive. CNY Guy Through and Through A Central New York guy through and through, Sio was born and raised in Skaneateles. “My mom was a teacher, an art teacher. My father worked for many, many years with National Grid. He was there through the transition from Niagara Mohawk to National Grid,” he said. “Neither of my parents were touched by cutbacks and job loss. But I grew up going through that transition and being concerned that there were rounds of layoffs. My childhood connection to the economy here in Central New York … years ago it was on the decline. There were people that lived here that were concerned about losing their job. They were thinking they lived in a place that didn’t show much promise.” That narrative translated to his generation, he added. “The kids that grew up in the ‘90s in Central New York were very much told, directly or indirectly, by their parents, that they had to go somewhere else to find economic opportunity. That is what I grew up thinking,” he said. “I only went a few miles down Route 20 for college — in Geneva, New York; I graduated from Hobart and William Smith College with a bachelor’s degree in public policy and political science. “I got real interested in regional economies; because what makes regional economy is what makes the economy successful. And when I graduated, I had an opportunity to move to Washington, DC and work down there at a nonprofit doing this work.” However, he decided to stay in Central New York. “I got hired two weeks after I graduated. I got hired by the Greater Syracuse Chamber of Commerce. At the time it was one of two entities doing economic development in Central New York — [the Greater Syracuse Chamber of Commerce and the Metropolitan Development Association] — and it eventually became CenterState CEO,” he said, referring to 2010 merger between the two organizations. During his time at CenterState, Sio has also split time at the Brookings Institution in Washington, D.C., where he supported communities developing export and foreign direct investment (FDI), a long-term cross-border investment where an individual or company from one country buys a lasting stake or control in a business located in another country. The program — known as Global Cities Initiative — was designed to help leaders in major U.S. and international metropolitan areas reorient their local economies toward global markets. “Early on in my tenure at CenterState, we had done a lot of work with the Brookings Institution, just regional planning stuff. We worked with them on developing a regional export plan, to export more products out of Central New York and a larger business plan for the region. They hired me on to help replicate those plans in different parts of the country,”Sio explained. “So, I worked there for three or four years. I worked for CenterState, but I was technically loaned to Brookings for a period of time to help them do this work elsewhere.” Family ties “My wife is Carly. We have been married 14 years. We have two kids, a 3-year-old and a 7-year-old. “With a 3-year-old and a 7-year-old, fun is a relative term these days. We do a lot of hiking. The kids this summer got very interested in waterfalls. We’ve hit every waterfall we could in a short hike — we’ve done Skaneateles and some others.” “I do woodworking and wood turning — it’s a branch of woodworking; you use a wood lathe. My big thing there is making wood bowls. I do that in most of my free time, which is not much,” he quipped. “I like to get into my woodshop and make a bowl and decompress and turn off the rest of the world for a little bit. I usually do it late at night when the house is quiet. It is definitely my escape from the day to day. I make a lot of bowls; all different sizes, all different species of wood. It’s a fun thing to do for me.” He gives away many of his creations. “They are mostly gifts — I don’t really sell them. I really don’t have time to go set up a booth at a fair or craft show. I usually give them away. I donate them to different things. If you are in my periphery, you’ve likely received a salad bowl from me as a gift. I just need to find something to do with all the stuff that I create,” he said. Lifelines Name: Benjamin Sio Position: President, CenterState CEO Birth Date: Not provided Birth place: Syracuse Residence: Westvale Education: Hobart and William Smith Colleges in the Finger Lakes Affiliations: Member of the boards of Skaneateles Festival, Greccio Foundation, Interfaith Works, CNY Community Foundation Personal/family: Married with two kids Hobbies: Woodworking and woodturning
Syneos Health and Tufts CSDD Study Shows Clinical Trial Performance Depends More on Operating Model Design Than Sourcing Strategy
Data From 13 Leading Pharmaceutical Companies Points to Execution, Governance and Partner Coordination as Key Drivers of Trial PerformanceMORRISVILLE, N.C., Sept. 16, 2026 (GLOBE NEWSWIRE) -- Syneos Health®, a leading fully integrated biopharmaceutical solutions organization, today announced findings from a first-of-its-kind benchmarking study conducted by the Tufts Center for the Study of Drug Development. The research examined one of the industry’s most persistent questions: does the sourcing
Intel Panther Lake Teardown, 18A, BSPD, GAAFET, SemiAnalysis STEEL
Panther Lake debuts the first commercial implementation of backside power delivery (BSPDN), introduces Intel’s first iteration of gate-all-around (GAA) transistors, and showcases their advanced packaging capabilities with its Foveros-S assembly. With Panther Lake, Intel’s manufacturing arc has shifted from nebulous roadmaps to shipped silicon, a significant milestone on their long road back to competitive semiconductor manufacturing. To evaluate the extent of Intel’s comeback, we tore down Panther Lake. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Our teardown traces 18A from its four-sheet RibbonFETs (Intel’s marketing name for GAAFETs) and gate stacks through contacts, frontside and backside wiring, and the bonded carrier. We explain how these material and integration choices improve gate control and reduce resistance, while adding capacitance, thermal resistance, and process complexity. Our measurements put Panther Lake’s 18A compute logic and TSMC N3E GPU logic at similar logic density. However, 18A does not lead TSMC N3P, N2 or Samsung SF2 in peak density. Panther Lake’s CPU cores are incremental updates, and the high-end GPU still uses TSMC N3E. Panther Lake assembles one compute tile, one GPU tile, and one I/O tile atop a passive base tile using Intel’s Foveros-S advanced packaging. Both compute tile variants use Intel 18A. The Xe3 GPU options are a 4-core GT1 tile on Intel 3 and a larger 12-core GT2 tile on TSMC N3E. Both I/O tile variants use TSMC N6. [1], [2] Our analysis centers on the PTL-U compute tile, both the 4-core and 12-core GPU tiles, as well as the 12-lane I/O tile. In conventional chips, power and signal are routed through the same frontside metal stack towards the device frontend. Power rails consume scarce routing resources near the transistors, while tall via stacks carry VDD and VSS from the coarse upper wires to local rails. Backside power delivery (BSPD) moves the main power network behind the transistor layer, to the backside, separating it from frontside signal routing. We covered BSPD and its impacts in 2024. [3], [4], [5] Intel’s BSPD implementation, branded as “PowerVia”, routes power through dedicated backside metals to nano-TSVs, which connect those rails to local source/drain (S/D) contacts. Implementing that separation requires Intel to build the interconnect stacks from both sides of the wafer. The frontside comprises the M0-M14 signal stack, while the backside comprises the BM0-BM5 power stack. M0 and BM0 are closest to the transistors. The nano-TSVs connect the two sides, but Intel patterns and etches each via from the front after forming the contacts. A narrow via runs from the side of the contact deep into the silicon substrate. Intel then completes the frontside signal metal stack, bonds the wafer to a carrier, flips it and removes the original substrate until the buried via tips are exposed. The backside metal stack is then deposited directly on the revealed vias. The nano-TSV and backside-via profiles taper in opposite directions because Intel forms them from opposite sides of the wafer. The transistor structures form the FEOL. Local contacts and nano-TSVs connect them to the wiring. M0 begins the frontside interconnect stack. The silicon carrier remains attached above the frontside interconnects. It supports the device wafer during substrate removal and backside processing and remains part of the finished chip’s thermal path. PowerVia removes the main power distribution from the congested frontside metals, routing supply through shorter and wider backside wires. Its lateral landing still occupies area in the standard cell, so it recovers less cell area than a direct backside contact. [3] Nano-TSVs beside the logic devices carry VDD or VSS from the backside power network, while signal connections continue upward through the frontside metals. Backside Interconnects Samsung SF2 data is included for comparison to Panther Lake’s within this article. SF2 is the incumbent GAA foundry node but lacks BSPD, serving as a useful reference to evaluate 18A. A full teardown of Samsung’s S26 products, processed on SF2, will be shared soon.Nanosheet-cut EDS comparison. The PowerVia supply path runs from the backside Cu rails through Mo-lined W nano-TSVs to the local transistor contacts. In this cross section, the tapered connection spans roughly 150 nm from the contact level to BM0. The Ta liner confines Cu and promotes adhesion to the surrounding stack; the AlOₓ etch stop controls the next dielectric etch above the rail. Dielectric beneath the ribbons electrically separates the devices from the backside wiring and removes the conducting silicon body below the channel. [6] AlOₓ serves as an etchstop (ES), enabling endpointing and protecting the underlying layers. Low-volatility aluminum fluoride reaction products resist the fluorinated plasma, allowing a thin AlOₓ film to protect the metal while the surrounding low-k dielectric is removed. [6], [7]. While the BM0 and layers above the M1 lines show double AlOx layers, Our SMIC N+3 teardown showed single AlOₓ layers. SMIC uses a simpler local AlOₓ substack, while the remaining cap and etch sequence provide the required landing protection. So why double layers? The closely spaced AlOₓ doublets provide two protected endpoints in the etch sequence. Intel documents an AlOₓ/SiN/AlOₓ stack that explains the benefit. The main dielectric plasma etch stops on the first AlOₓ film; a selective wet clear opens that film; a second plasma etch removes the intermediate SiN and stops on the second AlOₓ film. The final wet clear exposes the metal landing surface. SiN is the intermediate dielectric in Intel’s published example. [8] The second stop protects the metal through a cap breakthrough. Wide openings can etch faster than narrow ones, and etch depth varies across the wafer. Metal under an early-clearing opening would otherwise be exposed while other openings still need more etching. Staged protection widens the process window and reduces metal erosion, corrosion and void formation. [8] TSMC documents AlN/AlOₓ/SiOC/AlOₓ above Cu, with AlN blocking Cu diffusion, and a simpler AlN/SiOC/AlOₓ variant that omits one AlOx film. [9] Levels with different opening sizes, aspect ratios, pattern densities and cap materials need different etch margins. A double AlOx stop is useful where another protected endpoint justifies the added processing. The extra film adds formation, selective opening and cleaning steps, plus another set of interfaces to control adhesion, moisture, and stress. These blanket films are opened through the existing via pattern, so each film does not require another lithography mask. AlOₓ adds parasitic capacitance when it replaces lower-k dielectric; two thin AlOₓ films can nevertheless contain less AlOₓ than one thick film. Total thickness, placement, and theintermediate dielectric determine the electrical cost. Deposition chemistry also changes AlOx permittivity and residual hydroxyl content, which can oxidize the underlying metal. [7], [8], [10], [11] The backside stack separates into relatively fine BM0-BM2 wiring near the devices and coarser BM3-BM5 power distribution. The largest pitch increase occurs between BM2 and BM3. BM0’s pitch closely matches the logic-row height, fitting local power delivery to the cell rows. Higher levels aggregate current through larger conductors: routing density becomes less important than low resistance and current capacity as the network approaches the package. This hierarchy provides wide power wiring for the power delivery network without consuming scarce frontside signal-routing resources. [3] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Frontside Interconnects Intel 18A combines Mo-lined W contacts and nano-TSVs with a separate backside Cu power network. Samsung SF2 keeps power on the frontside, using Ti-based contact interfaces and Ta-based barriers and Co liners around Cu wiring. In 18A standard-cell rows, backside power rails supply the devices through nano-TSVs within the cells, freeing frontside routing resources. Samsung’s M0 accommodates both power and signal connections. From the device toward M0, the connection runs through a Ti-based S/D interface, W contact fill, a Mo-lined W via, and the Cu M0 wire. Mo supplies a conductive nucleation and adhesion layer for W, replacing the resistive TiN liner used in conventional W integration. This increases the effective conduction volume within the feature while retaining W fill and its established polishing, cleaning and etching processes. Intel’s Mo/W patent describes this integration tradeoff. The nano-TSV uses the same Mo-lined W construction in the backside supply path. [12] The move from TiN to Mo is an incremental change. While a full Co or Mo fill can also reduce the volume lost to liners in very small features, it requires new integration schemes that increase complexity and risk. Cu remains attractive for wider wires due to its low resistance. As wires and vias shrink, the diffusion barrier consumes an increasing fraction of their cross-section. [12], [12], [14] Intel uses Co/Ru liners at M0-M1, Co at M2-M4, and Nb at M5-M9. The lower-level liners help Cu adhere and reduce void formation during trench fills. Applied Materials’ Endura has new thermal control that facilitate wetting process, so the thin film continuity is good enough that good capillary pressure will drive Cu atoms to the via bottom without voiding. Intel’s choice to use Nb is particularly interesting. Intel’s Nb patent describes a conductive diffusion barrier intended to reduce the barrier’s contribution to resistance relative to conventional Ta-based barriers, particularly at via bottoms where all current crosses the barrier. The patent pairs Nb in coarser levels with the option of lower-cost PVD processing. [15], [16] The upper metal layers support thicker barriers formed through physical vapor deposition (PVD) despite its worse coverage and uniformity. Meanwhile, the lower metal layers require thinner barriers deposited through conformal atomic layer deposition (ALD). Co/Ru adds another material interface and requires controlled deposition and Cu fill. Changing liners and barriers by metal layer allows Intel to optimize interconnect resistance, process complexity, and reliability. [15, 16] RibbonFET, Intel’s name for its gate-all-around FETs (GAAFETs), replaces the FinFET’s vertical fins with four stacked horizontal silicon nanosheets, allowing the gate to surround the channel on every side. The path to GAAFET begins with the planar transistor. A planar MOSFET places the gate above the channel between its source and drain. Pairing an NMOS with a PMOS transistor creates a CMOS inverter, in which the NMOS pulls the output low for a high input, and the PMOS pulls it high for a low input. The gate must retain electrostatic control of the channel to ensure clean switching. As gate lengths shrank, the drain began to compete with the gate for that control, increasing off-state leakage. Electrostatic control was restored through an architectural evolution that raised the channel into a vertical fin and wrapping the gate around three sides. Called “FinFET”, this new architecture packed more effective channel width into a smaller footprint. Further scaling made it harder to maintain both drive current and leakage within smaller cells, and reintroduced the same problems planar MOSFETs faced. Nanosheet GAAFETs close the fourth side by replacing the vertical fin with a stack of horizontal nanosheets, each surrounded by the gate. The tighter electrostatic control suppresses leakage at shorter gate lengths while stacking adds effective channel width within the cell footprint. In a FinFET process, channel width changes in discrete steps as designers must add or remove whole fins. Nanosheet width can instead be adjusted continuously within the process’s design rules. Wider sheets increase drive current, while narrower sheets reduce capacitance at the cost of drive current. Intel 18A uses stacks of four nanosheets each and varies their widths across logic and SRAM. At the process level, adding more sheets to each stack increases effective channel width and drive current, but complicates fabrication. RibbonFET vs MBCFET Samsung began GAAFET production in 2022 with SF3E, following with SF3 and now SF2. Its ‘MBCFET’ provides a useful structural comparison with Intel’s first RibbonFET implementation. [17] STEEL is digging deeper into SF2, used in the Exynos 2600, and TSMC’s GAAFET N2, used in Apple’s A20 Pro, in upcoming newsletter articles. We’re throwing some teasers on X. Let’s compare Samsung SF2’s MBCFET with Intel 18A’s RibbonFET. Subscribe Even to the untrained eye, Intel’s extra nanosheet is obvious. Intel stacks four ribbons to Samsung’s three. Samsung’s sheets are much wider in these fields, so both sheet count and width matter to the available channel perimeter. Sheet width also changes which silicon surfaces carry current. On conventional (001) silicon, wide nanosheets emphasize the broad top and bottom surfaces, favoring electron transport; the larger sidewall contribution in a narrow sheet favors hole transport. Thinner sheets improve gate control but increase confinement and scattering. This makes width and thickness part of the NMOS/PMOS balance, alongside strain and threshold voltage. [18], [19] GAAFET designs like 18A use different work-function-metal (WFM) stacks for NMOS and PMOS. Around each ribbon, a thin SiOx interfacial layer separates the silicon channel from the HfOx high-k dielectric, with La providing dipole tuning and the WFM wrapping the dielectric. NMOS uses a TiAl-based stack, while PMOS uses TiN WFM. W fills the remaining gate trench, providing a lower-resistivity path where the work-function layers are no longer needed. In this field, the PMOS stacks leave room for W between ribbons, while the NMOS stacks occupy more of those gaps. A silicon-based dielectric marks the P/N boundary, allowing the PMOS and NMOS gates, sharing the same gate trench, to be processed sequentially. Fast logic paths, retention circuits, and SRAM need a family of threshold options. Changing threshold without substantially changing device dimensions, capacitance or fabrication complexity is valuable. FinFET processes typically use different work-function-metal stacks. In a four-ribbon GAA stack, the narrow sheet-to-sheet gap limits how much WFM can fit around each channel. La in the gate dielectric creates interfacial dipoles at the SiOx/HfOx boundary, shifting effective work function and tuning threshold voltage. This gives Intel another control alongside its NMOS and PMOS WFM stacks. Low-threshold devices improve critical-path drive; higher thresholds reduce leakage elsewhere. Dipole tuning is especially useful in GAA because it changes threshold without consuming the narrow intersheet gap with thicker WFM. Precise control of La incorporation, diffusion and interface quality has long been a challenge, limiting viability in high volume production but is now seen from every leading-edge foundry. Intel’s patent describes depositing a dipole-forming oxide above HfOx and annealing it toward the interfacial oxide before completing the work-function and fill metals. This separates threshold tuning from the space available for metal. Newer research addresses the thermal cost: imec’s 2026 dipole-middle research inserts the shifter between two HfOx depositions, shortening the diffusion path while protecting SiOx during patterning. [20], [21]Matched-cut EDS, Intel 18A (left) vs. Samsung SF2 (right). Intel retains raised source/drain epi beneath its contacts, while Samsung recesses W deep into the epi to form a V-shaped Ti-lined interface. The deeper contact increases metal-to-semiconductor area and shortens the current path from the lower sheets, reducing contact and spreading resistance. It also removes epi volume and brings the contact etch closer to the channel ends. Retaining more epi preserves the material available for strain transfer, especially from SiGe into PMOS. These geometries balance contact access against stress engineering and etch margin. [22], [23] Samsung stacks three sheets to Intel’s four ribbons, and both processes use sheet width to tune drive strength. In our Samsung cross-sections, widths range roughly from 19 to 30 nm in the NPU rows and 37 to 50 nm in the CU cell. The Samsung nanosheets taper, with the widest sheet at the bottom and the narrowest at the top. Both processes use HfOx gate dielectric and Ti-based work-function stacks, with Al in the NMOS stack. In the Samsung devices shown here, the dielectric and WFM occupy the intersheet gaps, leaving W above the top sheet. Intel’s PMOS stack leaves more room between ribbons, and W fills those gaps while the thicker NMOS stack leaves W mainly in the upper trench. Gate-stack EDS maps. The W between Intel’s PMOS ribbons provides a conductive path close to the lower gates. Where WFM fills the entire gap, the gate still surrounds the channel, but voltage reaches it through the more resistive work-function films. Thinner WFM and dipole tuning preserve room for low-resistivity fill; Mo and Ru are alternative fill metals being developed for further scaling. [24] A masked, sequential WFM flow explains the different gate heights and inter-nanosheet fill. The proposed sequence below shows how separate NMOS and PMOS work-function steps produce that geometry. Enabled by the BSPDN process, Intel replaces the dense-logic silicon subfin with dielectric, removing the parasitic conduction path below the ribbons and reducing substrate-related capacitance. A retained silicon body as in classical, non-SOI, planar and FinFET designs needs junction and punchthrough-stop engineering to suppress leakage. Dielectric isolation makes that leakage less sensitive to the subfin doping profile but adds removal and fill steps. It also weakens the direct thermal path through silicon, making the contacts, metal stacks and package more important for heat extraction. [24], [26] Fluorine is concentrated around selected Intel device structures in the maps. WF6 is a standard precursor for W nucleation and fill, while barrier films protect adjacent dielectrics from fluorine attack. Low-fluorine W processes reduce the residual-F burden. Chloride-based precursors avoid introducing F during W deposition, but require control of chlorine attack, nucleation and fill quality. The integration target is a continuous, low-resistance W path with a thin protective liner and minimal chemical damage to the surrounding stack. [20], [27], [28] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. We measured cell height, gate pitch, metal geometry, and ribbon dimensions at the XTEM sites shown below. The tables group these dimensions by site and device polarity. Our “sheet cuts” cross the silicon channel and show the ribbons end-on. “gate cuts” run along the channel through successive gates. The 18A logic cell dimensions point to a five-track logic library while the N3E and Intel 3 cell dimensions evidence a seven-track logic library. The DDR-PHY uses wider M0 wires and much larger spacing than core logic. That trades routing density for lower wire resistance and weaker coupling between neighboring nets. The geometry suits the current delivery and coupling requirements of analog, clock, and I/O circuitry. PowerVia lets 18A combine a compact cell height with wider M0 geometry by moving the main power rails off the signal-routing tracks. That relaxes local wire scaling while preserving a small cell footprint. Cell height and gate pitch set the geometric density; pin access and routability determine how much of it a real block can use. [29] The biggest takeaway from our gate-pitch measurements is that Intel 18A compute logic and TSMC N3E GPU logic have similar density in the Bohr representative-cell model. The 18A example is 18.6% denser than the Intel 3 GPU example. Gate pitches are nearly identical across the three sites, so cell height drives most of the difference. The Bohr model combines a four-transistor NAND2 spanning three gate pitches and a 32-transistor scan flip-flop (SFF) spanning nineteen pitches, weighting their densities 60:40. The sensitivity column shows how independently changing cell height and gate pitch by ±1 nm changes the result. This compares representative cell geometries; whole-die density also depends on cell mix and placement. The 18A P-core gives M0 substantially more metal cross section than the N3E vector engine. Treating each profile as a trapezoid gives 2.63 times the area per line and 1.84 times the area after normalization by routing pitch. The larger section reduces the geometric contribution to line resistance and lowers current density for a given current. Taller and wider wires also add capacitance, so circuit delay depends on the balance of resistance and capacitance. The DDR-PHY has less metal area per routing width than the 18A core fields, while remaining above N3E. [30] Area = height × (top CD + bottom CD) / 2, including liners. Area/pitch normalizes by routing width. Taper is the symmetric sidewall angle from vertical, with the largest angle belonging to the DDR-PHY. Compute tile The measurements show how ribbon dimensions and gate-stack geometry vary across the compute tile and between NMOS and PMOS to balance channel drive, gate load and the space needed for the dielectric/WFM stack across logic, SRAM and the DDR-PHY. Width mainly changes available channel perimeter; thickness also changes electrostatic control and carrier confinement. Gate-stack thickness then determines the space left for low-resistivity fill P-core and LP E-core logic Both the P-core and LP E-core use multiple nanosheet widths. Widths are measured on high-magnification XTEMs while wider-field images demonstrate additional width choices within the LP E-core. Multiple widths are expected even within an LP E-core. Timing-critical paths, buffers and cells with different fanout need different drive strengths. The lower-magnification fields show this width diversity beyond the sites quantified in the table. L2 and L3 SRAM GAA gives SRAM designers another way to balance the pull-up (PU), pass-gate (PG), and pull-down (PD) transistors. FinFET bitcells set device strength through fin count while GAA adds nanosheet width as a sizing knob. In a 6T SRAM cell, a strong pull-down relative to the pass-gate limits read disturbance, while a strong pass-gate relative to the pull-up improves writability. During a write, the pass-gate and write driver pull the node storing “1” below the inverter trip point. During a read, the pull-down holds the node storing “0” low. Bias, threshold voltage, mismatch and assist circuitry set the remaining margin. FinFET high-current cells commonly use a PU:PG:PD fin-count pattern of 1:2:2, a device-sizing ratio rather than a current ratio. Ribbon width lets Intel balance SRAM strengths without adding whole fins. The L2 cell uses its narrowest ribbons for PU and widest for PD, improving writability and read stability respectively. Intel’s disclosed HCC operates without assist; its denser HDC uses negative-bitline write assist. Pulling the selected bitline briefly below ground increases pass-gate overdrive so it can overpower the pull-up at lower supply voltage. That buys density and low voltage writability at the cost of boosting circuitry, switching energy, and additional voltage stress that must be controlled. [31], [32] Four rectangular ribbons give the perimeter = 8 × (width + thickness), before corner rounding. PG/PU is 1.49 and PD/PG is 1.16. The L3 structures closely resemble L2 in layout and cell height. Fewer L3 nanosheet widths are tabulated because fewer high-magnification images were available. DDR PHY The DDR-PHY trades density for controlled analog behavior and reliable off-chip signaling. It contains drivers, receivers, delay circuits, and calibration logic that set drive strength, sampling time, and voltage margin. Repeated four-sheet devices with similar widths fit the use of regular transistor units for matching and programmable drive. Its wider local wiring provides room for current delivery and separation of sensitive signals, while consuming more area than a dense core-logic grid. The layout serves the memory channel’s electrical requirements as well as digital logic density. [33] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Intel 3 GPU devices Vector engine logic Intel 3’s XVE logic uses two-fin PMOS and NMOS devices with power rails in M0. Its cell height and M0 pitch give a seven-track geometry, two tracks more than the 18A logic. One-fin groups also appear among the two-fin devices. Intel 3 L2 SRAM The Intel 3 L2 SRAM uses the familiar HCC sizing pattern: one PU fin, two PG fins, and two PD fins. N3E GPU devices Vector engine logic The N3E XVE field contains repeated two-fin devices with seven-track cell geometry. N3E remains a FinFET process, giving Panther Lake a direct FinFET-to-RibbonFET comparison. N3E L2 SRAM The N3E L2 SRAM uses the same PU:PG:PD fin-count pattern of 1:2:2. Panther Lake-U follows Lunar Lake’s floorplan quite closely. Both pair 4 P-cores with 4 LP E-cores and NPU, media and display engines in similar locations. Lunar Lake also uses Xe2, the direct predecessor to Panther Lake’s Xe3 GPU. This makes Lunar Lake the most direct basis for our comparisons. Arrow Lake differs in core count and uses the older Xe-LPG GPU architecture, so we only use it where it offers a more direct component-level comparison. Compute tile Panther Lake compute-tile floorplans remain sparse even months after launch. Intel 18A’s backside metal and dielectric stack must be removed without damaging the underlying structures before a clean transistor-level floorplan can be imaged. Most published die shots hide or heavily process the background, but we are quite proud of the die shot we achieved and are excited to show the work we have done. We measured the areas of the key components on the compute tile and compared them with their Lunar Lake predecessors on TSMC N3B. These help us to capture changes in block area and compare the two chips across process nodes and designs. Our total tile areas exclude the scribe-line area. The compute-plus-GPU subtotal below uses the PTL-U compute tile and GT1 GPU; it excludes the I/O tile and passive base. Individual block areas use the boundaries marked on the floorplans The compute-plus-GPU row is recomputed from the displayed PTL-U and GT1 areas. Component rows use their stated per-region counts and are not an additive partition of the whole tile. The P-core area remains almost unchanged between Lunar Lake and Panther Lake, despite L2 capacity increasing from 2.5 MiB to 3 MiB. Arrow Lake uses the same Lion Cove core as Lunar Lake but also has a 3 MiB L2. Cougar Cove fits 20% more L2 into the same P-core area. The larger private cache keeps more of each core’s working set close to its execution units, reducing access to shared L3 and DRAM. Extra capacity adds storage leakage and lookup energy, so designers balance it against avoided lower-level accesses. The shared P-core L3 cache also shrank by 14.8%. [2] Cougar Cove combines a similar footprint with Intel’s reported power-efficiency improvements. RibbonFET’s tighter channel control reduces leakage, while PowerVia reduces supply droop and allows tighter voltage guardbands. [1] Darkmont’s four-core LP E-core cluster is 5.0% smaller than Skymont’s on Lunar Lake, with most of the reduction in its L2 regions. The 1 MiB region shrank by 8.4% and the 1.5 MiB region by 14.9%. The tag arrays also use one fewer visible row. Tags identify which memory addresses the data array holds, so rearranging them changes the cache’s layout and wiring without requiring less data capacity. [2] The LP E-cores share one L2. This pools capacity and avoids duplicating all the cache machinery, but the four cores contend for its banks and bandwidth. Their separate cluster also keeps light work away from the performance cluster and its L3, allowing that larger domain to sleep. [1], [2] Cache area includes more than the storage cells. Tags identify each line, decoders select rows, sense amplifiers read the small bitline signal, and wires connect to the banks. Splitting an array into smaller sections shortens wordlines and bitlines, improving access speed, but duplicates peripheral circuits. Panther Lake’s smaller cache regions therefore reflect the complete memory implementation, including how much of each region is devoted to storage. [34] Unlike Meteor Lake and Arrow Lake, Panther Lake has no separate SoC tile. The NPU, LP E-cores, memory controllers, PHYs, media and display engines now share the compute tile. This removes an active die and keeps CPU memory traffic on one die. The cost is moving PHY and I/O-related circuitry onto 18A: drivers, receivers and analog circuits must still meet external voltage, loading and signal-integrity requirements, so their area does not shrink like dense digital logic. [1], [2] The biggest shrink comes from the NPU, which occupies 36.9% less area. NPU 5 consolidates the same total INT8 MAC count into half as many neural compute engines. Each of the three NCEs has a larger MAC array to make the complete NCE envelope 22.6% larger than an NPU 4 engine. Consolidation also halves the number of scratchpads and SHAVE DSPs, from 12 to 6. The MAC array handles matrix multiplication and convolution, while SHAVE executes vector and custom operations that fit the array poorly. [1], [2], [35] The paired floorplans identify each NCE envelope and its scratchpad, MAC, and SHAVE regions. Each measured MAC polygon is counted once per NCE in the area accounting below. The scratchpads store weights, activations, and intermediate results near the MAC arrays, allowing repeated use without fetching them again from DRAM. Halving their number delivers the largest measured area saving but leaves less local storage for the same total MAC count. Layers that no longer fit locally require smaller working tiles or more transfers of intermediate data. The benefit depends on keeping the enlarged arrays busy while managing that tighter storage budget. [36] NPU 5 also adds native FP8. Using half the operand width of FP16 reduces storage and transfer demand, helping workloads fit the smaller local memory budget. Lower precision and format-dependent range make scaling and model validation part of deployment. Hardware activation functions further reduce work that would otherwise occupy the programmable DSPs. [1], [2] Microsoft requires an NPU to deliver at least 40 TOPS for Copilot+ PCs. Both Lunar Lake and Panther Lake meet this threshold, but Panther Lake uses significantly less silicon. GPU tiles Panther Lake is Intel’s first product with Xe3, its latest GPU architecture. It offers two different GPU tiles: a smaller GT1 tile with 4 Xe3 cores on Intel 3 and a larger GT2 tile with 12 Xe3 cores on TSMC N3E. Panther Lake allows us to compare the same GPU architecture across both Intel 3 and TSMC N3E. Wildcat Lake adds a third Xe3 implementation on Intel 18A. A future newsletter will detail Xe3 and its implementation differences across all three process nodes. GT2 scales Xe3 to a different physical layout, with render slices arranged vertically instead of GT1’s horizontal arrangement. Slice placement sets the distances to shared cache banks and the D2D interface. Those wires consume area and add delay, so scaling the number of Xe cores also requires a new balance of cache placement, routing and timing. [1] What’s immediately obvious is that the GT2 tile on TSMC N3E has much smaller Xe cores than GT1. These block areas include logic, caches, and routing. An Xe core on the GT1 tile is ~69% larger than one on Lunar Lake, and ~55% larger than one on GT2. Intel 3 therefore uses substantially more area per Xe core. The block-area gap exceeds the measured logic and SRAM density gaps, bringing routing, timing targets, cell mix, and floorplan allocation into the comparison. The measured vector/matrix engine region is almost unchanged between Lunar Lake and Panther Lake’s GT2 tile. Xe3 retains eight 512-bit vector engines and eight 2048-bit XMX engines per core. Its gains also come from feeding those engines more effectively: more resident threads hide stalls, and variable register allocation lets shaders trade registers per thread against the number of threads kept active. [1] The shared L1/SLM capacity increased by 33% from 192 KiB to 256 KiB, while its area increased only 5%, raising effective density by 27%. L1 retains reused cache lines, while software-managed SLM lets a thread group share data locally. Both reduce traffic to more distant memory. Allocating more SLM per group can also limit how many groups reside on a core at once. [1], [37] The GT1 tile carries 4 MiB of L2 against 16 MiB on the GT2 tile. GT1 divides its L2 cache into four 1 MiB banks, while GT2 uses eight 2 MiB banks. Each bank contains 128 macros, but each N3E macro stores 16 KiB, twice the Intel 3 macro’s 8 KiB capacity. The N3E macro is only 54% larger while holding twice as many bits, giving it 30% higher density: ~23.7 Mbit/mm² versus 18.3 Mbit/mm². Including bank-level circuitry, the gap widens to ~16.9 Mbit/mm² on GT2 versus ~10.4 Mbit/mm² on GT1. GT2 gains density with its macros storing more bits per unit area, and those macros occupy more of each cache bank. Larger macros spread decoder and sense-amplifier overhead across more storage, while a more compact bank layout reduces the share spent on control and routing. The compromise is longer wordlines and bitlines that carry more capacitance. [34] I/O tile Panther Lake uses two I/O tile variants, both fabricated on TSMC N6. The smaller one provides 4 PCIe 5.0 and 8 PCIe 4.0 lanes and serves lower-tier systems as well as those without a discrete GPU, while the larger one adds 8 PCIe 5.0 lanes, bringing the total to 20 lanes, for discrete-GPU connectivity. Panther Lake SKUs with the larger 10- or 12-Xe GPUs use the smaller I/O tile. [38] The smaller I/O tile adds a PCIe 4.0 block and a Thunderbolt block to Lunar Lake’s I/O layout, providing four additional PCIe 4.0 lanes and another Thunderbolt 4 port. Its repeated N6 blocks retain nearly identical areas and layouts. Reusing these proven PHYs and controllers avoids porting and requalifying external interfaces on 18A, where faster digital logic offers less benefit to circuits constrained by the off-chip link. [38] SemiAnalysis’s teardown lab (STEEL) dives deep into the world’s advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. We’re hiring technical experts from system to transistor and everywhere in between. Check out our Careers page. Panther Lake offers scalability and modularity through its disaggregated packaging that partition compute, GPU, and I/O silicon into separate tiles allowing for a suite of tile configurations. This partitioning makes the package part of Intel’s node economics as it determines how much leading-edge wafer area each product consumes, which functions can remain on other processes, and how much configuration freedom Intel can offer from a shared set of tiles. Furthermore, fabricating the compute and GPU tiles separately confines the new 18A process to the compute tile and allows graphics and I/O to use other, more established, and more cost-effective processes. For Panther Lake, the GPU and I/O tiles are assembled alongside the compute tile on a passive silicon base using Foveros-S. Intel’s current technology brief lists a nominal 36 µm pitch for Foveros-S. Through-silicon vias (TSVs) in the base connect the fine wiring above to the larger package connections below. The functional tiles sit side by side on that passive base in a 2.5D configuration. [39] Our cross-section through the compute and GPU tiles shows the package’s wiring hierarchy. Microbumps connect each active tile to the passive silicon base; its fine redistribution layer (RDL) carries the short, dense tile-to-tile links. TSVs carry connections through the base to the package substrate, which fans them out to the much coarser motherboard solder joints. The base supplies interconnect, while computation remains in the active tiles above it. [39] At the compute-tile edge, the higher-magnification inset shows a local microbump spacing of approximately 25.24 µm and a feature width of 12.33 µm. These local spacings are finer than Intel’s nominal Foveros-S value. The X-ray fields further confirm tighter neighboring bumps, consistent across every die-to-die area found on each tile. Additional X-ray analysis is offered after the paywall. Putting the memory controller beside the CPU removes the D2D transfer that CPU memory requests required in Meteor Lake and Arrow Lake. This avoids the extra transmitter, receiver, and link traversal, saving interface energy and latency. Panther Lake’s separate GPU still crosses a D2D link to reach DRAM, so its larger local caches also help contain package traffic. [1], [40] Smaller dies are less likely to contain a random fatal defect, and screening them before assembly prevents one bad tile from consuming a complete package of good silicon. Reuse also spreads design and qualification work across more products. Against those gains, Intel pays for the passive base, D2D circuits, extra bonding and test steps, and losses during assembly. Cost per working product across the portfolio captures the combined effect of wafer yield, reuse, test, and assembly. [29] Wildcat Lake packaging Intel launched Core Series 3, formerly Wildcat Lake, on 16 April 2026 for value mobile and edge systems. Wildcat Lake keeps 18A but removes the passive base and combines more functions on one die to simplify the package. The two products therefore reveal two distinct ways to commercialize the same leading-edge process. [41] Wildcat Lake’s 18A die combines up to two Cougar Cove P-cores, four Darkmont LP E-cores, two Xe3 cores and a smaller NPU. A separate platform-controller die supplies I/O, connected through UCIe, Intel’s first processor implementation of the standard. Consolidating graphics remove a tile boundary and the passive base, reducing assembly complexity for a modest-bandwidth value product. It also ties CPU and graphics scaling to the same die, giving up Panther Lake’s ability to swap in a much larger GPU. [42], [43] In July 2021, Intel CEO Pat Gelsinger set out an ambitious process roadmap aimed at regaining performance leadership by 2025, later described as five nodes in four years. Five years and one CEO later, Intel’s comeback story is not as unambiguously positive as Pat may have hoped. [44], [45] Intel once set the pace for process technology, bringing high-k metal gate technology and FinFETs into volume production years ahead of the rest of the industry. Its 22 nm FinFET process reached consumers with Ivy Bridge in 2012. [46] Intel’s integrated device manufacturing (IDM) model allowed its architects and process engineers to co-optimize products and processes. Starting with Sandy Bridge, Intel dominated x86, while AMD struggled with Bulldozer. That lead faltered at 14 nm and broke at 10 nm. Intel targeted a massive 2.7× density increase, but the node arrived years late and required several revisions before it could support Intel’s full lineup. This delay forced Intel to stretch 14 nm across six generations, while TSMC moved ahead in process technology and AMD recovered in x86. By 2019, Intel was still shipping 14 nm across most of its product stack, with its 10 nm client ramp focused on Ice Lake mobile processors. Meanwhile, TSMC was shipping N7 and N7+, and AMD’s Zen 2 compute chiplets used N7 to raise core counts and improve efficiency. Intel’s process failures were central to its decline, but unsound business decisions furthered their downward slide. Product delays compounded product mistakes, pushing client, server, and FPGA roadmaps off schedule. Several attempts to enter AI (Nervana and Gaudi) and networking (Tofino) also failed to establish lasting businesses. Intel’s recovery has focused on consumer CPUs and advanced packaging. Tiger Lake, Alder Lake, Lunar Lake and now Panther Lake have restored Intel’s consumer roadmap. On the process side, Intel 4 shipped with Meteor Lake, Intel 3 with Granite Rapids and Sierra Forest, and Intel 18A with Panther Lake. Intel has also made advanced packaging part of its foundry offering. However, Intel is still playing catch-up in servers. Several Xeon generations arrived years late and trailed contemporary AMD and Arm server CPUs in performance, efficiency, and core count. The process roadmap is back, but Intel does not hold the same process-technology leadership position it held prior to 10 nm. The introduction of gate-all-around nanosheets and backside power delivery are two of the biggest changes to transistor integration in a decade. Intel took on both changes at once: 18A paired its first RibbonFET with PowerVia in Panther Lake. Panther Lake is a substantial manufacturing milestone. Our cross-sections show how RibbonFET and PowerVia reshape local contacts and wiring, while the floorplans show where architectural consolidation and process choices save area. A sustained competitive lead depends on product performance, cost, yield, and the next implementation. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page.. 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The RP2350 is actually a pretty secure chip, all things considered. It has secure boot, ARMv8’s TrustZone to split secure and non-secure execution, and you can permanently disable debug — the…
Engrams Embedding Entendre: Codesign for Efficient DRAM/SSD Offloading
Engram extends standard token embeddings with learned multi-token lookups. Recurring local patterns retrieve vectors directly, reducing the need to reconstruct them through attention and feed-forward layers. With Engram model architecture optimization, it allows for lower HBM capacity to be needed for models at the same quality. This does not mean there won’t be an insane demand for HBM but it just means that model architecture will continue to innovate around constraints. This model architecture design is naturally codesigned for parameter offloading: each token accesses a few embedding rows whose addresses depend on token IDs, not hidden states. The runtime can prefetch those rows from host DRAM while earlier layers compute, keeping the table outside HBM without transferring entire weight matrices. Our Memory model contains our latest estimates of quarter by quarter HBM, DRAM, & NAND supply and demand. Offloading frees HBM for model weights and KV cache, potentially supporting larger batches or more concurrent sessions. When DRAM becomes the next constraint, NVMe offers another tier. Recommendation systems already cache frequently or recently accessed embedding rows in faster memory while backing colder rows with SSDs. After NVIDIA roadmap had to change due to massively despec’ing Rubin Ultra from 1024GB to now ~200GB of HBM per chip, model architecture optimizations like emgram maybe helpful. Our DeepSeek-V4.1-Flash configuration uses roughly 189 GiB of memory for Engram. We replace it with a memory-mapped (mmap) file and measure serving performance with offload to SSD. Later on in our report, we will show our Engram offloading experiments along with the official InferenceX agentic inference serving results on Engram models like DeepSeekv4.1 Flash across all 6 NVIDIA GPU SKUs along with MI355X. Unsurprisingly, the CUDA Moat is still mogging MI355X on the ultra popular DeepSeekV4.1 Flash model. We also show how even on high capacity HBM SKUs, offloading emgrams to DRAM could result in even better performance for most of the pareto than keeping the emgram in HBM. Our benchmark has been widely reproduced, validated and/or supported by almost every major buyer of compute from Google Cloud to Microsoft Azure to Oracle, to Meta and many more. Furthermore, it has the support of the ML community including from vLLM, LMCache, SGLang, PyTorch, Huggingface and the support of major labs like OpenAI, MiniMax, ZAI, Qwen, Moonshot Kimi, etc. Star the InferenceX GitHub repository if you find the open-source benchmark and data useful!. InferenceX is the only inference benchmark in the world to have TPUv7, Jalapeño, Nvidia Rubin NVL72, AMD, and soon, SambaNova and Trainium. Due to how realistic AgentX scenario is to real world agentic inference workloads, AMD has committed to collaborating on MI455X UALoE72 too. DeepSeek did not release the original paper’s two trained Engram models. We replicated its setup on fineweb-edu using the released code and training hyperparameters, at an estimated 6E18 FLOPs per run. We observed the same U-shape scaling: Engram improved performance over pure MoE baselines. We also reproduced DeepSeek’s results, where earlier-layer representations with Engram resembled those of later layers. Like the original Engram paper, it is possible to probe Engram’s gate scores to see what n-grams DeepSeek-V4.1-Flash makes the most use of. Our gate scan finds names, code fragments, relational phrasing, and boilerplate. These examples prioritize interesting-ness over gate strength. One unexpected result was Wright : Ace Attorney. These examples suggest learned memory optimizes the training objective, not a judgment of which facts deserve storage. Licenses, bibliography fragments, API scaffolding, and website furniture can provide prediction shortcuts, so the value of additional Engram capacity may depend on what survives data preparation. This does not show that table capacity is “wasted”: the evaluation-corpus scan establishes neither training exposure nor the capacity occupied by each category. For offloading, strong gates do not identify cache-hot rows. Low gates do not automatically save reads either: computing the gate requires the retrieved key and undoes the performance gain of a fused kernel. Skipping reads would require a separate usefulness predictor before retrieval. In the original paper’s inference-time ablation, factual-knowledge benchmarks retained just 29–44% of their original performance, while reading comprehension retained 81–93%. This is due to the training–inference mismatch. The resulting degradation therefore measures this trained model’s dependence on Engram, not the performance difference between models trained with and without it. In our ablations, suppressing Engram worsens token likelihood across all evaluated domains, especially encyclopedia text and several code corpora. Surprisingly, GSM8K accuracy stays within measured run-to-run variation and removing Engram has no effect. Engram is not a detachable dictionary beside an unchanged MoE. Removing it changes downstream features and expert selection. We tested whether rerouting hurts or compensates by holding tokens fixed in a teacher-forced experiment on CRUXEval, a code-reasoning benchmark of small Python functions where the model predicts a function’s output from its code and an input, and scoring the reference answer. Removing Engram raised answer loss from 0.2848 to 0.3093 bits/token. Forcing the ablated model to use the original Engram-on expert choices made it worse still, at 0.3375 bits/token. Rerouting partially compensates for the missing memory. Memory features and expert selection work together, rather than following a clean “memory stores facts; experts reason” division. On the same CRUXeval, removing Engram during either phase reduced accuracy and increased generated tokens; removing it throughout produced the largest changes. Keeping Engram for prefill leads to more correct answers than keeping for decode likely due to semantically richer KV cache transferred to decode workers, allowing it to mitigate some of the performance loss. Engram’s table is large, but each lookup is small. DeepSeek-V4.1-Flash requests 24 rows at each of two Engram layers, about 12.4 KiB per processed token position across the model, or 3.1 KiB per GPU when split across four GPUs. Currently as of Day 7 since Model Release, MI355X is still 2-4x worse performance per dollar compared to B200 even when normalized by Mi355X’s lower TCO. Our full total cost of ownership breakdown comes from our AI Cloud TCO Model along with monthly market surveys of over 100+ gpu clouds & gpu cloud customers. On the Day 0 release of DeepSeekv4.1 Flash, NVIDIA vLLM works out of the box with zero issues across all 6 SKUs: H100, H200, B200, B300, GB200, GB300! This was thanks to the amazing work by the NVIDIA & Interact teams! In comparison, AMD vLLM did not work on day 0 for DeepSeekv4.1 Flash.Source: SemiAnalysis InferenceX AMD’s vLLM documentation points to using vllm/vllm-openai-rocm:deepseekv41-flash-0909, but from hour 0 of the model release to hour 23, AMD has not publicly released the image. AMD claims, “SPEED IS THE MOAT,” yet it has still not released it by the 23rd hour. We wish that, going forward, the AMD team has a better process for hour 0 model releases. Eventually when they did publicly release for “day 0” image support, performance-wise, it is currently up to 14.8x worse perf per dollar than H200 and up to 42x worse perf per dollar than B200/B300. The power of the CUDA MOAT is NVIDIA’s collaboration with its massive 6 million-developer community ecosystem including most of the vLLM & SGLang & Tokenspeed maintainers which means that CUDA is optimized on day 0. Overall, AMD did make significant improvements but the performance per dollar is still currently 2-4x worse than B200. AgentX Engram DRAM Offloading Improving Performance The HBM and DRAM offload use the same GPU kernel to select and dequantize rows. With HBM, it reads GPU memory; with Unified Virtual Addressing (UVA), it reads pinned host memory directly. Both support full decode graphs. Moving the table into HBM accelerates only the sparse lookup, leaving decoder computation and communication unchanged, resulting in little overall benefit while consuming memory otherwise available to KV cache. Another benefit of Engram offloaded to DRAM which means you can reduce the communication overhead by using less HBM GPUs per replica. For example, when enabling Engram offloading on B300, we are able to switch from TP4 to now TP2 which improves the pareto curve by up to 1.6x. When iso-model quality, less HBM is required as the engrams could be offloaded to host DRAM. Thus HBM bandwidth matters way more than HBM capacity. For inference workloads where memory bandwidth matters the most, 4-hi HBM provides the best $/bandwidth and therefore lowest cost per token. If China continues to make more and more revolutionary model architecture innovations, soon it could potentially 0Hi HBM stacks. [ ](https://newsletter.semianalysis.com/p/long-live-the-short-king-why-4-hi) [ Long Live the Short King: Why 4-hi HBM Wins ](https://newsletter.semianalysis.com/p/long-live-the-short-king-why-4-hi) Myron Xie, Bryan Shan, and 3 others · Sep 13 [ Read full story ](https://newsletter.semianalysis.com/p/long-live-the-short-king-why-4-hi) Moreover, on B300 and week-0 stack, moving the Engram table back to HBM did not improve results and stay within run-to-run variance. This is a result of the work optimizing DRAM offload, such as async, and overlap. SSD Offloading On B200, we created a unoptimized vLLM fork and stored the Engram tables in memory-mapped files on local SSDs. File backing lets the OS reclaim table pages when other applications need RAM. Pages already cached in memory can be served without reading the SSD again. Furthermore, note that we were unable to turn on GDS The unoptimized SSD implementation changes how rows reach the GPU. It copies row IDs to the CPU, deduplicates them, gathers the requested rows into pinned buffers, copies those rows back to the GPU and dequantizes them. This work runs between segments of the GPU execution graph. Native UVA performs row selection and dequantization directly on the GPU, avoiding the CPU round trip. A warm filesystem cache removes physical SSD reads, but leaves the coordination, row gathering and transfers. This is why a file already cached in RAM can still perform worse than a pinned DRAM table. The comparison measures the whole serving path; it does not separate the time spent on each of these operations. B200 DRAM dominates both measured SSD serving curves in total tokens per dollar and P90 interactivity. Near 125 tokens/s/user, DRAM delivers 121 million total tokens per dollar versus 52 million for SSD. For production serving, SSD offloading is likely not worth the tradeoff. On the B200 configurations we measured, SSD offloading loses on both measures: every observed SSD point has a DRAM alternative that delivers higher P90 interactivity and more total tokens per dollar. The only points where Cheaper storage does not automatically produce a cheaper inference service. Moving Engram to SSD leaves the same four expensive GPUs and the rest of the server in place. Reclaiming RAM only creates an economic benefit if it enables a cheaper server configuration or additional useful capacity. The current unoptimized path provides neither benefit, and the filesystem cache still consumes RAM when table pages are resident. Next we will look at the mechanisms and specific implementation of ngrams from DeepSeekv4.1 Flash, LongCat, Qwen3.8 Flash Next.
The Execution Gap is a Metadata Gap
Enterprises are treating stalled agent projects as a readiness problem. The benchmark evidence points somewhere less comfortable: hold the model constant, change only what surrounds it, and performance on real enterprise data still moves by twenty points. BigDATAwire Managing Editor Ali Azhar’s March 2026 report on Deloitte’s State of AI 2026 closed on a sentence […]
Avatar Entertainment Adapting Novel 'La Caza Del Ejector' As TV Series
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Hackers start exploiting critical WordPress flaw for code execution
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Starz Entertainment (STRZ) Stock Sees Fair Value Lift After Q1 Analyst Revisions
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Why experts are urging parents to prepare kids for possible livestreamed execution
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BAAN HOLDING GROUP COMPANY TADAWUL:1820:
Dave And Buster's Entertainment (PLAY) Stock Sees Fair Value Cut As Turnaround Questions Persist
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Aon names Siccardi to new global execution role
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Hegseth wants Fort Hood shooter’s execution by firing squad to be public
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Sandhills Community College Small Business Center expands to Moore and Hoke Counties
Small Business Center Director, Laura Kinsman. Photo provided by: SCCSandhills Community College (SCC) is launching a redesigned Small Business Center model that expands no-cost entrepreneurial support across Moore and Hoke Counties. Rooted in the College’s commitment to strengthening small businesses and entrepreneurship as drivers of economic growth, the enhanced model is led by recently appointed Small Business Center Director, Laura Kinsman. The model also includes two new Senior Business Advisors who will provide trusted expertise, stronger community connections, and individualized guidance to entrepreneurs and business owners throughout the region.Kinsman brings a unique perspective to the director’s role as both a local business owner, operating in downtown Southern Pines, and a former Moore County educator. “Her combination of education, business ownership, leadership, and community involvement make her a great fit for the Small Business Center and the work we are continuing to build across Moore and Hoke counties,” said Taylor L. McCaskill, senior director of Workforce Development & Corporate Partnerships in a press release.Kinsman is an active member of the Southern Pines Business Association and has been connected to the Sandhills Small Business Center since the beginning of her entrepreneurial journey. She looks forward to building on that experience by strengthening the Center’s partnerships and expanding its connections throughout the community.She will lead the Center's efforts to support entrepreneurs and business owners throughout Moore and Hoke County and be the connector to the North Carolina Community College System Small Business Center Network operations. The Center offers no-cost, confidential one-on-one counseling, practical workshops, and connections to the resources and partners that help local businesses start, grow, and create jobs.A key part of this new approach, only offered at SCC, is a network of Senior Business Advisors, experienced professionals who will provide individualized guidance in areas such as business planning, finance, marketing, operations, growth strategy, and problem-solving. These advisors will serve as trusted partners to entrepreneurs and business owners, helping them turn ideas into action, overcome barriers, strengthen existing businesses, and pursue new opportunities. This one-on-one counseling is available at no cost, ensuring that high-quality business support is accessible to entrepreneurs at every stage.Senior Business Advisor for Hoke County, Kenna Parks. Photo provided by: SCCKenna Parks has been named the senior business advisor for Hoke County. She is a business professional, entrepreneur, and educator who brings a unique combination of academic training and real-world business experience. She earned her Master of Business Administration (MBA) in 2017 and has built her career around entrepreneurship, marketing, business development, and helping others turn ideas into sustainable opportunities.Senior Business Advisor for Moore County, Katrin Henderson. Photo provided by: SCCAs a military spouse, she has successfully launched and operated businesses across five states, giving her firsthand experience in adapting to diverse markets, building new customer bases and understanding the importance of global reach in today’s business environment. Over the last decade, her areas of focus include business planning, marketing strategy, branding, customer development, financial preparedness, operational planning and connecting entrepreneurs with educational programs and community resources.Parks brings an especially valuable perspective to business advising because she is an entrepreneur herself. She is the owner of Glamo Society Bridal & Formal Wear in Raeford, N.C., giving her firsthand experience with the realities of launching, operating, marketing and growing a small business. She understands that entrepreneurship extends far beyond developing a great idea; it requires strategy, financial awareness, adaptability, strong customer relationships, and consistent execution.Katrin Henderson will serve as the senior business advisor for Moore County. Thriving in hospitality and retail, Henderson has enjoyed positions in Food & Beverage Management and Retail Management in various fine dining and retail establishments in the area, before opening her own children's shop in 2015, in the Village of Pinehurst. She is a native of Moore County.Quickly immersing herself in this new world of small business ownership, Henderson joined various boards and committees, including President Elect of Pinehurst Business Partners and Event Chair for the Holly Arts & Crafts Festival. She also partnered with local organizations such as Moore County Economic Development and Moore County Chamber of Commerce and Sandhills Community College Small Business Center in events and educational opportunities. In 2026, Henderson sold her shop and now offers full-time support to both new and seasoned entrepreneurs through freelance consulting mentorship and the SCC Small Business Center program.The Small Business Center team is passionate about making business resources more accessible, and ensuring entrepreneurs know they do not have to navigate business ownership alone. Through their work with SCC, they are committed to building meaningful relationships with local businesses, community organizations, and industry partners while helping entrepreneurs move from idea to strategy, strategy to action, and action to sustainable growth.“Sandhills Community College believes deeply in the power of small business and entrepreneurship because strong local businesses create jobs, spark innovation, generate investment, and strengthen the communities we serve,” said McCaskill in press release. “Through this new Small Business Center model, Sandhills is building a stronger ecosystem where entrepreneurs can connect, grow, and thrive, while helping drive long-term economic vitality throughout our region.”To learn more about the Center's services or to schedule a consultation, please contact Kinsman directly at kinsmanl@sandhills.edu or 910-695-3938.
Christa Pike's first words after waking from botched execution revealed as lawyer lists her health issues
Answering Your Questions as Padres Near Disastrous End to Season
The San Diego Padres are inches away from total collapse, digging themselves into an 0-2 hole against the Milwaukee Brewers. They'll now turn home to a raucous Petco Park crowd with the hopes that they can stave off execution. The postseason allows for some insane turns of fortune. Could the Friars be the next recipient …
Did New Science Board Just Shift BioCryst's (BCRX) Investment Narrative?
BioCryst Pharmaceuticals recently formed a seven-member Scientific Advisory Board made up of experienced rare disease and drug development leaders to guide its research, clinical plans and regulatory approach. The depth of this board, spanning big pharma R&D, AI driven drug discovery and rare disease commercialization, directly targets BioCryst’s execution risk as it builds a broader pipeline beyond its current portfolio. We will now examine how BioCryst Pharmaceuticals’ investment narrative...
Here's Christa Pike's health status after waking up following failed execution
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Two lethal doses failed to kill Christa Pike. The science behind a botched US execution
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Some G.O.P. Lawmakers Pan Hegseth’s Plan to Stream Execution of Fort Hood Shooter
Some G.O.P. members of Congress said that broadcasting the execution of the Fort Hood shooter was inappropriate, though others gleefully applauded it.
Critical GitLab Flaw (CVSS 10.0) Could Allow Unauthenticated RCE Across 12 Years of Releases
GitLab fixes CVE-2026-110264, a critical flaw that could allow unauthenticated code execution on self-managed versions dating back to 7.0.
Hegseth wants to livestream a firing squad execution. What we know about the rare move
Defense Secretary Pete Hegseth’s announcement Thursday that the firing squad death of the Fort Hood mass shooter will be livestreamed was swiftly met with bipartisan criticism and questions over how the public execution will be carried out.
Vector Science and Therapeutics Stock Slides 7.18% as Bearish Momentum Builds and Investors Reassess Execution Risk
Vector Science and Therapeutics Stock Slides 7.18% as Bearish Momentum Builds and Investors Reassess Execution Risk
Everyday Injustice Podcast Episode 337: Marc Bookman Examines the Death Penalty’s Politics, Failures and Enduring Appeal
Marc Bookman, legal director of the Atlantic Center for Capital Representation, recently discussed capital punishment on Episode 337 of 'Everyday Injustice.' Bookman challenged the perception of a national death penalty resurgence, asserting its continued application is increasingly confined to a limited number of states. He also critiqued public opinion polling on capital punishment, specifically a Pew poll, for failing to present alternatives such as life without parole. Additionally, Bookman previewed his forthcoming novel, 'Albert's Time,' which explores the ethical dimensions of capital punishment by confronting the execution of an undeniably guilty individual.
Why General AI Coding Assistants Fall Short in Science
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State’s Broadband Buildout Accelerates
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GitLab warns of max severity code execution vulnerability
GitLab warned users today to immediately patch a maximum-severity vulnerability in the CI/CD Regular Expression Compiler that could let remote attackers run arbitrary code on targeted instances.