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Catching up with sleep health supplements: A roundup of the latest science
Sleep has moved from a lifestyle concern to a core measure of health, as inadequate sleep affects a substantial share of adults and often occurs alongside chronic stress, undermining health, well-being and performance across sleep-wake cycles and life domains.
Online student expands domain from sports blogosphere to city hall
Grand Canyon University online student Jon Zaghloul learned about communications from the blogosphere. He started "Sports Talk Chicago," a popular sports blog, and that was […]
Li Auto Inc. Announces Equity Financing for Its Chip Business
BEIJING, China, Oct. 16, 2026 (GLOBE NEWSWIRE) -- Li Auto Inc. (“Li Auto” or the “Company”) (Nasdaq: LI; HKEX: 2015), a leader in China’s new energy vehicle market, today announced that Shanghai Mahe Xin Technology Co., Ltd. (“MHX Technology”), a subsidiary of the Company dedicated to its chip and domain controller business, entered into subscription agreements for equity financing totaling RMB1.625 billion (the “Subscription”). The Company, through a wholly-owned subsidiary, and external invest
Netflix’s Summer of Bummer
(Welcome to the Entertainment Strategy Guy, a newsletter on the entertainment industry and business strategy. I write a weekly Streaming Ratings Report and a bi-weekly strategy column, along with occasional deep dives into other topics, like today’s article. Please subscribe.) Today, I’ve got a guest post from longtime friend of the newsletter, Brandon Katz. I’ve been trying to find time all summer to look at Netflix’s straight-to-streaming film slate, but between a pre-planned trip and Nielsen moving up their streaming data timeline, I’ve been swamped. So I reached out to Brandon, one of my favorite fellow analysts, to write about it. And I feel like he captured the tone and data focus of the newsletter perfectly. You can connect with Brandon on LinkedIn and Twitter. Enjoy! Don’t worry, folks. You’re in safe hands with me. To ease any anxieties about an interloper in ESG’s domain, I’ll start by stealing one of his best framing devices: headlines. Box office flops are covered in the same way the Teenage Mutant Ninja Turtles eye pizza: with cartoonish insatiability. I would know. I’m a former reporter who wrote nearly identical headlines: Yet, intentionally or not, streaming misses get treated with kids gloves, filtered through a rosy lens: In the last six years, U.S. streaming viewership has become nearly as transparent as the box office, but the data often arrives weeks later, in a number of less intuitive metrics, and with nary an official budget to be found. This plays into the Wall Street-whispering narratives major streamers have been cultivating for years. They get a pass in a way that theatrical studios simply don’t. Subscribe Netflix’s Summer Slate Not a single Netflix original film released between May and August this year opened above 20 million U.S. TV hours, per Nielsen. That benchmark usually serves as the EntStrategyGuy’s floor for a streaming hit on Netflix. None of these films enjoyed a hit-cementing single week of 20-plus million hours during their runs. Netflix’s two best films were true crime docs, Maternal Instinct (16.5 million hours) and The Crash (19.7 million), the best overall week for a film this summer. Great for most other streamers, but not necessarily what we’re used to seeing from Netflix. For an overly-dramatic comparison, Happy Gilmore 2 opened last summer to around 47 million hours (celebrity cameos, baby!). Zooming out, the picture looks even worse. In 2026, Netflix’s five biggest scripted summer films posted the lowest average (28.6 million hours) and median (28.8 million hours) eight-week viewership totals of the past four years. Now, it’s unrealistic and unfair to expect Netflix to deliver a _KPop Demon Hunters-_sized hit every year. But it’s also not ideal to see the size of their hits shrinking over the last few summers. Let’s quickly run through some of the notable summer misses. Jennifer Lopez and Brett Goldstein’s perfectly fine romcom, Office Romance, fell off the charts after 20 million hours in its first two weeks. Top films usually last for four-plus weeks. Starry titles ideally don’t decay that fast either. Homegrown star Millie Bobby Brown couldn’t prevent the snappy Enola Holmes franchise from diminishing returns. At 14.3 million U.S. hours, the third film posted roughly half of what the first two films did in their first two weeks. What’s on Netflix calculated that per-day global views were down nearly 60% from the second movie. The Whisper Man did okay with more than 36 million hours over its first four weeks. But I expected a little more juice from a film featuring Robert De Niro, Michelle Monaghan, and Adam Scott. Kevin Hart’s Ladies First collected just 11.2 million hours total across two weeks. That’s a big miss for one of Netflix’s go-to stars. Plopping into the same bucket are Sunny Sandler’s Don’t Say Good Luck (10.3 million in two weeks) and John Cena’s Little Brother (17.5 million). Meanwhile, English-language originals Color Book (June 19), In the Hand of Dante (June 24) and Heartstopper Forever (July 17) never sniffed Nielsen’s Top 10 at all, despite needing only 2 to 5 million hours to land in the top ten most weeks. (By my count, eleven English-language scripted original films released between May and August did chart). It’s only fair to mention that Swapped (1-May) posted nearly 42 million U.S. hours over five weeks (the longest Netflix original run this summer) and is currently their eighth most-watched English-language film ever worldwide. Remarkably Bright Creatures (37 million, 4 weeks) and Voicemails for Isabelle (27 million, 4 weeks) weren’t bombs either. Still, overall, I think it’s fair to say this was a quieter summer season than we’re used to seeing from the market-leader. You might not realize that given the language commonly used in public analysis. The Twist Despite the starkly black-and-white tone of the coverage, here’s the twist: when many box office bombs arrive on streaming, their viewership looks a whole lot like many of Netflix’s supposedly successful summer releases. Hmm, where have we heard that one before? Masters of the Universe topped out at $65 million stateside against a $170 million budget_._ I’ll admit, Skeletor ripping sleeveless curls as a gym bro and bodyslamming Adam’s co-workers was funny. But, much to the chagrin of my bank account, my laughter doesn’t launch franchises. Yet the He-Man reboot opened to 19.6 million hours (from a Wednesday five-day opening instead of just one weekend), on par with Hoppers on Disney+ (19.4 million). It put up nearly 47 million hours over its first six weeks, bigger than all of Netflix’s summer releases. Pretty darn healthy and likely to land among the 25 most-watched movies on streaming this year. Sticking with Amazon, The Sheep Detectives just barely broke even at the box office with $133 million worldwide (and only $66 million domestic). I never expected cloven-hooved, cud-chewing mammals to be able to bring me to tears. Yet that’s exactly how I found myself at the end of this surprisingly affecting movie (#NoShame). It was likely the unexpected quality in a family-friendly film that powered its streaming over-performance. Sheep Detectives delivered a solid run for Prime video netting 26.2 million hours! How about franchise IP? Star Wars: The Mandalorian & Grogu had the lowest opening ($81 million) and lowest-grossing Disney-era live-action Star Wars film ($178 million domestic). One day before release, its Heat score (19.8%)—audiences who list their interest as a 7/7—fell behind blockbusters Wicked (21%), Superman (23%), Fantastic Four: First Steps (23%), Michael (23%), Toy Story 5 (26%) and Avatar: Fire and Ash (27%), according to Greenlight Analytics. The urgent enthusiasm just wasn’t there. On streaming, Mando opened to weeks of 12.1 million, 6.1 million and 2.7 million hours (21 million total) over its first three frames. Not the numbers Lucasfilm was hoping for nor the numbers of a streaming hit. But they’re in the same vicinity as some Netflix summer releases with $345 million at the global box office to offset a smidgen of the pain. Final Thoughts So why oh why does this nuance gap exist? Four key reasons: Data Literacy: A “$100 million opening” just makes sense. After decades of box office reporting, even casual movie fans are well-versed in the benchmarks of hits and home runs. There’s an immediate shorthand. But “16.5 million” hours doesn’t land nearly as cleanly. Despite leaps of progress, the streaming ratings era is still in its infancy compared to theatrical. The EntStrategyGuy and I met thanks to a late 2010s group chat of data nerds hungry to find a shred of certainty in nebulous streaming performance. I’m not surprised to see “No. 1 on Netflix” still getting misconstrued out in the wild. Timing: By Friday morning, we have the box office’s Thursday night previews totaled, allowing us to better project the weekend’s expectations. From there, ticket sales are reported daily. By Sunday, the film’s fate is usually finalized, at least in terms of public perception. In streaming, Nielsen recently improved its delay to…two weeks. The medium isn’t forced to contend with instant gratification as harshly. Financials: Theatrical film budgets are a mere Google away. Profit and loss is calculated in the cold and unforgiving naked light of day for all to see. But finding the vast majority of streaming exclusive movie budgets requires the forensic investigation skills of a Criminal Minds detective. Also, it’s very difficult to calculate how much revenue/value a straight-to-streaming films provides a streamer. This is why there are so few stories about streaming original movies “losing X amount of money”. On top of that, marketing budgets are far greater for theatrical movies than streaming exclusive movies, which leads to earlier and better awareness. This then translates to a wider pool of potential interest. Narrative Control: Netflix is the only major streaming service to publish weekly first-hand viewership data and annual engagement reports. Naturally, some headlines borrow their first-hand framing**.** Other streamers benefit from their comparative lack of transparency. They may occasionally announce vague performance platitudes such as Apple TV’s Mayday becoming its “biggest film debut on the platform to date over its first 18 days,” and that it ranked No. 1 with left-handed viewers in its first weekend. (Fine, I made up that second one). But, for the most part, they keep first-hand viewership shrouded in mystery to avoid bad press. Especially for outlets that demand multiple articles per day from their writers, it’s an easy (and understandable) way for some reporters to hit their daily article quota by just repeating what the streamers have told them. TL:DR version: Streaming-exclusive movies are asked to do different things than theatrical movies, but that doesn’t mean they should escape judgment. Both still need to draw enough eyeballs to justify their cost within the proper performance contexts. The more cleanly we can inject a little nuance into streaming analysis, the better we’ll understand the audience and content trends that drive this industry. And that’s what all of this is really about: knowing what audiences actually want! Brandon Katz is the Director of Insights & Content Strategy at Greenlight Analytics where he focuses on evaluating the ever-fluid media landscape to unearth understanding, opportunity and value. Greenlight Analytics is the entertainment intelligence consulting company redefining how Hollywood finds, understands, and activates audiences. Prior to joining Greenlight Analytics, he served as the senior entertainment industry strategist at Parrot Analytics, and as a full-time entertainment industry reporter covering the Xs and Os of Hollywood, most notably with TheWrap and the Observer.
The Math Singularity Is Here, and Science May Be Next
OpenAI has released an extraordinary body of mathematical work produced by an unreleased frontier model: 722 manuscripts spanning 372 research families across fields including number theory, complexity theory, and mathematical physics. Each result required, on average, the equivalent of roughly three hours of ChatGPT Pro reasoning. A New Era of Discovery We may be witnessing the beginnings of a “math singularity”: a point at which machine-generated discovery accelerates beyond humanity’s ability to independently reproduce, verify, or fully absorb it. If frontier models can generate hundreds of meaningful results in the time it takes a human researcher to investigate one, the constraint will no longer be producing new mathematics. It will be our capacity to validate, interpret, and integrate it. This does not make mathematicians obsolete. It changes their role. They may increasingly serve as guides, critics, and meaning-makers. Increasingly, they will decide which questions matter, determining which results can be trusted, and explaining why they are important. Mathematical insight may become abundant, while human judgment becomes more valuable than ever. Mathematics May Be Only the Beginning Every scientific discipline could eventually experience a similar acceleration. AI systems could generate and test hypotheses, connect findings across specialized fields, and explore possibilities at a scale no human research community could match. In medicine, imagine models identifying overlooked disease mechanisms, designing drugs and clinical trials, personalizing treatments, or discovering cures in months rather than decades. In materials science, AI could help create better batteries and cleaner industrial processes. In climate science, it could accelerate advances in energy, forecasting, and carbon removal. In biology, it could uncover relationships hidden across enormous genomic and molecular datasets. The result would not simply be faster research. It could expand the frontier of what is scientifically possible. The New Bottleneck Scientific discovery, however, is not the same as scientific progress. A medical breakthrough must still survive laboratory testing, clinical trials, regulatory scrutiny, manufacturing constraints, and real-world deployment. As machine-generated ideas multiply, the bottleneck may shift from producing breakthroughs to validating them safely and translating them into practice. We may soon have more hypotheses than laboratories can test, more drugs than clinical trials can evaluate, and more mathematical results than experts can review. That imbalance will require better systems for automated verification, reproducible research, prioritization, peer review, and collaboration between AI and domain experts. The importance of OpenAI’s work is not merely the number of manuscripts produced. It offers a glimpse of a world in which intelligence can explore thousands of intellectual paths in parallel. If ideas cease to be scarce, humanity’s defining challenge will be deciding which are true, which matter, and how to turn them into progress. The math singularity is not the end of human inquiry. It is the beginning of a new kind—one in which machines expand the frontier of knowledge and humans decide where it should lead. Subscribe Share Leave a comment
Attackers Hijack .gh, .sl, and .as Registries to Obtain Certificates for Google Domains
Attackers hijacked .gh, .sl, and .as registries and obtained 12 unauthorized certificates for Google and YouTube domains.
Hackers obtain counterfeit TLS certificates for Google and other large services
Compromise of 3 domain registries allows hackers to walk off with unauthorized certs.
iCloud+ just rolled out an improved perk for subscribers
iCloud+ includes a lot more than additional storage, and one of the service’s perks for subscribers—custom email domains—just got even better.
Gallery of Unearthing the Ground: Architecture and the Politics of Waste - 2
Image 2 of 15 from gallery of Unearthing the Ground: Architecture and the Politics of Waste. Fresh Kills Park. Image © USEPA Environmental-Protection-Agency - December 6, 2012 via Wikipedia under Public Domain
Bishop’s computer science chair says AI is eliminating ‘grunt work’ and reshaping digital jobs
Dr. Russell Butler, chair of Bishop’s University’s Department of Computer Science, says artificial intelligence is increasingly taking over routine digital “grunt work,” changing the skills students and workers may need in the years ahead. Photo courtesy of Bishop’s University. Click here to read our platform! Get local news like this every morning. Subscribe free below. Subscribe Pulse Newsroom Artificial intelligence is already taking over some of the routine digital work once performed by entry-level employees, according to Bishop’s University Computer Science chair Dr. Russell Butler — a shift he believes will make expertise, judgement and the ability to evaluate AI-generated work increasingly important. Butler described the change as automation reaching what he calls the “bottom of the cognitive pyramid” during an interview with The Pulse about AI, university education and the future of digital work. His argument is not that humans are disappearing from the workplace. Instead, he sees their role changing as AI becomes capable of handling more of the repetitive tasks involved in computer-based work. “Everything’s converging on just AI basically doing all the grunt work,” Butler said. The bottom of the cognitive pyramid Butler is from Lennoxville, completed his undergraduate studies at Bishop’s and later earned his PhD at the Université de Sherbrooke. He joined Bishop’s in 2019 and now chairs its Department of Computer Science. He uses AI in research, teaching and other creative work, and said the technology is increasingly capable of handling routine digital tasks that once required substantial human time. “You’ve got the grunt work, like moving things around in Excel, doing basic programming tasks,” Butler said. “That’s like the bottom grunt work that the entry-level worker would have done two or three years ago.” Butler went further, saying in his view that much of this type of work has already been absorbed by AI tools. He connected that change to a shift he sees taking place in computer science, where entry-level roles have declined while experienced workers can use AI to increase what they can produce. “A senior developer now has access to essentially an unlimited amount of junior developers on demand,” Butler said. He was describing AI systems metaphorically, not literal employees. His point was that one experienced developer can now ask AI tools to produce code or other technical work that might previously have been assigned to more junior workers. That raises a broader question for universities and employers. If some of the simpler work traditionally given to newcomers can now be done by machines, how do people gain the experience needed to become senior workers themselves? Students doing work that once required years of programming Butler said he is already seeing the change inside his classroom. He created a Bishop’s course called CS208, Coding in Plain English, to show students — including those without traditional programming backgrounds — what they can accomplish using AI. Some come from disciplines such as psychology or neuroscience with no previous programming experience. “What I’m finding is that students who have zero programming experience, they come in from another discipline like psychology or neuroscience or something, they are now able to get up and running with real data sets,” Butler said. Butler’s own doctoral work involved neuroimaging, and he said he has assigned students work he considers comparable to the kinds of analysis he performed during his PhD. He described giving students a real dataset, an expected result and instructions to use AI to complete the analysis. Butler said those students have been able to carry out work at a level he associates with tasks he once performed after years of programming experience. That does not mean a student using AI instantly acquires the same knowledge as an experienced computer scientist. But Butler sees it as evidence that AI can dramatically lower the technical barrier between having a problem to solve and producing a working result. The role of the person using the system then changes. They need to know what to ask for, understand enough about the subject to judge the answer and take responsibility for what is ultimately produced. What about AI hallucinations? One persistent concern surrounding generative AI is hallucination — when a system produces information that sounds convincing but is false or unsupported. Butler said that problem has improved substantially in newer systems and is not as severe as it was with earlier models. He pointed in particular to newer AI systems’ ability to search the web, consult scientific databases and return source links rather than simply generating a citation from their internal model. Butler nevertheless said users should verify what AI produces. “You should verify,” he said while discussing citations generated with AI. His position is that hallucinations have become less common in the systems he uses, not that incorrect AI output is impossible. Human checking remains part of the process. Hours of work compressed Butler offered another example from his administrative work at Bishop’s. The university has been comparing CEGEP courses with first-year Bishop’s courses to determine where students may qualify for advanced standing. Traditionally, Butler said, that means reviewing two sets of course descriptions and manually matching one institution’s courses with another’s. As department chair, that could require hours of reading and comparison. He said AI can now be given both sets of material and asked to generate an initial mapping automatically. “It saves me hours and hours of work,” Butler said. Butler said the AI-generated mapping can also produce a better result than he would produce himself. He sees similar opportunities in businesses. A company may receive specifications, drawings, emails or other digital material from customers and then have employees convert that information into an internal format before anything can be manufactured or delivered. AI can increasingly perform parts of that intermediate processing. In Butler’s view, the employee does not necessarily disappear. Instead, the job becomes more about checking the result. “The human is still there,” he said. Judgement could become more valuable That change is central to Butler’s view of where digital work may be headed. If AI can produce a first draft, write basic code, compare documents or process large amounts of information, he argues that knowledge and judgement become increasingly important. “The real scarce resource going forward is going to be domain knowledge, expertise, and… credentials, authority, the ability to work with other people,” Butler said. He is therefore encouraging students not only to learn AI tools but also to broaden their education. He mentioned acting, fine art and photography as examples of courses that can help develop what he described as taste and intuition — the ability to recognize what is good, what is not and what should be changed. “And that’s the skill that they need now because the grunt work has been automated and now it’s about evaluating what the AI produces and telling it how to improve or expand the output,” Butler said. That does not remove the need for technical knowledge. Butler’s argument is that the emphasis may shift away from manually completing every step of a task and toward directing, checking and improving work produced with AI assistance. He also stressed that humans remain responsible for final decisions. “At the end of the day, the human has to make the final call,” Butler said, pointing to the question of accountability. Physical work may be different Butler draws a distinction between digital work and jobs requiring people to manipulate the physical world. He expects AI to continue advancing quickly in tasks performed almost entirely on computers. He is more cautious about claims that humanoid robots will soon be able to replace workers such as plumbers or electricians. Butler said those trades would not be replaced “anytime soon” in his view and described some current robotics demonstrations as overhyped. He described the situation as counterintuitive. “It’s almost like we solved the highest level first,” he said, contrasting advances in digital AI with the harder problem of building robots capable of operating reliably in the physical world. Butler’s argument is that some digital occupations could face automation sooner than trades requiring complex physical work. The wider AI shift in the Townships Butler’s comments come as local institutions are increasingly grappling with how AI should be used. The federal government recently announced up to $162 million over five years for 10,000 AI-related placements through Mitacs. The Université de Sherbrooke told The Pulse that the number of its collaborative research and innovation projects supported through Mitacs has approximately doubled since 2018-19, while the number of placements has approximately tripled. UdeS also said it already has projects involving both AI adoption and the application of AI to other fields. At Bishop’s, Butler said part of his role involves building the Computer Science department’s local presence, connecting students with regional partners and strengthening relationships with the Sherbrooke technology ecosystem. Those developments put universities in a difficult position. They have to prepare students to use the tools employers increasingly have available while also making sure graduates understand enough to recognize when those tools are wrong, incomplete or being applied to the wrong problem. The risk of losing human skills Butler does not see AI as risk-free. Later in the interview, he raised a separate concern: as AI becomes better at reading, writing, programming and other cognitive tasks, people could lose some of the underlying skills that historically helped produce new ideas. “The other danger is that we’re going to lose the human skills,” Butler said. He specifically mentioned reading and writing and argued that people could lose some of the lower-level understanding that contributes to breakthroughs. Butler said AI systems are based on existing human knowledge and argued that they become much more powerful when paired with a capable person. That tension runs through his view of the technology. AI can remove hours of routine work. It can allow beginners to perform tasks that once required substantial technical training. It can give experienced workers significant leverage. But the more capable the technology becomes, the more important it may be for people to develop the judgement needed to decide what should be done in the first place. For Butler, that is where education may have to change. Students still need to understand their field. They still need to know when something is wrong. And they still need to be able to make the final decision. But if AI increasingly handles the bottom of the cognitive pyramid, the value of a worker may depend less on how quickly they can perform the grunt work and more on whether they understand what the work is supposed to accomplish. Don’t miss the next story that affects your community. Join thousands of readers getting The Pulse every morning—plus breaking news alerts when it matters most. If you value this kind of local journalism, consider supporting it. Subscribe, share and like! Subscribe Share
Sony announces QSSR AI upscaling tech for base PS5 in Marvel's Wolverine and Ghost of Yōtei
The PS5 Pro is no longer the sole domain of AI upscaling tech on console.
Nintendo shares Zora’s Domain footage from Zelda: Ocarina of Time remake
It’s not too long now until we can all get our hands on the eagerly-anticipated The Legend of Zelda: Ocarina of Time remake for the Nintendo Switch 2 as it launches on 5th November. Today…
Intel Panther Lake Teardown, 18A, BSPD, GAAFET, SemiAnalysis STEEL
Panther Lake debuts the first commercial implementation of backside power delivery (BSPDN), introduces Intel’s first iteration of gate-all-around (GAA) transistors, and showcases their advanced packaging capabilities with its Foveros-S assembly. With Panther Lake, Intel’s manufacturing arc has shifted from nebulous roadmaps to shipped silicon, a significant milestone on their long road back to competitive semiconductor manufacturing. To evaluate the extent of Intel’s comeback, we tore down Panther Lake. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Our teardown traces 18A from its four-sheet RibbonFETs (Intel’s marketing name for GAAFETs) and gate stacks through contacts, frontside and backside wiring, and the bonded carrier. We explain how these material and integration choices improve gate control and reduce resistance, while adding capacitance, thermal resistance, and process complexity. Our measurements put Panther Lake’s 18A compute logic and TSMC N3E GPU logic at similar logic density. However, 18A does not lead TSMC N3P, N2 or Samsung SF2 in peak density. Panther Lake’s CPU cores are incremental updates, and the high-end GPU still uses TSMC N3E. Panther Lake assembles one compute tile, one GPU tile, and one I/O tile atop a passive base tile using Intel’s Foveros-S advanced packaging. Both compute tile variants use Intel 18A. The Xe3 GPU options are a 4-core GT1 tile on Intel 3 and a larger 12-core GT2 tile on TSMC N3E. Both I/O tile variants use TSMC N6. [1], [2] Our analysis centers on the PTL-U compute tile, both the 4-core and 12-core GPU tiles, as well as the 12-lane I/O tile. In conventional chips, power and signal are routed through the same frontside metal stack towards the device frontend. Power rails consume scarce routing resources near the transistors, while tall via stacks carry VDD and VSS from the coarse upper wires to local rails. Backside power delivery (BSPD) moves the main power network behind the transistor layer, to the backside, separating it from frontside signal routing. We covered BSPD and its impacts in 2024. [3], [4], [5] Intel’s BSPD implementation, branded as “PowerVia”, routes power through dedicated backside metals to nano-TSVs, which connect those rails to local source/drain (S/D) contacts. Implementing that separation requires Intel to build the interconnect stacks from both sides of the wafer. The frontside comprises the M0-M14 signal stack, while the backside comprises the BM0-BM5 power stack. M0 and BM0 are closest to the transistors. The nano-TSVs connect the two sides, but Intel patterns and etches each via from the front after forming the contacts. A narrow via runs from the side of the contact deep into the silicon substrate. Intel then completes the frontside signal metal stack, bonds the wafer to a carrier, flips it and removes the original substrate until the buried via tips are exposed. The backside metal stack is then deposited directly on the revealed vias. The nano-TSV and backside-via profiles taper in opposite directions because Intel forms them from opposite sides of the wafer. The transistor structures form the FEOL. Local contacts and nano-TSVs connect them to the wiring. M0 begins the frontside interconnect stack. The silicon carrier remains attached above the frontside interconnects. It supports the device wafer during substrate removal and backside processing and remains part of the finished chip’s thermal path. PowerVia removes the main power distribution from the congested frontside metals, routing supply through shorter and wider backside wires. Its lateral landing still occupies area in the standard cell, so it recovers less cell area than a direct backside contact. [3] Nano-TSVs beside the logic devices carry VDD or VSS from the backside power network, while signal connections continue upward through the frontside metals. Backside Interconnects Samsung SF2 data is included for comparison to Panther Lake’s within this article. SF2 is the incumbent GAA foundry node but lacks BSPD, serving as a useful reference to evaluate 18A. A full teardown of Samsung’s S26 products, processed on SF2, will be shared soon.Nanosheet-cut EDS comparison. The PowerVia supply path runs from the backside Cu rails through Mo-lined W nano-TSVs to the local transistor contacts. In this cross section, the tapered connection spans roughly 150 nm from the contact level to BM0. The Ta liner confines Cu and promotes adhesion to the surrounding stack; the AlOₓ etch stop controls the next dielectric etch above the rail. Dielectric beneath the ribbons electrically separates the devices from the backside wiring and removes the conducting silicon body below the channel. [6] AlOₓ serves as an etchstop (ES), enabling endpointing and protecting the underlying layers. Low-volatility aluminum fluoride reaction products resist the fluorinated plasma, allowing a thin AlOₓ film to protect the metal while the surrounding low-k dielectric is removed. [6], [7]. While the BM0 and layers above the M1 lines show double AlOx layers, Our SMIC N+3 teardown showed single AlOₓ layers. SMIC uses a simpler local AlOₓ substack, while the remaining cap and etch sequence provide the required landing protection. So why double layers? The closely spaced AlOₓ doublets provide two protected endpoints in the etch sequence. Intel documents an AlOₓ/SiN/AlOₓ stack that explains the benefit. The main dielectric plasma etch stops on the first AlOₓ film; a selective wet clear opens that film; a second plasma etch removes the intermediate SiN and stops on the second AlOₓ film. The final wet clear exposes the metal landing surface. SiN is the intermediate dielectric in Intel’s published example. [8] The second stop protects the metal through a cap breakthrough. Wide openings can etch faster than narrow ones, and etch depth varies across the wafer. Metal under an early-clearing opening would otherwise be exposed while other openings still need more etching. Staged protection widens the process window and reduces metal erosion, corrosion and void formation. [8] TSMC documents AlN/AlOₓ/SiOC/AlOₓ above Cu, with AlN blocking Cu diffusion, and a simpler AlN/SiOC/AlOₓ variant that omits one AlOx film. [9] Levels with different opening sizes, aspect ratios, pattern densities and cap materials need different etch margins. A double AlOx stop is useful where another protected endpoint justifies the added processing. The extra film adds formation, selective opening and cleaning steps, plus another set of interfaces to control adhesion, moisture, and stress. These blanket films are opened through the existing via pattern, so each film does not require another lithography mask. AlOₓ adds parasitic capacitance when it replaces lower-k dielectric; two thin AlOₓ films can nevertheless contain less AlOₓ than one thick film. Total thickness, placement, and theintermediate dielectric determine the electrical cost. Deposition chemistry also changes AlOx permittivity and residual hydroxyl content, which can oxidize the underlying metal. [7], [8], [10], [11] The backside stack separates into relatively fine BM0-BM2 wiring near the devices and coarser BM3-BM5 power distribution. The largest pitch increase occurs between BM2 and BM3. BM0’s pitch closely matches the logic-row height, fitting local power delivery to the cell rows. Higher levels aggregate current through larger conductors: routing density becomes less important than low resistance and current capacity as the network approaches the package. This hierarchy provides wide power wiring for the power delivery network without consuming scarce frontside signal-routing resources. [3] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Frontside Interconnects Intel 18A combines Mo-lined W contacts and nano-TSVs with a separate backside Cu power network. Samsung SF2 keeps power on the frontside, using Ti-based contact interfaces and Ta-based barriers and Co liners around Cu wiring. In 18A standard-cell rows, backside power rails supply the devices through nano-TSVs within the cells, freeing frontside routing resources. Samsung’s M0 accommodates both power and signal connections. From the device toward M0, the connection runs through a Ti-based S/D interface, W contact fill, a Mo-lined W via, and the Cu M0 wire. Mo supplies a conductive nucleation and adhesion layer for W, replacing the resistive TiN liner used in conventional W integration. This increases the effective conduction volume within the feature while retaining W fill and its established polishing, cleaning and etching processes. Intel’s Mo/W patent describes this integration tradeoff. The nano-TSV uses the same Mo-lined W construction in the backside supply path. [12] The move from TiN to Mo is an incremental change. While a full Co or Mo fill can also reduce the volume lost to liners in very small features, it requires new integration schemes that increase complexity and risk. Cu remains attractive for wider wires due to its low resistance. As wires and vias shrink, the diffusion barrier consumes an increasing fraction of their cross-section. [12], [12], [14] Intel uses Co/Ru liners at M0-M1, Co at M2-M4, and Nb at M5-M9. The lower-level liners help Cu adhere and reduce void formation during trench fills. Applied Materials’ Endura has new thermal control that facilitate wetting process, so the thin film continuity is good enough that good capillary pressure will drive Cu atoms to the via bottom without voiding. Intel’s choice to use Nb is particularly interesting. Intel’s Nb patent describes a conductive diffusion barrier intended to reduce the barrier’s contribution to resistance relative to conventional Ta-based barriers, particularly at via bottoms where all current crosses the barrier. The patent pairs Nb in coarser levels with the option of lower-cost PVD processing. [15], [16] The upper metal layers support thicker barriers formed through physical vapor deposition (PVD) despite its worse coverage and uniformity. Meanwhile, the lower metal layers require thinner barriers deposited through conformal atomic layer deposition (ALD). Co/Ru adds another material interface and requires controlled deposition and Cu fill. Changing liners and barriers by metal layer allows Intel to optimize interconnect resistance, process complexity, and reliability. [15, 16] RibbonFET, Intel’s name for its gate-all-around FETs (GAAFETs), replaces the FinFET’s vertical fins with four stacked horizontal silicon nanosheets, allowing the gate to surround the channel on every side. The path to GAAFET begins with the planar transistor. A planar MOSFET places the gate above the channel between its source and drain. Pairing an NMOS with a PMOS transistor creates a CMOS inverter, in which the NMOS pulls the output low for a high input, and the PMOS pulls it high for a low input. The gate must retain electrostatic control of the channel to ensure clean switching. As gate lengths shrank, the drain began to compete with the gate for that control, increasing off-state leakage. Electrostatic control was restored through an architectural evolution that raised the channel into a vertical fin and wrapping the gate around three sides. Called “FinFET”, this new architecture packed more effective channel width into a smaller footprint. Further scaling made it harder to maintain both drive current and leakage within smaller cells, and reintroduced the same problems planar MOSFETs faced. Nanosheet GAAFETs close the fourth side by replacing the vertical fin with a stack of horizontal nanosheets, each surrounded by the gate. The tighter electrostatic control suppresses leakage at shorter gate lengths while stacking adds effective channel width within the cell footprint. In a FinFET process, channel width changes in discrete steps as designers must add or remove whole fins. Nanosheet width can instead be adjusted continuously within the process’s design rules. Wider sheets increase drive current, while narrower sheets reduce capacitance at the cost of drive current. Intel 18A uses stacks of four nanosheets each and varies their widths across logic and SRAM. At the process level, adding more sheets to each stack increases effective channel width and drive current, but complicates fabrication. RibbonFET vs MBCFET Samsung began GAAFET production in 2022 with SF3E, following with SF3 and now SF2. Its ‘MBCFET’ provides a useful structural comparison with Intel’s first RibbonFET implementation. [17] STEEL is digging deeper into SF2, used in the Exynos 2600, and TSMC’s GAAFET N2, used in Apple’s A20 Pro, in upcoming newsletter articles. We’re throwing some teasers on X. Let’s compare Samsung SF2’s MBCFET with Intel 18A’s RibbonFET. Subscribe Even to the untrained eye, Intel’s extra nanosheet is obvious. Intel stacks four ribbons to Samsung’s three. Samsung’s sheets are much wider in these fields, so both sheet count and width matter to the available channel perimeter. Sheet width also changes which silicon surfaces carry current. On conventional (001) silicon, wide nanosheets emphasize the broad top and bottom surfaces, favoring electron transport; the larger sidewall contribution in a narrow sheet favors hole transport. Thinner sheets improve gate control but increase confinement and scattering. This makes width and thickness part of the NMOS/PMOS balance, alongside strain and threshold voltage. [18], [19] GAAFET designs like 18A use different work-function-metal (WFM) stacks for NMOS and PMOS. Around each ribbon, a thin SiOx interfacial layer separates the silicon channel from the HfOx high-k dielectric, with La providing dipole tuning and the WFM wrapping the dielectric. NMOS uses a TiAl-based stack, while PMOS uses TiN WFM. W fills the remaining gate trench, providing a lower-resistivity path where the work-function layers are no longer needed. In this field, the PMOS stacks leave room for W between ribbons, while the NMOS stacks occupy more of those gaps. A silicon-based dielectric marks the P/N boundary, allowing the PMOS and NMOS gates, sharing the same gate trench, to be processed sequentially. Fast logic paths, retention circuits, and SRAM need a family of threshold options. Changing threshold without substantially changing device dimensions, capacitance or fabrication complexity is valuable. FinFET processes typically use different work-function-metal stacks. In a four-ribbon GAA stack, the narrow sheet-to-sheet gap limits how much WFM can fit around each channel. La in the gate dielectric creates interfacial dipoles at the SiOx/HfOx boundary, shifting effective work function and tuning threshold voltage. This gives Intel another control alongside its NMOS and PMOS WFM stacks. Low-threshold devices improve critical-path drive; higher thresholds reduce leakage elsewhere. Dipole tuning is especially useful in GAA because it changes threshold without consuming the narrow intersheet gap with thicker WFM. Precise control of La incorporation, diffusion and interface quality has long been a challenge, limiting viability in high volume production but is now seen from every leading-edge foundry. Intel’s patent describes depositing a dipole-forming oxide above HfOx and annealing it toward the interfacial oxide before completing the work-function and fill metals. This separates threshold tuning from the space available for metal. Newer research addresses the thermal cost: imec’s 2026 dipole-middle research inserts the shifter between two HfOx depositions, shortening the diffusion path while protecting SiOx during patterning. [20], [21]Matched-cut EDS, Intel 18A (left) vs. Samsung SF2 (right). Intel retains raised source/drain epi beneath its contacts, while Samsung recesses W deep into the epi to form a V-shaped Ti-lined interface. The deeper contact increases metal-to-semiconductor area and shortens the current path from the lower sheets, reducing contact and spreading resistance. It also removes epi volume and brings the contact etch closer to the channel ends. Retaining more epi preserves the material available for strain transfer, especially from SiGe into PMOS. These geometries balance contact access against stress engineering and etch margin. [22], [23] Samsung stacks three sheets to Intel’s four ribbons, and both processes use sheet width to tune drive strength. In our Samsung cross-sections, widths range roughly from 19 to 30 nm in the NPU rows and 37 to 50 nm in the CU cell. The Samsung nanosheets taper, with the widest sheet at the bottom and the narrowest at the top. Both processes use HfOx gate dielectric and Ti-based work-function stacks, with Al in the NMOS stack. In the Samsung devices shown here, the dielectric and WFM occupy the intersheet gaps, leaving W above the top sheet. Intel’s PMOS stack leaves more room between ribbons, and W fills those gaps while the thicker NMOS stack leaves W mainly in the upper trench. Gate-stack EDS maps. The W between Intel’s PMOS ribbons provides a conductive path close to the lower gates. Where WFM fills the entire gap, the gate still surrounds the channel, but voltage reaches it through the more resistive work-function films. Thinner WFM and dipole tuning preserve room for low-resistivity fill; Mo and Ru are alternative fill metals being developed for further scaling. [24] A masked, sequential WFM flow explains the different gate heights and inter-nanosheet fill. The proposed sequence below shows how separate NMOS and PMOS work-function steps produce that geometry. Enabled by the BSPDN process, Intel replaces the dense-logic silicon subfin with dielectric, removing the parasitic conduction path below the ribbons and reducing substrate-related capacitance. A retained silicon body as in classical, non-SOI, planar and FinFET designs needs junction and punchthrough-stop engineering to suppress leakage. Dielectric isolation makes that leakage less sensitive to the subfin doping profile but adds removal and fill steps. It also weakens the direct thermal path through silicon, making the contacts, metal stacks and package more important for heat extraction. [24], [26] Fluorine is concentrated around selected Intel device structures in the maps. WF6 is a standard precursor for W nucleation and fill, while barrier films protect adjacent dielectrics from fluorine attack. Low-fluorine W processes reduce the residual-F burden. Chloride-based precursors avoid introducing F during W deposition, but require control of chlorine attack, nucleation and fill quality. The integration target is a continuous, low-resistance W path with a thin protective liner and minimal chemical damage to the surrounding stack. [20], [27], [28] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. We measured cell height, gate pitch, metal geometry, and ribbon dimensions at the XTEM sites shown below. The tables group these dimensions by site and device polarity. Our “sheet cuts” cross the silicon channel and show the ribbons end-on. “gate cuts” run along the channel through successive gates. The 18A logic cell dimensions point to a five-track logic library while the N3E and Intel 3 cell dimensions evidence a seven-track logic library. The DDR-PHY uses wider M0 wires and much larger spacing than core logic. That trades routing density for lower wire resistance and weaker coupling between neighboring nets. The geometry suits the current delivery and coupling requirements of analog, clock, and I/O circuitry. PowerVia lets 18A combine a compact cell height with wider M0 geometry by moving the main power rails off the signal-routing tracks. That relaxes local wire scaling while preserving a small cell footprint. Cell height and gate pitch set the geometric density; pin access and routability determine how much of it a real block can use. [29] The biggest takeaway from our gate-pitch measurements is that Intel 18A compute logic and TSMC N3E GPU logic have similar density in the Bohr representative-cell model. The 18A example is 18.6% denser than the Intel 3 GPU example. Gate pitches are nearly identical across the three sites, so cell height drives most of the difference. The Bohr model combines a four-transistor NAND2 spanning three gate pitches and a 32-transistor scan flip-flop (SFF) spanning nineteen pitches, weighting their densities 60:40. The sensitivity column shows how independently changing cell height and gate pitch by ±1 nm changes the result. This compares representative cell geometries; whole-die density also depends on cell mix and placement. The 18A P-core gives M0 substantially more metal cross section than the N3E vector engine. Treating each profile as a trapezoid gives 2.63 times the area per line and 1.84 times the area after normalization by routing pitch. The larger section reduces the geometric contribution to line resistance and lowers current density for a given current. Taller and wider wires also add capacitance, so circuit delay depends on the balance of resistance and capacitance. The DDR-PHY has less metal area per routing width than the 18A core fields, while remaining above N3E. [30] Area = height × (top CD + bottom CD) / 2, including liners. Area/pitch normalizes by routing width. Taper is the symmetric sidewall angle from vertical, with the largest angle belonging to the DDR-PHY. Compute tile The measurements show how ribbon dimensions and gate-stack geometry vary across the compute tile and between NMOS and PMOS to balance channel drive, gate load and the space needed for the dielectric/WFM stack across logic, SRAM and the DDR-PHY. Width mainly changes available channel perimeter; thickness also changes electrostatic control and carrier confinement. Gate-stack thickness then determines the space left for low-resistivity fill P-core and LP E-core logic Both the P-core and LP E-core use multiple nanosheet widths. Widths are measured on high-magnification XTEMs while wider-field images demonstrate additional width choices within the LP E-core. Multiple widths are expected even within an LP E-core. Timing-critical paths, buffers and cells with different fanout need different drive strengths. The lower-magnification fields show this width diversity beyond the sites quantified in the table. L2 and L3 SRAM GAA gives SRAM designers another way to balance the pull-up (PU), pass-gate (PG), and pull-down (PD) transistors. FinFET bitcells set device strength through fin count while GAA adds nanosheet width as a sizing knob. In a 6T SRAM cell, a strong pull-down relative to the pass-gate limits read disturbance, while a strong pass-gate relative to the pull-up improves writability. During a write, the pass-gate and write driver pull the node storing “1” below the inverter trip point. During a read, the pull-down holds the node storing “0” low. Bias, threshold voltage, mismatch and assist circuitry set the remaining margin. FinFET high-current cells commonly use a PU:PG:PD fin-count pattern of 1:2:2, a device-sizing ratio rather than a current ratio. Ribbon width lets Intel balance SRAM strengths without adding whole fins. The L2 cell uses its narrowest ribbons for PU and widest for PD, improving writability and read stability respectively. Intel’s disclosed HCC operates without assist; its denser HDC uses negative-bitline write assist. Pulling the selected bitline briefly below ground increases pass-gate overdrive so it can overpower the pull-up at lower supply voltage. That buys density and low voltage writability at the cost of boosting circuitry, switching energy, and additional voltage stress that must be controlled. [31], [32] Four rectangular ribbons give the perimeter = 8 × (width + thickness), before corner rounding. PG/PU is 1.49 and PD/PG is 1.16. The L3 structures closely resemble L2 in layout and cell height. Fewer L3 nanosheet widths are tabulated because fewer high-magnification images were available. DDR PHY The DDR-PHY trades density for controlled analog behavior and reliable off-chip signaling. It contains drivers, receivers, delay circuits, and calibration logic that set drive strength, sampling time, and voltage margin. Repeated four-sheet devices with similar widths fit the use of regular transistor units for matching and programmable drive. Its wider local wiring provides room for current delivery and separation of sensitive signals, while consuming more area than a dense core-logic grid. The layout serves the memory channel’s electrical requirements as well as digital logic density. [33] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Intel 3 GPU devices Vector engine logic Intel 3’s XVE logic uses two-fin PMOS and NMOS devices with power rails in M0. Its cell height and M0 pitch give a seven-track geometry, two tracks more than the 18A logic. One-fin groups also appear among the two-fin devices. Intel 3 L2 SRAM The Intel 3 L2 SRAM uses the familiar HCC sizing pattern: one PU fin, two PG fins, and two PD fins. N3E GPU devices Vector engine logic The N3E XVE field contains repeated two-fin devices with seven-track cell geometry. N3E remains a FinFET process, giving Panther Lake a direct FinFET-to-RibbonFET comparison. N3E L2 SRAM The N3E L2 SRAM uses the same PU:PG:PD fin-count pattern of 1:2:2. Panther Lake-U follows Lunar Lake’s floorplan quite closely. Both pair 4 P-cores with 4 LP E-cores and NPU, media and display engines in similar locations. Lunar Lake also uses Xe2, the direct predecessor to Panther Lake’s Xe3 GPU. This makes Lunar Lake the most direct basis for our comparisons. Arrow Lake differs in core count and uses the older Xe-LPG GPU architecture, so we only use it where it offers a more direct component-level comparison. Compute tile Panther Lake compute-tile floorplans remain sparse even months after launch. Intel 18A’s backside metal and dielectric stack must be removed without damaging the underlying structures before a clean transistor-level floorplan can be imaged. Most published die shots hide or heavily process the background, but we are quite proud of the die shot we achieved and are excited to show the work we have done. We measured the areas of the key components on the compute tile and compared them with their Lunar Lake predecessors on TSMC N3B. These help us to capture changes in block area and compare the two chips across process nodes and designs. Our total tile areas exclude the scribe-line area. The compute-plus-GPU subtotal below uses the PTL-U compute tile and GT1 GPU; it excludes the I/O tile and passive base. Individual block areas use the boundaries marked on the floorplans The compute-plus-GPU row is recomputed from the displayed PTL-U and GT1 areas. Component rows use their stated per-region counts and are not an additive partition of the whole tile. The P-core area remains almost unchanged between Lunar Lake and Panther Lake, despite L2 capacity increasing from 2.5 MiB to 3 MiB. Arrow Lake uses the same Lion Cove core as Lunar Lake but also has a 3 MiB L2. Cougar Cove fits 20% more L2 into the same P-core area. The larger private cache keeps more of each core’s working set close to its execution units, reducing access to shared L3 and DRAM. Extra capacity adds storage leakage and lookup energy, so designers balance it against avoided lower-level accesses. The shared P-core L3 cache also shrank by 14.8%. [2] Cougar Cove combines a similar footprint with Intel’s reported power-efficiency improvements. RibbonFET’s tighter channel control reduces leakage, while PowerVia reduces supply droop and allows tighter voltage guardbands. [1] Darkmont’s four-core LP E-core cluster is 5.0% smaller than Skymont’s on Lunar Lake, with most of the reduction in its L2 regions. The 1 MiB region shrank by 8.4% and the 1.5 MiB region by 14.9%. The tag arrays also use one fewer visible row. Tags identify which memory addresses the data array holds, so rearranging them changes the cache’s layout and wiring without requiring less data capacity. [2] The LP E-cores share one L2. This pools capacity and avoids duplicating all the cache machinery, but the four cores contend for its banks and bandwidth. Their separate cluster also keeps light work away from the performance cluster and its L3, allowing that larger domain to sleep. [1], [2] Cache area includes more than the storage cells. Tags identify each line, decoders select rows, sense amplifiers read the small bitline signal, and wires connect to the banks. Splitting an array into smaller sections shortens wordlines and bitlines, improving access speed, but duplicates peripheral circuits. Panther Lake’s smaller cache regions therefore reflect the complete memory implementation, including how much of each region is devoted to storage. [34] Unlike Meteor Lake and Arrow Lake, Panther Lake has no separate SoC tile. The NPU, LP E-cores, memory controllers, PHYs, media and display engines now share the compute tile. This removes an active die and keeps CPU memory traffic on one die. The cost is moving PHY and I/O-related circuitry onto 18A: drivers, receivers and analog circuits must still meet external voltage, loading and signal-integrity requirements, so their area does not shrink like dense digital logic. [1], [2] The biggest shrink comes from the NPU, which occupies 36.9% less area. NPU 5 consolidates the same total INT8 MAC count into half as many neural compute engines. Each of the three NCEs has a larger MAC array to make the complete NCE envelope 22.6% larger than an NPU 4 engine. Consolidation also halves the number of scratchpads and SHAVE DSPs, from 12 to 6. The MAC array handles matrix multiplication and convolution, while SHAVE executes vector and custom operations that fit the array poorly. [1], [2], [35] The paired floorplans identify each NCE envelope and its scratchpad, MAC, and SHAVE regions. Each measured MAC polygon is counted once per NCE in the area accounting below. The scratchpads store weights, activations, and intermediate results near the MAC arrays, allowing repeated use without fetching them again from DRAM. Halving their number delivers the largest measured area saving but leaves less local storage for the same total MAC count. Layers that no longer fit locally require smaller working tiles or more transfers of intermediate data. The benefit depends on keeping the enlarged arrays busy while managing that tighter storage budget. [36] NPU 5 also adds native FP8. Using half the operand width of FP16 reduces storage and transfer demand, helping workloads fit the smaller local memory budget. Lower precision and format-dependent range make scaling and model validation part of deployment. Hardware activation functions further reduce work that would otherwise occupy the programmable DSPs. [1], [2] Microsoft requires an NPU to deliver at least 40 TOPS for Copilot+ PCs. Both Lunar Lake and Panther Lake meet this threshold, but Panther Lake uses significantly less silicon. GPU tiles Panther Lake is Intel’s first product with Xe3, its latest GPU architecture. It offers two different GPU tiles: a smaller GT1 tile with 4 Xe3 cores on Intel 3 and a larger GT2 tile with 12 Xe3 cores on TSMC N3E. Panther Lake allows us to compare the same GPU architecture across both Intel 3 and TSMC N3E. Wildcat Lake adds a third Xe3 implementation on Intel 18A. A future newsletter will detail Xe3 and its implementation differences across all three process nodes. GT2 scales Xe3 to a different physical layout, with render slices arranged vertically instead of GT1’s horizontal arrangement. Slice placement sets the distances to shared cache banks and the D2D interface. Those wires consume area and add delay, so scaling the number of Xe cores also requires a new balance of cache placement, routing and timing. [1] What’s immediately obvious is that the GT2 tile on TSMC N3E has much smaller Xe cores than GT1. These block areas include logic, caches, and routing. An Xe core on the GT1 tile is ~69% larger than one on Lunar Lake, and ~55% larger than one on GT2. Intel 3 therefore uses substantially more area per Xe core. The block-area gap exceeds the measured logic and SRAM density gaps, bringing routing, timing targets, cell mix, and floorplan allocation into the comparison. The measured vector/matrix engine region is almost unchanged between Lunar Lake and Panther Lake’s GT2 tile. Xe3 retains eight 512-bit vector engines and eight 2048-bit XMX engines per core. Its gains also come from feeding those engines more effectively: more resident threads hide stalls, and variable register allocation lets shaders trade registers per thread against the number of threads kept active. [1] The shared L1/SLM capacity increased by 33% from 192 KiB to 256 KiB, while its area increased only 5%, raising effective density by 27%. L1 retains reused cache lines, while software-managed SLM lets a thread group share data locally. Both reduce traffic to more distant memory. Allocating more SLM per group can also limit how many groups reside on a core at once. [1], [37] The GT1 tile carries 4 MiB of L2 against 16 MiB on the GT2 tile. GT1 divides its L2 cache into four 1 MiB banks, while GT2 uses eight 2 MiB banks. Each bank contains 128 macros, but each N3E macro stores 16 KiB, twice the Intel 3 macro’s 8 KiB capacity. The N3E macro is only 54% larger while holding twice as many bits, giving it 30% higher density: ~23.7 Mbit/mm² versus 18.3 Mbit/mm². Including bank-level circuitry, the gap widens to ~16.9 Mbit/mm² on GT2 versus ~10.4 Mbit/mm² on GT1. GT2 gains density with its macros storing more bits per unit area, and those macros occupy more of each cache bank. Larger macros spread decoder and sense-amplifier overhead across more storage, while a more compact bank layout reduces the share spent on control and routing. The compromise is longer wordlines and bitlines that carry more capacitance. [34] I/O tile Panther Lake uses two I/O tile variants, both fabricated on TSMC N6. The smaller one provides 4 PCIe 5.0 and 8 PCIe 4.0 lanes and serves lower-tier systems as well as those without a discrete GPU, while the larger one adds 8 PCIe 5.0 lanes, bringing the total to 20 lanes, for discrete-GPU connectivity. Panther Lake SKUs with the larger 10- or 12-Xe GPUs use the smaller I/O tile. [38] The smaller I/O tile adds a PCIe 4.0 block and a Thunderbolt block to Lunar Lake’s I/O layout, providing four additional PCIe 4.0 lanes and another Thunderbolt 4 port. Its repeated N6 blocks retain nearly identical areas and layouts. Reusing these proven PHYs and controllers avoids porting and requalifying external interfaces on 18A, where faster digital logic offers less benefit to circuits constrained by the off-chip link. [38] SemiAnalysis’s teardown lab (STEEL) dives deep into the world’s advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. We’re hiring technical experts from system to transistor and everywhere in between. Check out our Careers page. Panther Lake offers scalability and modularity through its disaggregated packaging that partition compute, GPU, and I/O silicon into separate tiles allowing for a suite of tile configurations. This partitioning makes the package part of Intel’s node economics as it determines how much leading-edge wafer area each product consumes, which functions can remain on other processes, and how much configuration freedom Intel can offer from a shared set of tiles. Furthermore, fabricating the compute and GPU tiles separately confines the new 18A process to the compute tile and allows graphics and I/O to use other, more established, and more cost-effective processes. For Panther Lake, the GPU and I/O tiles are assembled alongside the compute tile on a passive silicon base using Foveros-S. Intel’s current technology brief lists a nominal 36 µm pitch for Foveros-S. Through-silicon vias (TSVs) in the base connect the fine wiring above to the larger package connections below. The functional tiles sit side by side on that passive base in a 2.5D configuration. [39] Our cross-section through the compute and GPU tiles shows the package’s wiring hierarchy. Microbumps connect each active tile to the passive silicon base; its fine redistribution layer (RDL) carries the short, dense tile-to-tile links. TSVs carry connections through the base to the package substrate, which fans them out to the much coarser motherboard solder joints. The base supplies interconnect, while computation remains in the active tiles above it. [39] At the compute-tile edge, the higher-magnification inset shows a local microbump spacing of approximately 25.24 µm and a feature width of 12.33 µm. These local spacings are finer than Intel’s nominal Foveros-S value. The X-ray fields further confirm tighter neighboring bumps, consistent across every die-to-die area found on each tile. Additional X-ray analysis is offered after the paywall. Putting the memory controller beside the CPU removes the D2D transfer that CPU memory requests required in Meteor Lake and Arrow Lake. This avoids the extra transmitter, receiver, and link traversal, saving interface energy and latency. Panther Lake’s separate GPU still crosses a D2D link to reach DRAM, so its larger local caches also help contain package traffic. [1], [40] Smaller dies are less likely to contain a random fatal defect, and screening them before assembly prevents one bad tile from consuming a complete package of good silicon. Reuse also spreads design and qualification work across more products. Against those gains, Intel pays for the passive base, D2D circuits, extra bonding and test steps, and losses during assembly. Cost per working product across the portfolio captures the combined effect of wafer yield, reuse, test, and assembly. [29] Wildcat Lake packaging Intel launched Core Series 3, formerly Wildcat Lake, on 16 April 2026 for value mobile and edge systems. Wildcat Lake keeps 18A but removes the passive base and combines more functions on one die to simplify the package. The two products therefore reveal two distinct ways to commercialize the same leading-edge process. [41] Wildcat Lake’s 18A die combines up to two Cougar Cove P-cores, four Darkmont LP E-cores, two Xe3 cores and a smaller NPU. A separate platform-controller die supplies I/O, connected through UCIe, Intel’s first processor implementation of the standard. Consolidating graphics remove a tile boundary and the passive base, reducing assembly complexity for a modest-bandwidth value product. It also ties CPU and graphics scaling to the same die, giving up Panther Lake’s ability to swap in a much larger GPU. [42], [43] In July 2021, Intel CEO Pat Gelsinger set out an ambitious process roadmap aimed at regaining performance leadership by 2025, later described as five nodes in four years. Five years and one CEO later, Intel’s comeback story is not as unambiguously positive as Pat may have hoped. [44], [45] Intel once set the pace for process technology, bringing high-k metal gate technology and FinFETs into volume production years ahead of the rest of the industry. Its 22 nm FinFET process reached consumers with Ivy Bridge in 2012. [46] Intel’s integrated device manufacturing (IDM) model allowed its architects and process engineers to co-optimize products and processes. Starting with Sandy Bridge, Intel dominated x86, while AMD struggled with Bulldozer. That lead faltered at 14 nm and broke at 10 nm. Intel targeted a massive 2.7× density increase, but the node arrived years late and required several revisions before it could support Intel’s full lineup. This delay forced Intel to stretch 14 nm across six generations, while TSMC moved ahead in process technology and AMD recovered in x86. By 2019, Intel was still shipping 14 nm across most of its product stack, with its 10 nm client ramp focused on Ice Lake mobile processors. Meanwhile, TSMC was shipping N7 and N7+, and AMD’s Zen 2 compute chiplets used N7 to raise core counts and improve efficiency. Intel’s process failures were central to its decline, but unsound business decisions furthered their downward slide. Product delays compounded product mistakes, pushing client, server, and FPGA roadmaps off schedule. Several attempts to enter AI (Nervana and Gaudi) and networking (Tofino) also failed to establish lasting businesses. Intel’s recovery has focused on consumer CPUs and advanced packaging. Tiger Lake, Alder Lake, Lunar Lake and now Panther Lake have restored Intel’s consumer roadmap. On the process side, Intel 4 shipped with Meteor Lake, Intel 3 with Granite Rapids and Sierra Forest, and Intel 18A with Panther Lake. Intel has also made advanced packaging part of its foundry offering. However, Intel is still playing catch-up in servers. Several Xeon generations arrived years late and trailed contemporary AMD and Arm server CPUs in performance, efficiency, and core count. The process roadmap is back, but Intel does not hold the same process-technology leadership position it held prior to 10 nm. The introduction of gate-all-around nanosheets and backside power delivery are two of the biggest changes to transistor integration in a decade. Intel took on both changes at once: 18A paired its first RibbonFET with PowerVia in Panther Lake. Panther Lake is a substantial manufacturing milestone. Our cross-sections show how RibbonFET and PowerVia reshape local contacts and wiring, while the floorplans show where architectural consolidation and process choices save area. A sustained competitive lead depends on product performance, cost, yield, and the next implementation. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page.. [1] Intel, “Intel Tech Tour 2025 Panther Lake recap,” Doc. 866361, 2025. Accessed: Sep. 14, 2026. [Online]. Available: https://cdrdv2-public.intel.com/866361/ITT_2025_Panther_Lake_Recap1.pdf [2] Intel, “Core Ultra processors Series 3 datasheet, volume 1,” Doc. 872188-001, Jan. 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://cdrdv2-public.intel.com/872188/872188-001.pdf [3] N. Horiguchi and E. Beyne, “Backside power delivery: How to power chips from the backside,” imec Reading Room, Nov. 25, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://www.imec-int.com/en/articles/how-power-chips-backside [4] W. Hafez et al., “Intel PowerVia technology: Backside power delivery for high density and high-performance computing,” in Proc. IEEE Symp. VLSI Technol. Circuits, Kyoto, Japan, Jun. 2023, pp. 1–2, doi: 10.23919/vlsitechnologyandcir57934.2023.10185208. [5] K. Fischer et al., “Intel 18A platform technology featuring RibbonFET (GAA) and PowerVia for advanced high-performance computing,” in Proc. Symp. VLSI Technol. Circuits, Kyoto, Japan, Jun. 2025, pp. 1–3, doi: 10.23919/vlsitechnologyandcir65189.2025.11075006. [6] K.-F. Cheng, C.-L. Teng, H.-Y. Huang, and H.-C. Chen, “Metal oxide composite as etch stop layer,” U.S. Patent 12 176 247 B2, Dec. 24, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US12176247B2/en [7] S. W. King, “Dielectric barrier, etch stop, and metal capping materials for state of the art and beyond metal interconnects,” ECS J. Solid State Sci. Technol., vol. 4, no. 1, pp. N3029–N3047, 2015, doi: 10.1149/2.0051501jss. [8] A. V. Mule’, D. J. Towner, D. Seghete, C. R. Ryder, and A. A. Gonzalez, “Multi-layer etch stop layers for advanced integrated circuit structure fabrication,” U.S. Patent Appl. 20220102343 A1, Mar. 31, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20220102343A1/en [9] C.-C. Wang and J. H. Wang, “Interconnect structure with dielectric cap layer and etch stop layer stack,” U.S. Patent Appl. 20230253247 A1, Aug. 10, 2023. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20230253247A1/en [10] Y. J. Wu, K.-F. Cheng, C.-C. Lee, H.-K. Chang, and H.-Y. Huang, “Etch stop layer for interconnect structures,” U.S. Patent Appl. 20240332070 A1, Oct. 3, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20240332070A1/en [11] M. G. Rainville, N. Shankar, K. S. Reddy, and D. M. Hausmann, “Deposition of aluminum oxide etch stop layers,” U.S. Patent Appl. 20180197770 A1, Jul. 12, 2018. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.justia.com/patent/20180197770 [12] J. S. Leib et al., “Conductive lines having molybdenum liner and tungsten fill for advanced integrated circuit structure fabrication,” U.S. Patent Appl. 20240429126 A1, Dec. 26, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.justia.com/patent/20240429126 [13] M. Naik, “Cobalt enables power and performance scaling at single-digit logic nodes,” Applied Materials, Dec. 17, 2018. Accessed: Sep. 14, 2026. [Online]. Available: https://www.appliedmaterials.com/us/en/blog/blog-posts/cobalt-enables-power-and-performance-scaling-at-single-digit-logic-nodes.html [14] Lam Research, “Breaking through AI’s invisible barrier with molybdenum,” Lam Research Newsroom, May 6, 2025. Accessed: Sep. 14, 2026. [Online]. Available: https://newsroom.lamresearch.com/molybdenum-metallization-ai-revolution [15] P. Yashar, G. Malyavanatham, and H. Vijwani, “Integrated circuit interconnect structures with niobium barrier materials,” U.S. Patent Appl. 20240112951 A1, Apr. 4, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20240112951A1/en [16] Applied Materials, “Applied Materials unveils chip wiring innovations for more energy-efficient computing,” Applied Materials Investor Relations, Jul. 8, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://ir.appliedmaterials.com/news-releases/news-release-details/applied-materials-unveils-chip-wiring-innovations-more-energy [17] Samsung, “Samsung showcases AI-era vision and latest foundry technologies at SFF 2024,” Samsung Semiconductor, Jun. 13, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://semiconductor.samsung.com/news-events/news/samsung-showcases-ai-era-vision-and-latest-foundry-technologies-at-sff-2024/ [18] C. W. Yeung et al., “Channel geometry impact and narrow sheet effect of stacked nanosheet,” in Proc. IEEE Int. Electron Devices Meeting (IEDM), Dec. 2018, pp. 28.6.1–28.6.4, doi: 10.1109/iedm.2018.8614608. [19] S. Mochizuki et al., “Evaluation of (110) versus (001) channel orientation for improved nFET/pFET device performance trade-off in gate-all-around nanosheet technology,” in Proc. Int. Electron Devices Meeting (IEDM), Dec. 2023, pp. 1–4, doi: 10.1109/iedm45741.2023.10413854. [20] D. G. Ouellette et al., “Fabrication of gate-all-around integrated circuit structures having molybdenum nitride metal gates and gate dielectrics with a dipole layer,” U.S. Patent 12 051 698 B2, Jul. 30, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US12051698B2/en [21] imec, “Advancing the CFET-based device roadmap with novel integration modules and standard-cell architectures,” imec, 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.imec-int.com/en/articles/advancing-cfet-based-device-roadmap-novel-integration-modules-and-standard-cell [22] A. Reznicek, X. Miao, C. Lee, and J. Zhang, “Wrap around contact for nanosheet source drain epitaxy,” U.S. Patent 11 302 813 B2, Apr. 12, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US11302813B2/en [23] J. A. Kittl, J. G. Hong, D. R. Palle, and M. S. Rodder, “Methods for varied strain on nano-scale field effect transistor devices,” U.S. Patent 9 978 833 B2, May 22, 2018. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US9978833B2/en [24] S. Gandikota et al., “Method of reducing metal gate resistance for next generation NMOS device application,” Int. Patent Appl. WO 2024/137272 A1, Jun. 27, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/WO2024137272A1/en [25] J. Zhang et al., “Full bottom dielectric isolation to enable stacked nanosheet transistor for low power and high performance applications,” in Proc. IEEE Int. Electron Devices Meeting (IEDM), Dec. 2019, pp. 11.6.1–11.6.4, doi: 10.1109/iedm19573.2019.8993490. [26] C. Yoo, J. Chang, Y. Seon, H. Kim, and J. Jeon, “Analysis of self-heating effects in multi-nanosheet FET considering bottom isolation and package options,” IEEE Trans. Electron Devices, vol. 69, no. 3, pp. 1524–1531, Mar. 2022, doi: 10.1109/ted.2022.3141327. [27] S. S. Pradhan, D. B. Bergstrom, J.-S. Chun, and J. Chiu, “Tungsten gates for non-planar transistors,” European Patent Appl. EP 3 506 367 A1, Jul. 3, 2019. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/EP3506367A1/en [28] L. Schloss and X. Ba, “Tungsten films having low fluorine content,” U.S. Patent 9 754 824 B2, Sep. 5, 2017. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US9754824B2/en [29] Intel Foundry, “Accelerating AI and HPC with advanced process and packaging technologies,” Doc. 367370-001US, Jun. 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/dam/www/central-libraries/us/en/documents/2025-11/intel-foundry-hpc-ai-brief.pdf [30] M. Lofrano, X. Chang, H. Oprins, and Z. Tokei, “Mitigating the thermal bottleneck in advanced interconnects,” imec, Sep. 28, 2023. Accessed: Sep. 14, 2026. [Online]. Available: https://www.imec-int.com/en/articles/mitigating-thermal-bottleneck-advanced-interconnects [31] S. Bair, “Intel at ISSCC 2025: Navid Shahriari invited talk, eight papers, forums, panelist & product details,” Intel Community, Feb. 19, 2025. Accessed: Sep. 14, 2026. [Online]. Available: https://community.intel.com/t5/Blogs/Tech-Innovation/Edge-5G/Intel-at-ISSCC-2025-Navid-Shahriari-Invited-Talk-Eight-Papers/post/1667592 [32] D. Chandra, E. Potladhurthi, D. R. S. Reddy, and K. S. Rengarajan, “Tunable negative bitline write assist and boost attenuation circuit,” U.S. Patent Appl. 20160203857 A1, Jul. 14, 2016. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20160203857A1/en [33] Synopsys, “Advantages of firmware-based training in high-speed DDR IP,” Synopsys IP Technical Bulletin. Accessed: Sep. 14, 2026. [Online]. Available: https://www.synopsys.com/articles/firmware-based-training-ddr-ip.html [34] N. Muralimanohar, R. Balasubramonian, and N. P. Jouppi, “CACTI 6.0: A tool to understand large caches,” Hewlett-Packard Laboratories, 2009. Accessed: Sep. 14, 2026. [Online]. Available: https://users.cs.utah.edu/~rajeev/cacti6/cacti6-tr.pdf [35] Intel, “Intel Tech Tour 2024 Lunar Lake AI hardware accelerators,” Doc. 824436, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://cdrdv2-public.intel.com/824436/2024_Intel_Tech%20Tour%20TW_Lunar%20Lake%20AI%20Hardware%20Accelerators.pdf [36] Y.-H. Chen, J. Emer, and V. Sze, “Eyeriss: A spatial architecture for energy-efficient dataflow for convolutional neural networks,” in Proc. 43rd ACM/IEEE Annu. Int. Symp. Comput. Archit. (ISCA), Jun. 2016, pp. 367–379, doi: 10.1109/isca.2016.40. [37] Intel, “Introduction to the Xe-HPG architecture,” Doc. 758306, Nov. 4, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/www/us/en/developer/articles/technical/introduction-to-the-xe-hpg-architecture.html [38] Intel, “Core Ultra processors Series 3 for the edge,” Doc. 855291. Accessed: Sep. 14, 2026. [Online]. Available: https://cdrdv2-public.intel.com/855291/Intel%C2%AE%20Core%E2%84%A2%20Ultra%20Processors%20Series%203%20for%20Edge%20Overview_2.pdf [39] Intel Foundry, “Foveros technology brief,” Doc. 366411-001US, Feb. 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/dam/www/central-libraries/us/en/documents/2025-07/foveros-25d-product-brief.pdf [40] D. Das Sharma, “UCIe: Building an open chiplet ecosystem,” UCIe Consortium, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://www.uciexpress.org/_files/ugd/0c1418_c5970a68ab214ffc97fab16d11581449.pdf [41] Intel, “Intel launches Intel Core Series 3 processors,” Intel Newsroom, Apr. 16, 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/www/us/en/newsroom/news/client-computing/intel-launches-intel-core-series-3-processors-changing-the-game-for-everyday-computing.html [42] Intel, “Core Series 3 launch press deck,” Apr. 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://download.intel.com/newsroom/2026/Intel-Core-Series-3/Intel-Core-Series-3-Launch-Press-Deck.pdf [43] Intel, “Intel outlines architectures for agentic AI at Hot Chips 2026,” Intel Newsroom, Aug. 24, 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/www/us/en/newsroom/news/client-computing/intel-outlines-architectures-for-agentic-ai-at-hot-chips-2026.html [44] Intel, “Intel accelerates process and packaging innovations,” Intel Investor Relations, Jul. 26, 2021. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intc.com/filings-reports/all-sec-filings/content/0001193125-21-224438/d199788dex991.htm [45] Intel, “Intel reports third-quarter 2021 financial results,” Intel Investor Relations, Oct. 21, 2021. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intc.com/news-events/press-releases/detail/1505/intel-reports-third-quarter-2021-financial-results [46] Intel, “3rd generation Intel Core processors bring exciting new experiences and fun to the PC,” Intel Investor Relations, Apr. 23, 2012. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intc.com/news-events/press-releases/detail/577/3rd-generation-intel-core-processors-bring-exciting
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The Big Holes in Wearable Heart Rate Variability And Readiness Scores
On September 9th, Apple announced it was revamping its Apple Watch Health Sensing System, rolling out a Readiness score (0 to 10), and increasing the frequency of heart rate variability (HRV) outputs 24-fold. This can be viewed as upping its competition with various other consumer wearable sensors. These “readiness scores” as a composite of multiple metrics, with heart rate variability (HRV) being front and center for most. The majority of Americans are now using wearable sensors, which equates to well over 100 million adults. HRV and Readiness scores are increasingly being marketed as a measurement of autonomic nervous system health, a digital marker for future disease, a clock for biological age, and a holistic metric to promote healthspan and even longevity. (Apple also introduced a new longevity tab and “Health Age”.) None of this has been proven. In this edition of Ground Truths I am going to review what we know about heart rate variability and readiness scores. Heart Rate Variability HRV is the variation in normal heart cycle timing. The variability of the heart rate, the barely perceptible millisecond changes in time between consecutive heart beats (see R-R intervals in the Figure below, left panel), is due to interplay between the sympathetic and parasympathetic (vagal nerve) inputs. Distinct from heart rate, individuals with the same heart rate can have very different HRVs. It is a rough reflection of the autonomic nervous system (ANS) activity, inadequate to say whether a person’s ANS function is abnormal. For more than three decades, heart rate variability (HRV) has been measured and several studies have found an association of low HRV and clinical outcomes, particularly a link with higher all-cause and cardiovascular mortality. There have also been less well established links of low HRV to risk of early cognitive impairment, dementia, mental illness, Type 2 diabetes and substance abuse. An important reminder is that HRV is a surrogate marker without any established cause-and-effect relationship. If you increase your HRV, that doesn’t mean it will improve health outcomes. In fact, there is no hard evidence for that. All that work linking to health outcomes was done with electrocardiogram (ECG) derived HRV. Now, in the era of consumer wearables, this is getting assessed differently, by optical pulse (yes, the lights you see) plethysmography (PPG) or what is called pulse rate variability (PRV). They are not the same, as shown below (right panel) and only concordant when the delay between the ECG and pulse is kept constant, which basically means at rest. I should mention there’s also what I will call MPV, a mattress mechanical movement sensor, a derived heart rate variability, that companies like Eight Sleep use, even further away from directly measuring HRV. HRV has not one uniform measurement but many different types of quantification, such as RMSSD, the magnitude of difference between successive R-R intervals of normal sinus beats (N-N) or SDNN, the standard deviation of NN intervals, both in milliseconds. SDNN is one of the so-called frequency domain HRVs (others are LF, HF, LF/HF). Different wearable sensors use different metics; Apple has relied on SDNN and nearly all of the others use RMSSD, which is generally considered the more accurate metric. There’s also the different length of time measured, such as for a matter of minutes, all day, or an overnight’s sleep. Short measurements are especially problematic since they don’t capture enough of respiratory modulation and other factors that influence HRV. Share Ground Truths How well does HRV correlate with PRV? There are very limited studies, especially independently done. One that is commonly cited was conducted by Air Force researchers in only 13 healthy adults assessing Oura ring 3 and 4, Whoop 4.0, and Garmin Fenix 6 and showed a correlation coefficient of 0.88 to 0.97 and a mean absolute percentage error from 6 to 10%. The correlation is not a perfect 1.0, but there’s at least a fairly high level of correlation. HRV is supposed to increase during the night due to takeover of the parasympathetic nervous system, and higher during deep sleep. A recent example of my 1 week, all day “HRV,” and one during sleep is shown below. As you can see, the N of 1 data are inconsistent for the same days from different sensors (Oura, AppleWatch, Fitbit Air, and Eight Sleep) by patterns, absolute numbers, and comparison with prior days and weeks. The largest study in over 8 million Fitbit users (the old version, not Google Fitbit Air, introduced in May 2026) gives you a sense of the effect of age, sex, and the 2 different main HRV (here PRV) metrics, with RMSSD on the left and SDRR (=SDNN) on the right below. That study, from data collected in 2018, is a major outlier, since all the more recent ones are tiny with respect to sample size. Many of the companies have not had independent evaluation of their HRV, such as Eight Sleep, but have published a low standard error on their website. There are some other published studies on the correlation between HRV and PRV, but they are all small and only in healthy adults. A scoping review emphasized the lack of study in underrepresented individuals, including the aged, people of color (which affects the PPG signal), and individuals who are underweight or obese. Add the typical adult age 60 plus with one or more chronic diseases. For example, one study in over 900 adults found poor correlation of HRV and PRV, non-uniformly underestimated across many chronic diseases (cardiovascular, endocrine, neurological, respiratory, and others), concluding PRV is “an invalid surrogate for HRV.” A recent systematic review of 43 studies comparing HRV and PRV found reasonable pooled absolute standardized error (HRV as gold standard) but only 10 of the studies provided quantitative synthesis in ideal conditions. Their main conclusion was similarly cautious: “PPG-derived HRV [PRV] should not be regarded as universally interchangeable with ECG-derived HRV across all devices, populations, and recording contexts.” Factors Affecting HRV and PRV That gets me to the long list of factors that affect HRV (and PRV) besides the device, the type of measurement (RMSSD, SDNN or others), the person’s signal, the sensor site, the duration of data capture, if weighting by sleep stage is used, how artifact is processed and corrected. And this list is not complete!: Oura puts out data from their community of users (who input data) on what affects their overnight HRV. The factors currently provided are: no alcohol (increase 8%), melatonin (increase 2%, float tank (increase 2%), wine (decrease 4%), and party (decrease 14%) in overnight HRV. Must be some big parties! Subscribe What is a PRV measurement good for? It has been falsely characterized as an index of “autonomic balance” and a specific indicator of stress. A 2018 review of the studies available for HRV and its relationship to stress, not using any of the current wearables, found that stress can lower HRV. But so can many other factors. The non-specificity of the signal, indexed to the table above, is striking. Evidence from a UK Biobank study of over 46,000 participants with actual HRV looked at genetically predicted HRV, a genetic risk score, that failed to show the expected HRV-mortality link, indicating that _HRV is likely not causa_l, but rather a reflection of person’s physiologic state. A review of consumer wearable HRV data from 5 longitudinal studies showed that nighttime PRV was not associated with perceived stress, and surprisingly higher HRV, in the largest cohort (N=717 participants), was correlated with higher stress. An Oura ring cohort of 525 first-year college students found a link between overnight PRV and perceived stress, but that was also seen with resting heart rate, sleep, and respiratory rate. Several very small studies have examined the relationship of HRV and athletic injuries or guiding training with mixed, and predominantly negative results. HRV biofeedback training with paced breathing had no significant effect on reducing stress or raising HRV, as demonstrated with sham controlled trials. When HRV for multiple days showed a decline in conjunction with body temperature, the Oura ring published data for prediction of Covid. The WHOOP company sponsored an observational study, published in 2026, of 30,000 users for 72 weeks, without a control group, that reported reduced alcohol intake (5.8 % points) by self-report. That doesn’t tell us much, and particularly about the merits of HRV for behavioral change. If you use the same device and conditions as longitudinal trends for multiple (at least 2-3) weeks that may be the one way to get something useful from the measurements. Data for overnight sleep with minimal motion and using RMSSD is the best proxy for real HRV. The reason to look at trends rather than any given night is that it more likely represents something, even though you won’t know with certainty what the “it” is. Keep in mind there are no data, no peer-reviewed evidence, to show that HRV fluctuation in-person has any correlation with health outcomes. Share Readiness Scores These are proprietary scores that integrate different metrics for each of the wearables: no algorithms have been disclosed. They are unvalidated against health outcomes. In a review of 14 composite health scores of readiness and recovery, HRV contributed 86% to the scores, followed by reading heart rate (79%), physical activity and sleep duration (both at 71%). That review noted the substantial variability in measurement protools and lack of standardization. Sleep staging is notoriously inconsistent and inaccurate by these sensors, which adds further to the HRV uncertainties for what the scores, which use sleep stage data, mean. Only resting heart rate has been shown consistently across devices to be extremely accurate. I’ve made a Table to summarize what we know about which metrics are included, the scores, any peer-reviewed studies that compared the readiness score with health outcomes, and the corresponding (if any, NA-not available) citation. You will note that some companies do not use the term “readiness," such as WHOOP for recovery, and Garmin, which has 2 different scores, one of which is Body Battery. Eight Sleep uses the term “Fitness Score.” They all include HRV; Apple includes a new metric they call “Recovery HRV” which among other components uses 7-days of sleep, but it is unclear what this means or how it is differentiated from other scores (there are clearly no data for outcomes). We have no knowledge of how the different components are weighted or whether any of these scores are better than resting heart rate, HRV alone, physical activity, or any other single metric. Since none of these are standardized, they are not interchangeable, so if you get a 90 for Oura that has no relationship to a 90 on a Google Fitbit Air. Notably, the company can update its algorithm for readiness score at any point without notification to device users. Without any useful evidence of actionability for these scores or established relationship with health outcomes, it is hard to make a case for their value. At the Apple recent announcement they showed their Readiness score (0-10) on the watch (Figure below) but there are no published data on this score, not even on their website. It’s available only on their new Watch Series 12 or Ultra 4 [of course, ;-)]. That exemplifies the problems with these scores, lack of data and evidence for being meaningful to promote health. Perhaps the best study (which isn’t saying much) is the WHOOP Recovery for golfer performance, because it did correlate with an objective outcome, even though there was no control group and the authors were all from the company. Among the 389 pro golfers, an absolute 10-per cent point increase in Recovery score was associated with about 0.5 fewer strokes per round. But that’s hardly a health outcome! WHOOP is also conducting a study in over 2,700 runners to see if their recovery score will be linked to less injuries and improved performance, but that is not yet published and has no control group or randomization. Putting This in Context For two decades I’ve been enthusiastic about the potential for digital health and particularly wearable biosensors. Over the years, we’ve seen some great progress for their ability to promote physical activity and accurately detect atrial fibrillation (the first FDA cleared deep learning AI for consumers). That work was the subject of rigorous research. But there are holes in the data and evidence for other metrics. One notable one is the “VO2 max” story that I wrote about earlier this year. At that time many subscribers asked me to cover heart rate variability, which I finally got to here. When I dived into the research and publication for HRV and readiness scores, I expected to find at least some that were of high quality and demonstrated their utility by linkage to health outcomes. To my surprise, I found none. The wearable sensor measurements for HRV (PRV) are, for the most part, accurate, but that validation work has only been done in small studies of healthy adults and does not take into account the long list of factors, from the device, software side, and the user side, that affect HRV measurements. Moreover, this metric chiefly relies on optical sensing and, as we have learned for heart rate PPG sensing, may be less accurate in people of color. Keep in mind that all of the health outcome association evidence comes from ECG-derived HRV; none are from wearable sensor data. I will repeat the key point: there's no peer-reviewed evidence to show that in-person HRV fluctuation—or efforts to raise your HRV— has any correlation with health outcomes. For those of you who look at your HRV on awakening, or even 2+ week trends of it being low, I hope this context helps to relieve any anxiety. Yes, low HRV (not PRV) has been shown to increase risk of some diseases as summarized above. But efforts to raise your HRV—a surrogate metric— has not been established for improving any health outcomes. HRV does not have any evidence of causality (the genetic evidence actually goes against this possibility). In this summary, I have not included data for other wearable sensors such as Polar, Samsung, Withings, Suunto, Amazfit, Coros, Ultrahuman, or additional mattress sensors. These are beyond my first-hand experience, and as far as I know from my in-depth review none have any peer-reviewed published data that differ from the 6 sensors I’ve reviewed here. From the points I’ve gone over above, we’re not ready for readiness scores. Besides being proprietary, they are predominantly based on metrics that have their own issues. It’s compounding the problem, like building a house without a solid foundation that has never undergone a rigorous inspection, and then selling it. Like I mentioned for PRV, you can look at trends over weeks rather than any single day, to get a handle, but even that may not be helpful. There’s simply no evidence that these scores meaningfully relate to health outcomes. I’d emphasize they might, but that requires doing prospective or randomized studies to prove it. None exist. There’s great promise for HRV/PRV utility_. For example**,**_ Prof Maiken Nedergaard, who discovered the brain glymphatics that are essential in eliminating metabolic waste products from the brain during sleep, has posited that HRV could be a non-invasive marker for neuromodulator oscillations, brain-body regulatory circuits, and brain clearance. That would be extremely useful, but like everything else on HRV and readiness scores it requires solid research and validation. The lay media isn’t helping much to get the story straight. Earlier this year The Economist published a piece entitled “The most useful indicator of your overall health” which ordained HRV as an “accumulated stress score.” That’s akin to the false assertion about VO2max: “V02 max is the singular most powerful marker for longevity.” As I’ve summarized here, that is not established. The fact is that so many things can lower HRV, including physical exercise (especially an intense workout), reduced sleep quality, stress, the list above, no less the device, signal, and software. Whatever fluctuations observed have not been correlated with any health outcome. Sadly, “datamaxxers” are widely using HRV and readiness scores that have never been validated to mean anything. We already know that for some people using the sensors for sleep metrics, it can induce “orthosomnia,” an obsession to get high sleep quality, with associated high levels of anxiety. In an experiment done by a company to promote sleep quality for its employees, “For those employees who did use the trackers, many reported feeling perfectly rested until their tracker told them they had had a terrible night. Others were told that they had slept like a baby when they had actually been lying awake worrying about the quality of their sleep. “ The same problem can result from preoccupation with HRV or readiness scores, with anxiety that would lead to further reduction in both. It you are using a wearable like >100 million American adults, it’s OK to look at these data, but contextualized with the major caveats reviewed here. If you are one to require evidence that HRV or readiness scores are linked to health outcomes, you may not even want to look. The companies make it hard to turn them off! Let me end with the companies that make and sell wearables. Apple’s doubling down on HRV (24-fold more reporting and heart rate very 5 seconds) and introduction of a Readiness score tells us that consumers have bought into these metrics and they are joining the club. However, all of this is occurring with a backdrop of tens millions of users, claims about the data that are not backed up by adequate evidence, marketing way out in front of whatever limited data exists, and not being transparent about their readiness score algorithms. The companies can well afford to do the research that is needed to connect these metrics with health outcomes show, once and for all, that increasing HRV or using readiness scores promotes our health. If they believed and invested in the products they are selling, we’d not be in this position of not knowing. That’s essentially where we are with HRV and readiness scores. Perhaps someday this will change and we’ll have good reason to embrace them. NB: I wrote this post. No AI. I have no conflicts of interest with any of its content. Loading... Ground Truths has 215,000 subscribers from every US state and 214 countries. There are over 300,000 followers of Ground Truths so more than 90,000 folks who can easily convert to be free subscribers. Your subscription to these free essays and podcasts makes my work in putting them together worthwhile. If you’re not a subscriber, please join! If you found this interesting PLEASE share it! Share Ground Truths The proceeds from all voluntary paid subscriptions go to support our summer internship program. It enabled us to accept and support a record number of 62 summer interns that joined us in 2026! These are high school, college and medical students selected from thousands of applicants. We couldn’t do this expanded program without the funds coming in through Ground Truths. Thank you!
Engrams Embedding Entendre: Codesign for Efficient DRAM/SSD Offloading
Engram extends standard token embeddings with learned multi-token lookups. Recurring local patterns retrieve vectors directly, reducing the need to reconstruct them through attention and feed-forward layers. With Engram model architecture optimization, it allows for lower HBM capacity to be needed for models at the same quality. This does not mean there won’t be an insane demand for HBM but it just means that model architecture will continue to innovate around constraints. This model architecture design is naturally codesigned for parameter offloading: each token accesses a few embedding rows whose addresses depend on token IDs, not hidden states. The runtime can prefetch those rows from host DRAM while earlier layers compute, keeping the table outside HBM without transferring entire weight matrices. Our Memory model contains our latest estimates of quarter by quarter HBM, DRAM, & NAND supply and demand. Offloading frees HBM for model weights and KV cache, potentially supporting larger batches or more concurrent sessions. When DRAM becomes the next constraint, NVMe offers another tier. Recommendation systems already cache frequently or recently accessed embedding rows in faster memory while backing colder rows with SSDs. After NVIDIA roadmap had to change due to massively despec’ing Rubin Ultra from 1024GB to now ~200GB of HBM per chip, model architecture optimizations like emgram maybe helpful. Our DeepSeek-V4.1-Flash configuration uses roughly 189 GiB of memory for Engram. We replace it with a memory-mapped (mmap) file and measure serving performance with offload to SSD. Later on in our report, we will show our Engram offloading experiments along with the official InferenceX agentic inference serving results on Engram models like DeepSeekv4.1 Flash across all 6 NVIDIA GPU SKUs along with MI355X. Unsurprisingly, the CUDA Moat is still mogging MI355X on the ultra popular DeepSeekV4.1 Flash model. We also show how even on high capacity HBM SKUs, offloading emgrams to DRAM could result in even better performance for most of the pareto than keeping the emgram in HBM. Our benchmark has been widely reproduced, validated and/or supported by almost every major buyer of compute from Google Cloud to Microsoft Azure to Oracle, to Meta and many more. Furthermore, it has the support of the ML community including from vLLM, LMCache, SGLang, PyTorch, Huggingface and the support of major labs like OpenAI, MiniMax, ZAI, Qwen, Moonshot Kimi, etc. Star the InferenceX GitHub repository if you find the open-source benchmark and data useful!. InferenceX is the only inference benchmark in the world to have TPUv7, Jalapeño, Nvidia Rubin NVL72, AMD, and soon, SambaNova and Trainium. Due to how realistic AgentX scenario is to real world agentic inference workloads, AMD has committed to collaborating on MI455X UALoE72 too. DeepSeek did not release the original paper’s two trained Engram models. We replicated its setup on fineweb-edu using the released code and training hyperparameters, at an estimated 6E18 FLOPs per run. We observed the same U-shape scaling: Engram improved performance over pure MoE baselines. We also reproduced DeepSeek’s results, where earlier-layer representations with Engram resembled those of later layers. Like the original Engram paper, it is possible to probe Engram’s gate scores to see what n-grams DeepSeek-V4.1-Flash makes the most use of. Our gate scan finds names, code fragments, relational phrasing, and boilerplate. These examples prioritize interesting-ness over gate strength. One unexpected result was Wright : Ace Attorney. These examples suggest learned memory optimizes the training objective, not a judgment of which facts deserve storage. Licenses, bibliography fragments, API scaffolding, and website furniture can provide prediction shortcuts, so the value of additional Engram capacity may depend on what survives data preparation. This does not show that table capacity is “wasted”: the evaluation-corpus scan establishes neither training exposure nor the capacity occupied by each category. For offloading, strong gates do not identify cache-hot rows. Low gates do not automatically save reads either: computing the gate requires the retrieved key and undoes the performance gain of a fused kernel. Skipping reads would require a separate usefulness predictor before retrieval. In the original paper’s inference-time ablation, factual-knowledge benchmarks retained just 29–44% of their original performance, while reading comprehension retained 81–93%. This is due to the training–inference mismatch. The resulting degradation therefore measures this trained model’s dependence on Engram, not the performance difference between models trained with and without it. In our ablations, suppressing Engram worsens token likelihood across all evaluated domains, especially encyclopedia text and several code corpora. Surprisingly, GSM8K accuracy stays within measured run-to-run variation and removing Engram has no effect. Engram is not a detachable dictionary beside an unchanged MoE. Removing it changes downstream features and expert selection. We tested whether rerouting hurts or compensates by holding tokens fixed in a teacher-forced experiment on CRUXEval, a code-reasoning benchmark of small Python functions where the model predicts a function’s output from its code and an input, and scoring the reference answer. Removing Engram raised answer loss from 0.2848 to 0.3093 bits/token. Forcing the ablated model to use the original Engram-on expert choices made it worse still, at 0.3375 bits/token. Rerouting partially compensates for the missing memory. Memory features and expert selection work together, rather than following a clean “memory stores facts; experts reason” division. On the same CRUXeval, removing Engram during either phase reduced accuracy and increased generated tokens; removing it throughout produced the largest changes. Keeping Engram for prefill leads to more correct answers than keeping for decode likely due to semantically richer KV cache transferred to decode workers, allowing it to mitigate some of the performance loss. Engram’s table is large, but each lookup is small. DeepSeek-V4.1-Flash requests 24 rows at each of two Engram layers, about 12.4 KiB per processed token position across the model, or 3.1 KiB per GPU when split across four GPUs. Currently as of Day 7 since Model Release, MI355X is still 2-4x worse performance per dollar compared to B200 even when normalized by Mi355X’s lower TCO. Our full total cost of ownership breakdown comes from our AI Cloud TCO Model along with monthly market surveys of over 100+ gpu clouds & gpu cloud customers. On the Day 0 release of DeepSeekv4.1 Flash, NVIDIA vLLM works out of the box with zero issues across all 6 SKUs: H100, H200, B200, B300, GB200, GB300! This was thanks to the amazing work by the NVIDIA & Interact teams! In comparison, AMD vLLM did not work on day 0 for DeepSeekv4.1 Flash.Source: SemiAnalysis InferenceX AMD’s vLLM documentation points to using vllm/vllm-openai-rocm:deepseekv41-flash-0909, but from hour 0 of the model release to hour 23, AMD has not publicly released the image. AMD claims, “SPEED IS THE MOAT,” yet it has still not released it by the 23rd hour. We wish that, going forward, the AMD team has a better process for hour 0 model releases. Eventually when they did publicly release for “day 0” image support, performance-wise, it is currently up to 14.8x worse perf per dollar than H200 and up to 42x worse perf per dollar than B200/B300. The power of the CUDA MOAT is NVIDIA’s collaboration with its massive 6 million-developer community ecosystem including most of the vLLM & SGLang & Tokenspeed maintainers which means that CUDA is optimized on day 0. Overall, AMD did make significant improvements but the performance per dollar is still currently 2-4x worse than B200. AgentX Engram DRAM Offloading Improving Performance The HBM and DRAM offload use the same GPU kernel to select and dequantize rows. With HBM, it reads GPU memory; with Unified Virtual Addressing (UVA), it reads pinned host memory directly. Both support full decode graphs. Moving the table into HBM accelerates only the sparse lookup, leaving decoder computation and communication unchanged, resulting in little overall benefit while consuming memory otherwise available to KV cache. Another benefit of Engram offloaded to DRAM which means you can reduce the communication overhead by using less HBM GPUs per replica. For example, when enabling Engram offloading on B300, we are able to switch from TP4 to now TP2 which improves the pareto curve by up to 1.6x. When iso-model quality, less HBM is required as the engrams could be offloaded to host DRAM. Thus HBM bandwidth matters way more than HBM capacity. For inference workloads where memory bandwidth matters the most, 4-hi HBM provides the best $/bandwidth and therefore lowest cost per token. If China continues to make more and more revolutionary model architecture innovations, soon it could potentially 0Hi HBM stacks. [ ](https://newsletter.semianalysis.com/p/long-live-the-short-king-why-4-hi) [ Long Live the Short King: Why 4-hi HBM Wins ](https://newsletter.semianalysis.com/p/long-live-the-short-king-why-4-hi) Myron Xie, Bryan Shan, and 3 others · Sep 13 [ Read full story ](https://newsletter.semianalysis.com/p/long-live-the-short-king-why-4-hi) Moreover, on B300 and week-0 stack, moving the Engram table back to HBM did not improve results and stay within run-to-run variance. This is a result of the work optimizing DRAM offload, such as async, and overlap. SSD Offloading On B200, we created a unoptimized vLLM fork and stored the Engram tables in memory-mapped files on local SSDs. File backing lets the OS reclaim table pages when other applications need RAM. Pages already cached in memory can be served without reading the SSD again. Furthermore, note that we were unable to turn on GDS The unoptimized SSD implementation changes how rows reach the GPU. It copies row IDs to the CPU, deduplicates them, gathers the requested rows into pinned buffers, copies those rows back to the GPU and dequantizes them. This work runs between segments of the GPU execution graph. Native UVA performs row selection and dequantization directly on the GPU, avoiding the CPU round trip. A warm filesystem cache removes physical SSD reads, but leaves the coordination, row gathering and transfers. This is why a file already cached in RAM can still perform worse than a pinned DRAM table. The comparison measures the whole serving path; it does not separate the time spent on each of these operations. B200 DRAM dominates both measured SSD serving curves in total tokens per dollar and P90 interactivity. Near 125 tokens/s/user, DRAM delivers 121 million total tokens per dollar versus 52 million for SSD. For production serving, SSD offloading is likely not worth the tradeoff. On the B200 configurations we measured, SSD offloading loses on both measures: every observed SSD point has a DRAM alternative that delivers higher P90 interactivity and more total tokens per dollar. The only points where Cheaper storage does not automatically produce a cheaper inference service. Moving Engram to SSD leaves the same four expensive GPUs and the rest of the server in place. Reclaiming RAM only creates an economic benefit if it enables a cheaper server configuration or additional useful capacity. The current unoptimized path provides neither benefit, and the filesystem cache still consumes RAM when table pages are resident. Next we will look at the mechanisms and specific implementation of ngrams from DeepSeekv4.1 Flash, LongCat, Qwen3.8 Flash Next.
Health-ISAC sets nine-domain MedTech cybersecurity baseline to guide medical device procurement, deployment
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Microsoft shares workaround for Windows domain login issues
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Windows 11 KB5124008 update breaks domain trust for some users
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Exchange Online outage causes email delays, 'Server busy' errors
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August Monthly Review: ChatGPT In Epic
Death, taxes, another frontier lab healthcare launch inspiring truly insane LinkedIn takes. As much as I want to stay away, I repeatedly am the crewman unplugging his ears whenever we pass these sirens. So it’s not the first and probably not the last time we dial up the typewriter rather than tie ourselves to the mast. The full blow-by-blow timeline: Health API Guy is a reader-supported publication. To receive new posts and support my work, consider becoming a free or paid subscriber. Subscribe The End of the Standalone PHR (Jan 8): ChatGPT Health arrives for consumers, at the time powered by b.well. I was bullish on the approach in that the best way for the PHR to finally solve distribution was to meet consumers were they already are (i.e. When Horizontal Meets Healthcare (Jan 9): OpenAI for Healthcare puts out the shingle for enterprises, with SharePoint ingestion standing in for the EHR integration the product actually needed. Another One: Anthropic’s Healthcare Debut (Jan 16): Claude's version, on HealthEx rails instead of b.well, with Agent Skills for FHIR development as the one true vertical-specific investment. ChatGPT for Clinicians: The Trap Sprung (Apr 24): OpenAI filled in the missing GTM middle with a free product for verified clinicians, effectively peeling the enterprise wrapper off ChatGPT for Healthcare and taking the PLG fight directly to OpenEvidence. OpenAI’s Second Attempt at Health (Jul 31): a relaunch of their patient specific app, now branded Health in ChatGPT, where the privacy partition came out, the connectors thinned, and b.well disappeared in favor of first-party FHIR work against a smaller network Beyond a Shingle So what was announced now? Today, we’re introducing a new electronic health record integration that brings authorized patient context from Epic into ChatGPT for Healthcare, along with the Healthcare Public Data plugin for direct, structured access to official healthcare datasets like PubMed, DailyMed, and CMS Coverage. Together, these capabilities bring ChatGPT closer to the systems and sources healthcare teams trust, while supporting the controls and compliance healthcare work requires. The core portfolio is unchanged from prior announcements we delineated and discussed (aside from the relaunch of patient-facing). Since trade publications still seem to be confusing them by using the wrong names: Enterprise sales motion: ChatGPT for Healthcare Protecting their core product / PLG: ChatGPT for Clinicians Consumer/patient-facing product: Health in ChatGPT So really, this is a feature release (specifically for ChatGPT for Healthcare when it comes to EHR integration). What’s cool about it, though, is that we are moving beyond just putting out a shingle. Everything in the January enterprise launch was horizontalizable: Horizontal tech companies thus generally start verticalization with their “putting out a shingle phase”. Telling the world you’re open for business as a horizontal tech company reliably attracts early inbound interest from buyers who are already trying to force-fit horizontal tools into domain-specific workflows and are eager for any signal that the vendor intends to support their use case more directly. Nothing was really vertical specific, which is exactly what you'd expect from the ultimate hypergrowth horizontal company dipping their toes into specific industries. But eventually you have to stop changing the sign on the door and start changing the product. Can you guess where the horizontal product was going to run out of road? This is the core dilemma writ large: verticalization requires differentiation, while scale economics of consumer and horizontal push toward unification. I’ve buried the lede so deep here it will be painful to some readers, but what should be shocking to no one is that my perspective is that EHR integration is the only path that meaningfully resolves this tension for ChatGPT for Healthcare. Integration with Microsoft Sharepoint is fine, but it is categorically insufficient for any product that hopes to influence clinical decision-making. SMART Money Well here we are, eight months later! Real vertical investment has begun, which surprised a few people. One friend in the industry messaged me: “Absolutely no way Epic gave ChatGPT API access.” Looking forensically at the announcements, the integration is notably read-only across appointment notes, laboratory results, medications, and specialist documentation. So while I’m not a betting man, I'd wager the house this is a SMART on FHIR launch: That sounds a lot like USCDI! The recommended path for the workflow they outline would be SMART on FHIR Their Health AI lead’s post is evocative of both standalone and EHR launch SMART, which another termed “ChartGPT” and “EHR Plugin” The implementation burden for SMART on FHIR is the lowest of the available integrative paths This is the team who literally did patient-facing SMART on FHIR with Epic last month Most importantly, if you’re a horizontal company, you generally still haven’t taken the full plunge and thus (overly) value reusability. SMART on FHIR is the logical compromise: healthcare-specific enough to matter, but standardized enough to reuse. Nobody Asked Judy Another friend asked “I thought they had to go to each health system, or did they go direct to Epic and now health systems opt in?” Given the trust paradigms in healthcare, this functionally cannot be Epic hoovering up all the data for OpenAI and shoving ChatGPT in their customers’ faces (or they would revolt). However, I do believe the aforementioned terrible coverage by TechCrunch and other outlets is probably responsible for that question, given the 325 million reference. When using FHIR as a business associate to an Epic customer, there is no EHR gatekeeping to speak of, as that isn’t how fhir.epic.com works: You register an app You pick your APIs You test against the sandbox APIs You list as “Ready for Production” Hospitals pick your app You test and go live with them Bluntly, nobody had to say yes or no in Verona (nor were they given the chance). Vendor Services (their next developer tier up that I doubt OpenAI is using quite yet in this initial release) certainly has contractual paperwork that some resent, but even there, the twin pressures of mounting antitrust and information blocking make outright gatekeeping increasingly fraught. My friend’s sentiment is, to me, representative of a broader industry neurosis, perhaps a sort of scar tissue of prior eras: people assume the gate is still there and never actually try the door. There are certainly other ways Epic (and any EHR) can put its thumb on the scale, but they are not so dumb as to stand in front of a federally mandated API and play bouncer at this exact moment in time. So I think they can and probably should go deeper, as this release is at best parity and at worst behind vertical-specific competition. OpenEvidence did a basic SMART launch with Sutter Health in February, allowing for more convenient evidence search by providers. They then add patient-context (the equivalent SMART on FHIR flow to what we see here) when Cedars-Sinai went enterprise-wide in May. UpToDate has four distinct applications across deeper workflows like patient engagement listed in Epic Showroom and announced a partnership with Epic to power Art at UGM Abridge and other ambient scribes have invested deeply into the deepest bidirectional clinical copilot workflow with integrations well beyond SMART on FHIR. In that light, the “Who is OpenAI primarily targeting here?” is clear. This release brings them into striking distance of OpenEvidence, but not the others quite yet. They are the only one of the three you can reach without building something truly Epic-specific. When will they go further? Competition is a great motivator to overcome the horizontal demons and start building things that can’t be reused: not across industries, not across EHRs, maybe not past the customer you built them for. That’s the price of actually verticalizing. The question is if and when OpenAI will be willing to pay it. Month in Review Here is the monthly review. As a reminder, this is a regular round-up of the month’s posts and other content to surface things you may have missed across regulation, litigation, interoperability, and beyond. AI assistance is used in these bullet summaries so I can focus on articles. Articles Published: None this month Video Content: The Information Exchange: Standards-based Thruple Edition (Aug 14): Back to school for us too, with Brad reporting in from the CMS Health Tech Ecosystem’s one year anniversary in DC. We get into the January CMS-0057 deadline, the fall rulemaking reading list, and why enrollment still keeps most apps off FHIR. The Information Exchange: Epic Dúnadan Edition (Aug 25): A UGM roundup with Ryan Brickner joining for the first time to check our takes against what the building actually thinks. Rangers, Ergo sitting on top of EHI, and a down-market lineup that needs some cuts. Regulatory: Stacked Deck, Bad Hand (Aug 05): ONC’s website refresh took the entire HIT Policy Committee record with it, so I rebuilt the archive and went looking for the regulatory capture story everyone assumes is buried in there. Stacking the deck and winning the hand turn out to be very different things. The Sixth Generation of Patient Access (Aug 19): A quick catalog of the five generations of patient access we’ve layered on since HIPAA, and the two candidates now competing to be the sixth. One is planned. The other is the market routing around the plan entirely. Court cases: Three Cases Walk Into a Docket (Aug 06): Two surprise settlements cleared the board in a single week, and then Judge Maddox dropped ninety-four pages on Vyne v. Henry Schein. The sleeper is a DMCA holding that makes direct-to-database a considerably riskier business model. Epic v. Health Gorilla: Into the MDL (Aug 10): Nine class actions are headed to Miami, and the Panel signaled it wants to bring the case that spawned them along too. That would leave Epic arguing the requests were obviously fraudulent in one courtroom and unknowable in the other. Amazon v. Perplexity: Agents Are Legalized! (Aug 11): The Ninth Circuit vacated the injunction against Comet, holding that the user is the one accessing the servers rather than the company that built the agent. A real win for agentic access, and a much narrower one than the headline suggests. Veeva v. Epic: Come At Me, Bro (Aug 26): Epic’s response brief wants the dismissal affirmed and, unusually, wants the opinion published as precedent. Buried in it is Epic’s own description of what its non-competes actually prohibit, which current and former employees should read closely. EHRs: The Contract Epic Would Never Sign Today (Aug 04): A 1999 SEC exhibit catches Epic licensing nearly its entire product line, Tapestry included, to the company that became TriZetto. The marketing services menu attached to it is the part that will make you blink. Forecast from Verona (Aug 07): The Epic Almanac makes one argument six different ways: the AI is only as good as the networks behind it. Emmie headlines, Art’s context stack is the most ambitious part, and Penny finally gets an autonomous coding date on the calendar. Works With Epic MyChart (Aug 17): Epic’s first new Showroom category since the death of Workshop certifies hardware instead of software, badge on the box and all. Made for iPhone, but for blood pressure cuffs, and rough news for anyone selling the RPM stack sitting in between. UGM Hot Takes 2026 (Aug 20): Everyone else covered the AI announcements, so I went after Savvy deleting the payment gateway, Rangers as Boost with the timer removed, and a down-market lineup with too many entries. Plus the Health Grid tidbits I cannot help myself on. MyChart Central Grows Up (Aug 24): Device data and Emmie turn Epic’s identity hub into a full consumer platform, which is both a logical answer to ChatGPT and a bit of a mistake. It also happens to be the best scraping target Epic has ever shipped. Industry Analysis: The Wrong Yardstick (Aug 12): Vertical software keeps getting judged against Superhuman and Notion, which is the wrong bar entirely. Your user is comparing your product to a whiteboard and forty phone calls before lunch. Primitives vs. Abstractions (Aug 27): Developers want building blocks, systems of record prefer to hand out business logic, and both sides have a real case. There’s no test from the outside that separates the engineering reason from the competitive one, which is why this keeps ending up in court. Cross-industry Comparisons: The Two Kinds of Platform Power (Aug 18): Attention power and record power are different problems that keep getting handed the same regulatory toolkit. Congress’s latest swing at Big Tech shows both what’s possible and where it falls apart. The Dogs of (Platform) War (Aug 21): A CourtListener alert turned up a property management fight with healthcare’s exact shape and none of the Cures Act. Shell prospects, ghost accounts, a notetaker bot that came back to haunt someone, and a lawyer arguing both sides of the same theory in two states. Fractals All the Way Down (Aug 31): Yardi dominates property management right up until you zoom into one segment, where AppFolio owns it outright and Yardi doesn’t appear at all. Where you draw the line around a B2B software market is about to decide an awful lot of cases. Other News: If Judy Had the Courage (Aug 13): A short eulogy for the era when software was allowed to look insane: WinAMP, bold colors, and everything the grey chatbot era has taken from us. External Media: Portland Monthly Health Tech Meetup: Erin O’Brien channeled my own feelings - maybe it’s just because it’s August and beautiful, but the monthly edition of the PDX Health community meetup was a ripper. Make sure to reach out if interested to join for the next one. STAT’s Coverage of Epic This Month: Brittany Trang of STAT did a fantastic job of breaking the FTC investigation that’s been lurking, as well as UGM related coverage, so I had to give her her wish of a meme. Fall Conferences: I’m pumped to be kicking off my fall conference season in NYC at Nabla Accelerate next month, which Chrissy provided the link to apply for. Here’s the rest of my schedule in case you want to meet up: Commonwell (Redwood Shores, CA): Oct 13-14 Open@Epic (Madison, WI): Oct 21-22 eHealthExchange (Austin, TX): Oct 27 Sequoia Project (Austin, TX): Oct 28-29 HLTH (Vegas): Nov 15-18 RSNA (Chicago): Nov 29-Dec 3 Posts I Liked: HTI-6 Should Unbundle API Certification: Josh Mandel makes the case that HTI-6 should split (g)(10) into separate authorization and data certifications, so a PACS or a genomics platform can certify only the role it actually performs. Imaging is the urgent example, but the structure solves a much bigger problem. On implementing ePrior Auth with Epic: Scott Rossignol’s field notes from a live ePrior Auth build on Epic, including the two app registrations nobody warns you about and the CPT mapping problem waiting at the end. CMS-0057 implementations are going to be such a beast. Healthcare point solutions are starting to look a lot like streaming services: Spencer Dorn runs the cable-to-streaming arc against health IT and lands squarely on the bundling half of the cycle. Bundling can be good! It can also be bad! Life is nuanced. Health API Guy is a reader-supported publication. To receive new posts and support my work, consider becoming a free or paid subscriber. Subscribe
New data infrastructure award to help scientific communities build domain-specific platforms for collaborative data science and AI
UC Irvine’s Chen Li to help lead NSF-funded national effort
Android 17 boosts network security by hiding domain names, lets carriers disable 2G
Google is out with a blog post today recapping new network security measures in Android 17. These four features...
Victor considering use of eminent domain to claim land from Eastview Mall
The town board passed a resolution Monday night to schedule a public hearing on the topic.
IT leader with a passion for transformation
Pascal Tran Binh joined Amer Sports in January 2026 to lead our Business Platform IT domain. This covers all go-to-market activities, including omnichannel, B2B and B2C engagement and experience…
The 'cofounder prenup': Startup founders share what to agree on early
Three startup teams share what cofounders should agree on early, from equity split and domain ownership, to conflict resolution and exit scenarios.
Asia-Pacific parliamentarians urge bolder action for universal health coverage, climate resilience and responsible AI
Parliamentarians representing 16 countries from across the Asia-Pacific region concluded the Ninth Meeting of the Asia-Pacific Parliamentarian Forum on Global Health (APPFGH) today, reaffirming their key role in advancing universal health coverage (UHC) amid the risks and opportunities posed by AI and climate change. In adopting the Phnom Penh Communiqué, parliamentarians urged fellow legislators regionwide to strengthen sustainable financing for UHC to widen access to health for all, including the most vulnerable populations; promote responsible governance of AI amid ethical concerns over this fast-evolving technology; and build climate-resilient health systems to anticipate and respond to mounting pressures ranging from rising sea levels in coastal areas to air pollution and other environmental degradation.The National Assembly of Cambodia, with support from Cambodia’s Ministry of Health and the World Health Organization (WHO), hosted the Forum in Phnom Penh from 11 to 13 August 2026 – the first time the Forum has convened in a Mekong country.Parliamentarians urge action to close gaps in accessIn the Communiqué, parliamentarians recognized that at-risk and marginalized groups are the ones most severely affected by gaps in access to health services. These groups include people living in poverty, women and children, persons with disabilities, older people, migrants, refugees, and those in rural, remote or island communities. The Communiqué urges fellow parliamentarians and policy-makers to advocate for laws and policies that support sustainable financing to protect people from financial hardship, with a focus on primary health care, prevention and equity. "The Communiqué is a call to action. It sets out ambitious, concrete measures that deliver meaningful impact on the ground. We are all accountable for advancing universal health coverage and translating our commitments into tangible results. Cambodia is fully committed to advancing UHC, including the promotion of ‘healthy people, prosperous country’ campaign,” said Samdech Maha Rathsapheathika Thipadei Khuon Sudary, President of the National Assembly of the Kingdom of Cambodia.His Excellency Professor Chheang Ra, Minister of Health of the Kingdom of Cambodia, highlighted the need for collaboration beyond the health sector. “Universal health coverage cannot be achieved by the Ministry of Health alone. It requires support, particularly from parliamentarians, across political, legislative, financial, social protection, education, infrastructure, and environmental domains. While each country follows its own path, one factor is universally critical for success: strong governance and leadership. We all believe in this principle, and in our respective political roles, we remain committed to strengthening these key success factors to ensure that no one is left behind.”Promoting responsible AI adoption Parliamentarians acknowledged that, while AI has already demonstrated its ability to improve access to health services and support delivery, careful and ethical governance is necessary to safeguard quality, safety, privacy and public trust. This underscores the importance of parliamentarians in promoting legal and regulatory frameworks addressing liability, records ownership and data governance, while embracing innovation that protects ethical practice.“Without strong governance, safeguards for privacy and data security, sustainable financing, and attention to those most at risk of exclusion, new technologies may widen existing gaps instead of closing them. This is why parliamentarians matter. We pass laws. We approve budgets. We scrutinize government action. We represent communities. We can ask whether health services are reaching rural, remote, ageing, poor, and marginalized populations. We can ask whether innovation is being guided by equity, evidence, and ethics,” said Hon. Man Hee Lee, President of the Asia-Pacific Parliamentarian Forum on Global Health.Building climate-resilient health systemsParliamentarians also reiterated that the climate crisis is a direct threat to people’s health and to achieving UHC more broadly, deepening the same gaps in access already faced by at-risk and marginalized communities. They recognized the need for WHO Member States to ensure sufficient national appropriations and oversight, and for parliamentarians to raise awareness in their constituencies and mobilize local action in building climate-resilient and sustainable health systems.“Universal health coverage, climate change and AI cannot be addressed in isolation. The same communities struggling to access health services today are often the ones most exposed to climate shocks, and most in need of the opportunities AI can offer if this technology is governed responsibly,” said Dr Saia Ma’u Piukala, WHO Regional Director for the Western Pacific. “Having served previously in this Forum myself as a parliamentarian from Tonga, I recognize how the Phnom Penh Communiqué reflects the shared resolve of legislators across the Asia-Pacific region: the laws parliamentarians pass and the budgets they approve help ensure this progress reaches the people who need it most.”As the Forum drew to a close, delegates reflected on what they would carry back to their own parliaments and constituencies.“I wish to share three points here worth carrying home from Phnom Penh: we need to invest in primary health care as the foundation of coverage; we need to remove the barriers that keep people from care, whether financial, geographic or social; and we need to build systems that are inclusive by design, protecting those most at risk of being left behind,” added Hon. Ouch Borith, First Vice-President of the Senate of the Kingdom of Cambodia.###Notes for editors:The Asia-Pacific Parliamentarian Forum on Global Health (APPFGH) is a platform for parliamentarians to exchange ideas, build political will, strengthen capacity and foster collaboration towards sustainable health action. This was the ninth meeting of the APPFGH, with the theme “Universal Health Coverage in the era of Climate Change and Artificial Intelligence”. Target 3.8 of the Sustainable Development Goals calls on countries to achieve universal health coverage, including financial risk protection, access to quality essential health services, and access to safe, effective, quality and affordable essential medicines and vaccines for all. In the Western Pacific, UHC service coverage index (SDG 3.8.1) rose from 63 in 2000 to 81 in 2023 (figures include Indonesia), and roughly one in four people in the Western Pacific have experienced financial hardship (SDG 3.8.2). Progress towards UHC in the Asia-Pacific region remains uneven, with hundreds of millions of people still lacking access to essential health services or facing financial hardship due to health-related expenses. Strengthening the role of parliaments – through legislation, financing and oversight – is central to closing this gap and accelerating progress towards UHC across the region.Parliamentarians participating in APPFGH in Cambodia this week include: Hon. Pehin Dato Adanan YUSOF, Brunei Darussalam; Hon. Rosmawatty ABDUL MUMIN, Brunei Darussalam; Hon. LORK Kheng, Kingdom of Cambodia; Hon. YOS Phanita, Kingdom of Cambodia; Hon. KHOUN Khundy, Kingdom of Cambodia; Hon. HENG Halim, Kingdom of Cambodia; Hon. KHOENG Noupheap, Kingdom of Cambodia; Hon. SENG Nhak, Kingdom of Cambodia; Hon. LY Sukry, Kingdom of Cambodia; Hon. NHOEURN Raden, Kingdom of Cambodia; Hon. Dr Ratu Atonio LALABALAVU, Republic of Fiji; Hon. Vijay NATH, Republic of Fiji; Hon. Man Hee LEE, Republic of Korea; Hon. Dr Jiho CHA, Republic of Korea; Hon. Jonghun BAEK, Republic of Korea; Hon. Youngsuk SEO, Republic of Korea; Hon. Dr Phayvanh KEOPASEUTH, Lao People’s Democratic Republic; Hon. Suhaizan Bin KAIAT, Malaysia; Hon. Dr Perpetua KONMAN, Federated States of Micronesia; Hon. Ganmaa DAVAASAMBUU, Mongolia; Hon. Charmaine SCOTTY, Republic of Naoero; Hon. Vincent Ambance KUMURA, Papua New Guinea; Hon. Dr Edwin CRUZADO, Republic of the Philippines; Hon. AUUAPAAU Mulipola Aloitafua Mulipola, Samoa; Hon. ASIATA TAVUI Tafu Salevao, Samoa; Hon. Dr Alani Petelo TANGITAU, Tonga; Hon. Paul PAOLO, Republic of Vanuatu; Hon. Franklyn Ezra WILLIAM, Republic of Vanuatu.For more information, contact: WHO Regional Office for the Western Pacific: wprocom@who.int National Assembly of the Kingdom of Cambodia (International Relations Department): ir.nacambodia@gmail.com
Why is climate action “easier said than done”? The key lies in the strong coupling between climate and society
A new Perspective in Science Bulletin argues that the persistent gap between climate science and climate action stems from a conceptual blind spot: treating climate and social systems as separate domains rather than as one integrated, co-evolving entity. The authors introduce the Climate-Social Coupling System (CSS) paradigm and, by re-contextualizing the classic Environmental Kuznets Curve, sort national trajectories into “strong,” “weak,” and “de-coupling” states, showing that governance is the decisive, reversible steering mechanism that determines a country’s climate future.
Saber's newest game trailer takes a shot at Gearbox's CEO, if you look closely
The first hint that something might be up with the recent debut trailer for Saber Interactive’s Rideshare Stimulator is an unusual choice of words—aside from that second one in the game’s title. “Don’t take your passengers too seriously,” the trailer’s narrator says, as he describes this upcoming game. It a car game about the gig work of driving eccentric people to their destinations, a riff on Crazy Taxi. And then, he says: “When I think I’ve met the randiest of passengers, someone even stranger gets in.” “Randiest”? That suggests “randy,” which usually means having strong sexual desire. Yet none of the oddball backseat occupants featured in the trailer seem particularly lustful. One is an old man who considers his grandson a failure, another shares the theory that birds might control traffic lights, another says he’s banned from an aquarium. A little later, there’s a license plate, shown 63 seconds into the trailer, on the front of an SUV: USB DRV It’s a Texas plate. The symbol between those letters is a cog wheel. If you know, you know. That’s a reference to Texas-based Borderlands game development studio Gearbox Software (their logo features a cog wheel). More specifically, it’s a reference to Gearbox’s CEO Randy Pitchford, who in 2018 found himself explaining the nature of video he’d saved on a USB drive that was found at a Medieval Times restaurant before being returned to the studio: “It was ‘barely legal’ porn. This girl’s handle was ‘Only 18.’” The “girl” in the video had committed a solo sex act that Pitchford, an avid practitioner of magic, found remarkable. “I realized, this is not a sex worker…This is a fucking magician.” Back then, the USB drive was central to competing lawsuits against Gearbox by the studio’s former lawyer and by Gearbox against him. A settlement in late 2019 “exonerated” Pitchford, per the Hollywood Reporter. The USB story has resurfaced at times, now in a trailer from a company that not long ago was corporate brethren with Gearbox. Saber vs. Gearbox The head of Saber told Game File that the reference is payback. “The dig is because Randy took shots at Embracer in Borderlands 4,” Saber CEO Matt Karch told me when I asked him about the license plate. “Without Embracer, Randy is performing magic tricks at birthday parties for a living.” Having interviewed Karch during a cross-country flight in late 2024, I can confirm that Karch was unimpressed with Pitchford during their time both working in the Embracer group. I’d approached him not out of surprise that there was animosity but that it was manifesting publicly now. Gearbox was founded in 1999, worked on a port of Halo early on, and developed hit series such as the loot-based sci-fi shooter Borderlands before it was purchased by The Embracer Group in early 2021 for $363 million (with a possible earn-out of over $1 billion, if certain targets were hit by 2027). Saber was founded in 2001, worked on a remaster of Halo early on, had a big hit with zombie shooter World War Z and was purchased by Embracer in early 2020 for $150 million, with a potential earn-out of up to $375 million. For a few years, the Embracer group was a voracious acquirer of game studios. Then, as investment dried up, it choked. In March 2024, Embracer sold Saber to an investment company controlled by Saber CEO Matt Karch, and it sold Gearbox in an all-stock deal to long-time Borderlands publisher Take Two Interactive. Other studios were shut down. Hundreds of developers were laid off. Gearbox didn’t say much about their Embracer experience, nothing too direct, at least. In the summer 2024, Pitchford told reporter and occasional Game File contributor Nicole Carpenter that Borderlands 4’s story was in some way thematically connected to Gearbox’s experience at Embracer: “There’s this cultural and emotional shift in me, personally, and at the studio. What does it mean to trade some autonomy for organization?” When Borderlands 4 came out, there was something stranger: the matter of “Embracer’s Bluff,” a location in the game featuring an AI-powered toilet and a large trash dump, according to a detailed Kotaku account of the place. Gearbox never commented on it; Take Two never got back to me about it when I asked them last year. By contrast, since Saber exited Embracer, Karch has been one of Embracer’s biggest defenders, casting their management as well-meaning and supportive despite the layoffs and studio closures that resulted from their excessive expansion. Like others, Saber’s Karch saw Embracer’s as a shot. With Rideshare Stimulator’s trailer, he’s returned fire. “It’s amazing to me how fast people forget those who went above and beyond for them,” Karch told Game File. A rep for Gearbox did not comment by press time. Game File is a reader-supported publication. Your backing makes my reporting—including any coverage of trailer-based beefs—possible. Good news! I’m currently running Game File’s first big sale of 2026. You can get a one-year subscription for 23% off. Click here to take advantage of the limited-time offer. And thank you for your support! Item 2: In brief… 🚫 Wal-Mart has laid off the staff of Restart, a games media outlet launched in 2024, Aftermath reports. 🟥 A GTA VI preview is on the way, at last, via an “extended look” that will premiere, unusually, on Netflix at 3pm ET on August 27, then officially go live elsewhere six hours later. Last week, Game File noted that Take Two label Rockstar Games is overdue for showing off GTA VI, based on the timing of the initial hands-off previews of GTA V and Red Dead Redemption 2. During a call with investors, Take Two CEO Strauss Zelnick said pre-orders for GTA VI were “unprecedented and astonishing,” but added the company can’t predict how many of those pre-orders represent bonus sales vs. sales that otherwise would have been made at launch. During the same call, Zelnick was noticeably bullish on the future of playing games over streaming cloud connections (predicting wider adoption in three or so years). He sounded unbothered by Sony’s plans to stop making discs for new games (he said the business is 90% digital already and predicted that there could still be limited edition physical editions of games “in the same way there’s still vinyl in the recorded music business.”) 👀 Take Two wrote off $43 million in their spring quarter after deciding “not to proceed with further development of an unannounced title in its pipeline from a third-party developer.” 🤔 Some rare age-demographics from a big publisher: Capcom recently told investors that “users in their 20s account for approximately half of the users of both Pragamata and Resident Evil Requiem.” Item 3: The week ahead Tuesday, August 11 Game releases: The Elder Scrolls IV: Oblivion Remastered (Switch 2; already out for PC, PS5, Xbox) continues the Bethesda strategy of putting Elder Scrolls games on everything; Royalty Free-For-All is a Smash Bros.-style fighting game featuring public domain characters such as Mother Goose brawling with Oliver Twist in a stage based on the original Little Shop of Horrors movie. Wednesday, August 12 Game release: Pro Jank Footy (PC, console) is an arcade-style Australian Rules Football game with increasingly ridiculous rules, the more you play (I enjoyed the Steam demo) Thursday, August 13 Game release: Super Mario Sunshine (Switch 2, originally released in 2002 on the GameCube) is released for Switch 2’s Nintendo Switch Online service. This game is the black sheep of 3D Mario games. It’s the successor to the breakthrough Super Mario 64 and the rare Mario game built around a single (vacation resort) theme. Mario’s got a water-spraying backpack, a Yoshi pal and a lot of blue coins to collect.
Viewpoint: Europe needs a new scientific contract
The White House's new science strategy should be required reading in the Berlaymont and every European capital.Not because Europe should copy it. Parts of it should concern Europeans deeply. But because it asks the question Europe has so far avoided while steadily losing ground in the global race for technological leadership.Europe already possesses many of the world's finest universities, scientists and research-intensive companies. It produces world-leading research in fields ranging from quantum technologies and biotechnology to climate science. Yet time and again Europe generates the scientific breakthroughs while others build the companies, industries and strategic advantages around them, particularly in digital technologies. Increasingly, we find ourselves regulating technologies whose underlying capabilities were developed elsewhere.This is not primarily a scientific failure. It is an institutional one.The settlement that shaped modern science policy emerged after the Second World War. In Science, the Endless Frontier, Vannevar Bush argued that governments should invest in fundamental research while protecting scientists from political direction. Public investment was justified precisely because no government, university or company could predict where the next transformative discovery would emerge.That scientific contract served liberal democracies extraordinarily well. It underpinned decades of advances in medicine, computing, energy and communications, but the world for which it was designed no longer exists.Artificial intelligence is transforming not only technology but the production of knowledge itself. Advanced chips, computing power, data and scientific instruments have become strategic assets. Scientific knowledge now diffuses globally almost instantly. Competitive advantage increasingly lies not in making discoveries first, but in possessing the infrastructure, capital, engineering capability and institutions required to translate those ideas into products, industries and strategic advantage.The old boundaries between science, industrial policy, national security and geopolitics have largely disappeared. Dual-use technologies now underpin both economic power and military deterrence.The US has recognised this shift. In July, the White House published Science: A New Golden Age, a comprehensive attempt to rethink the relationship between science and national power. The report builds on Bush's legacy, but departs from his framework in important ways. Science is no longer treated simply as the source of future discoveries. It is presented as the foundation of economic resilience, technological leadership and national security. AI, advanced infrastructure and the capacity to build become as important as discovery itself.Yet the report also reveals a striking paradox. The same administration calling for “a new golden age” of US science has simultaneously proposed deep cuts to the federal research enterprise while expanding political influence over the allocation of public research funding. Europe should therefore distinguish between the report's diagnosis and its prescription. The diagnosis, that science has become a strategic asset, is compelling. But the prescription is self-defeating. Long-term technological leadership depends on strong universities, academic freedom and the institutional autonomy that makes scientific discovery possible. This distinction matters. Bush's achievement was never simply to make science serve national strength. It was to establish a division of labour in which governments invested in research without attempting to direct discovery itself. Scientific breakthroughs emerge precisely because researchers retain the freedom to pursue questions whose value cannot yet be demonstrated and whose conclusions cannot be anticipated.Neither China, nor the USAs science becomes more strategically important, the temptation to politicise it inevitably grows. But scientific freedom is not an obstacle to technological leadership, it is an essential precondition.China represents the opposite model. For decades it has integrated science, manufacturing, infrastructure and industrial policy into a single national strategy. Its ability to mobilise resources around critical technologies is formidable. But it does so within an authoritarian system where scientific priorities are increasingly inseparable from political power.Europe should imitate neither model. It should learn from the strategic ambition of the US without importing its growing politicisation of science. And it should learn from China's capacity to build without adopting its concentration of power.Instead, Europe needs a scientific contract of its own. Bush's scientific contract protected the freedom to discover because the defining challenge of the 20th century was producing new knowledge. Europe's next scientific contract must preserve that freedom while ensuring that scientific discoveries can be converted into technological, industrial and strategic capability. Because in a transactional world, Europe's freedom to shape its own future depends on its capacity to build it.Related articlesThe US ‘golden age’ science strategy: what Europeans need to knowEuropean researchers sound the alarm that Trump rule changes will hit cooperationNIH turmoil risks reciprocal EU-US access to health research fundingThis does not mean subordinating free science to competitiveness or industrial policy. On the contrary. Scientific autonomy remains the first principle of Europe's next scientific contract. Governments should not direct scientific discovery. Their responsibility is to ensure that Europe's scientific, industrial, financial and regulatory institutions work together rather than in isolation.Meeting that responsibility requires far more than research funding. European researchers need access to world-class computing infrastructure, advanced laboratories, shared datasets and scientific facilities. Innovative companies need patient capital, testing environments and a genuine single market in which they can scale without facing 27 different regulatory regimes. Public procurement must evolve from purchasing existing technologies to creating markets for new ones. Regulators must become partners in experimentation rather than guardians of yesterday's rules.A connecting architectureEurope does not need to invent the Defense Advanced Research Projects Agency (Darpa) model from scratch. Britain's Aria, Germany's Sprind and Wellcome Leap already show that Europe can build institutions capable of taking high-risk, mission-oriented bets while preserving democratic accountability. The challenge now is not to create more isolated initiatives, but to connect them to Europe's broader scientific, industrial and financial system so that breakthrough discoveries can scale.Above all, Europe must stop treating research, innovation, industrial policy, finance and security as separate policy domains. The challenge is no longer to create excellent institutions in each of these fields, but to make them work as one European innovation system. Europe's strength will increasingly depend not on excellence within institutions, but on excellence across them.Europe's ambition should be neither to imitate the US nor to emulate China. It should demonstrate that scientific freedom, democratic legitimacy and technological capability are not competing objectives, but mutually reinforcing strengths. In an age of geopolitical rivalry, Europe's greatest advantage may ultimately be its ability to attract the world's best talent by combining scientific freedom, democratic openness and technological ambition.Bush's scientific contract helped define the 20th century because it protected the freedom to discover. Europe's challenge is not to abandon that achievement but to extend it. The defining task of Europe's next scientific contract is to preserve the freedom to discover while building Europe's capacity to translate scientific discovery into technological power.Kaare Nielsen is founder of Pomus, a Danish think tank on science and innovation.
The Science Behind the AI Panic Is Shakier Than You Think
A column by Sascha Lobo Is AI making us dumb? So asked DER SPIEGEL on its cover a while ago. After a few weeks of recovery and a therapeutic intervention with the help of my AI, I feel able to respond. That’s a bit unfair, of course; the article itself is more nuanced than the loud cover, the image of a schoolkid with dull prompt questions, or the subtitle: “AI is conquering the schools, and educators fear a disaster.” The short answer to “Is AI making us dumb?” is: no. The long answer is more interesting, and even carries a preliminary glimmer of the spectacular. Unfortunately, it requires a detour into the sphere of artificial intelligence, into the mogul-field terrain of technology assessment, the attention economy, and the destructive virus of cultural pessimism. Along with narrowing the scope to AI’s effects on education and work rather than on intelligence. Because the honest version of the question would be: Does AI help us learn and work, or not? Generative AI, which set off the still-ongoing hype with ChatGPT, has only existed in relevant distribution since late 2022, early 2023. For a technology-driven transformation of people and society, that is extremely short. For that reason alone, research is still in its infancy. And technology assessment is not a fast discipline anyway. Prominent voices from Elizabeth Eisenstein to RAND to Tom Wheeler say we still cannot conclusively judge the consequences of the printing press. Its invention is a mere 580 years back, and some scholars would rather not circulate assessments that might have to be retracted in two or three hundred years. We’re Going Through Growing Pains A phenomenon that already caused upheaval in social media research makes serious assessment of AI’s consequences even harder: the “moving target” problem of LLM-ology, as the linguist Sean Trott called it in 2025. AI develops so quickly and so unpredictably that researchers often end up studying snapshots of the past. There are concepts, from morphological analysis to anticipatory governance, for keeping research, planning, and regulation halfway meaningful anyway. But even with those, universally valid statements are rare. DER SPIEGEL - The German View is a reader-supported publication. To receive new posts and support our work, consider becoming a free or paid subscriber. Subscribe We should therefore treat findings about the interplay between humans and AI as far more procedural and situational. Unfortunately, this challenge comes at the worst possible time. We are going through growing pains: AI’s everyday impact has grown very large very fast, and with it the longing for guidance. Annoyingly, the body of solid knowledge has not exploded along with it. Experts cannot be moved to broad consensus on even banal statements about AI. Sascha Lobo, born in 1975, is an author and strategy consultant focusing on the internet and digital technologies. Together with Jule Lobo, he explores the debates of the day in the podcast “Feel the News – Was Deutschland bewegt” (”What Moves Germany”). Nvidia CEO Jensen Huang says software developers are dying out. Bill Gates considers coders one of only three professions that will survive the AI tsunami. Top tech economists find virtually irrefutable arguments both for and against an AI bubble. The same naturally applies to the structurally youth-hostile debate over whether AI is good or bad for young people. The gap between the demand for insight and the supply of solid knowledge creates an orientation vacuum. This vacuum of AI cluelessness is filled, as the attention economy described by Georg Franck in 1998 would have it, with half-knowledge (funnily enough, often AI-generated), marketing, and self-marketing. After all, infinite money is at stake, along with academia’s best current shot at global fame. But this iridescent froth of interpretation operates more by the algorithmic principles of the digital public sphere than by seriously earned insight. That is why dramatized, fear-feeding claims about AI are so promising. It tempts parts of academia into distorted drivel, and parts of the media then sensationalize the published drivel once more. Was the Research Aimed at a Desired Result? How badly this can influence academia and public perception is demonstrated by one of the most-discussed studies on AI’s effects: “Your Brain on ChatGPT.” The MIT study by Nataliya Kosmyna also gets plenty of space in the SPIEGEL cover story. What was measured and interpreted: lower brain activity in people who write with AI assistance, compared to people who only google or write without any tools. As is common with preprints, the study has not yet been peer-reviewed, and it contains substantial weaknesses that experts have sharply criticized. The first round had 54 participants in three groups, the second only 18, who reportedly also came from MIT’s own orbit. There was no preregistration (committing in advance to what you want to find out with which data). In their analysis, Stanković et al. even discovered an opposite effect that the study does not further explain. Some measurement data has not (yet) been published. And the EEG analysis method used is considered too imprecise to support such far-reaching conclusions. The biggest criticism, though, is the suspicion of an activism-driven study. In an interview with Time, lead author Kosmyna said she published the study immediately, rather than after full peer review, because she feared politicians might otherwise decide to put ChatGPT in kindergartens. She considers that absolutely harmful. It is legitimate to hold such a view. It just seems unscientific to approach a study with it, and then to design the setup so that the chance of a fitting desired result remains as high as possible. Ideologies Collide It is not easy to separate genuine AI insights from studies that trivialize and weaken well-founded AI criticism. The same goes for the opposing, AI-enthusiastic narratives, because the pro-AI side works against it with billions in resources. Ideologies collide, fed by egos, PR strategies, moral posturing, and once-in-a-lifetime opportunities. Doomsday marketing makes the search even harder: AI companies can profit from warnings about the dangers of AI, whether through the notoriety of apocalypse narratives or because, in some target groups, danger translates into power. Some seemingly negative findings are therefore quite welcome in the AI industry. If you try to get at the findings presumably less influenced by interest groups, the picture in education seems relatively clear: AI can improve educational outcomes when the right AI is used the right way, namely pedagogically. Simply dumping an AI chatbot into a classroom, by contrast, accomplishes little. Huge surprise. But something else is also obvious: whether they are allowed to or not, kids use AI for school, which is why the controlled integration of AI tools into education is, in the medium term, entirely without alternative. In the world of work, the landscape of findings is more complex and requires more differentiation. A series of serious studies points to an AI effect that suits neither the alarmists, regulation fetishists, and AI opponents, nor the trillion-dollar corporations with their armada of paid scientists, PR professionals, and ecosystems: working with AI helps the inexperienced (at least for now) considerably more than it helps the pros, in certain fields of work, and provided they know how to use it correctly. Missing Domain Knowledge Among the experienced, the professionals, and the high flyers, by contrast, despite frequent time savings, partially negative effects and new problems are emerging. Take the jagged frontier problem: AI solves task A brilliantly and fails completely at task B, even though both look similar even to professionals. Or the verification-cost problem, in which AI’s greater productivity gets eaten up by the enormous effort of checking its output. Or the illusion of competence, because AI makes new domains seem easily penetrable, until you painfully discover that deep domain knowledge is missing. Taken as a whole, the effects of working with AI do lean positive. But the promise that AI works as a turbocharger for everyone and boosts practically everything simply refuses to materialize. The AI magic the world has been feeling since ChatGPT arrived in late 2022 has so far barely shown up in most companies’ numbers. The consulting firm McKinsey has coined a term for this, the “gen AI paradox,” and believes that work processes and corporate structures would have to be rebuilt quite fundamentally to realize AI’s benefits at scale. Reuters just reported that only 3.3 percent of Microsoft’s customers have subscribed to the AI package Copilot. That may be down to the product; in other areas we continue to see soaring successes and new AI triumphs. But after the first quarter of 2026, disillusionment is the word for all too many AI projects at traditional companies: because the promised revolution of AI agents has so far failed to arrive or been postponed, and because of the leveling effect that many of the studies cited here suggest. Against Inequality The societal effects, on the other hand, appear rather encouraging. Many previous technologies operated on the Matthew principle, named for the Gospel verse about giving to those who already have: they tended to reward the more competent and more privileged. AI, however, seems more often to have an equalizing effect once a threshold of access and education is crossed. Some anecdotal insights point in this direction, for example, how an unemployed man in Leipzig successfully defended himself in court in 2025 against fraud accusations from Germany’s federal employment agency — without a lawyer, armed only with ChatGPT. The AI made mistakes and cited invented court rulings, but in the end the man walked away unpunished. And a key capability of artificial intelligence is its capacity to learn: set up correctly and fed with data, it can keep getting better. It is a question of time, or more precisely of AI innovations and training data, until even free AI chatbots write better legal briefs than law graduates with perfect exam scores. Whether that will make anyone dumb is something the world’s press will surely inform us of in due time. Subscribe Leave a comment
Scientists finally crack nature's secret for building better cancer drugs
Researchers have cracked the code behind bacteria's ability to naturally manufacture multiple versions of powerful anti-cancer drugs. The discovery could make it much easier to engineer new cancer treatments inspired by nature, including improved versions of existing medicines.
Milwaukee is a top US city for entrepreneurs, new report shows
Milwaukee ranks among the top U.S. cities for entrepreneurs, according to a new report from domain-name company GoDaddy.
Fincantieri Acquires Four Companies to Expand Underwater Drone Business
Fincantieri announces the agreement for the acquisition of Next Geosolutions, WSense, Graal Tech and Defcomm. These four strategic transactions in the Underwater segment significantly enhance the Group’s positioning in a domain that is becoming increasingly central to security, energy and the development of critical infrastructure.
How should European scientists respond to the US AI kill switch?
Earlier in June, Europe’s worst fears of technological dependence were confirmed when the White House ordered the AI firm Anthropic to stop non-US citizens using its leading models. This kill-switch moment crystalised anxieties in Brussels that the continent, lagging the US on the creation of leading-edge AI models, is now a technological of vassal of Washington. The shock has specific implications for European scientists and universities. Some governments are now worried that with AI being integrated into labs, Donald Trump now has his finger hovering over an off switch for European science. “Having restrictions on this tool, it can have an impact on our own research,” said France’s research minister, Philippe Baptiste, at the VivaTech conference in Paris on June 18.Baptiste, himself a former academic, said that colleagues in mathematics had recently warned him they were now cut off from leading-edge US models, risking their work. “This model is not available anymore now because of the US restriction, and for the first time this had an impact on mathematics,” a field where large language models (LLMs) are making a significant contribution, said Baptiste. So, should European scientists avoid relying on US models in the future? Or would this be a self-harming overreaction? And how is AI being used in science, anyway? What happened?On June 12, it emerged that Washington, citing cybersecurity concerns, had ordered Anthropic to stop non-US citizens using two models: Claude Mythos 5, and Claude Fable 5, a version of Mythos but with guardrails to prevent abuse. Anthropic said Washington’s concerns were overblown. But forced to follow the order, yet with no way to check who was using the models, the company suddenly shut down access for everyone, US citizens included. There’s still no agreement on how to restore broad access. But last week, Bloomberg reported that select US companies, and the US government, still had access to Mythos despite the ban, but the EU’s cybersecurity agency Enisa had been shut out. Class division of researchersIn the longer term, access outside the US should be restored, said Marcel Salathé, co-director of the AI centre at the Federal Polytechnic School of Lausanne (EPFL), because a permanent restriction would be financially ruinous to US AI firms. “Even Trump will eventually budge to economic pressure,” he said.However, US AI firms might end up operating rather like banks, doing due diligence on users of their leading-edge AI models, he went on.European scientists are unlikely to fall foul of such checks, he said. But having a Chinese postgraduate in their lab, or doing a type of research the US disapproved of, could potentially result in access being denied. “It will create a sort of class division of researchers,” he said. More than frontier modelsHowever, successfully deploying AI in science is about far more than just having access to leading LLMs such as Mythos.Instead, many science-specific tools, most famously Alphafold, which predicts protein folding structures, require “far less” computing power to train than frontier models, well within the capabilities of European supercomputers, according to a recent analysis by the Arq Foundation, a Brussel-based AI think tank. Instead, tools such as Alphafold are possible because certain fields, like protein folding, weather prediction or astronomy, have large, clean, standardised datasets that can be used to train predictive models. Rather than compute, “data is the central constraint for AI for science,” the report says. For example, a less powerful physics model trained on CERN’s data “will be more valuable than the best model without certain data,” said Bengüsu Özcan, author of the report. European advantage?Europe could therefore steal a march by using its scientific data and infrastructure to create models US digital giants cannot. “They might actually match or go even beyond what these big [US] companies are doing,” said Özcan.Indeed, some European start-ups hope to create automated testing labs to create the kind of standardised data that could speed up the discovery of new materials. Materials scientists say there’s currently too little data to train models. AI scientistsHowever, even if the bottleneck for AI in science is often data, rather than compute, being at the mercy of the US for LLM access could still become a problem for European scientists. A new class of “AI scientists” based on leading LLMs is also emerging, Özcan’s report says.Unlike domain-specific tools like Alphafold, these try to automate day-to-day scientific work, by providing an overarching tool that coordinates specific models to synthesise existing literature, generate hypotheses or run analysis of data. The problem for Europe, however, is that these tools are sometimes based on US leading models. Google Deepmind’s AI Co-Scientist, for example, is built on Google’s Gemini LLM. Systematic failureThese scientific automation tools are still in their early stages, and still exhibit “systematic failures on scientific tasks,” Özcan’s report says. One of the problems is that the messy, day-to-day process of scientific discovery is largely not documented, meaning LLMs don’t have a good source of data to learn how scientists actually work. Meanwhile, some tasks, such as literature synthesis, don’t typically require access to leading edge models.However, the performance of AI scientific assistants could improve as companies such as Google pour resources into developing them. Rely on US“Unfortunately, for scientific assistants, there is not much we can do right now except rely on US frontier AI,” said Antoine Bosselut, a natural language processing expert based at EPFL. Chinese-built open models, which can run on local computers, lessening the risk of a shutdown, are touted as one alternative to US dependence. There’s also Mistral, once seen as Europe’s main AI hope, but the Paris-based company has seen its recent models fall behind in performance. But the Chinese alternatives are generally not as capable as US frontier AI models, said Bosselut, unless paired with fiddly, custom tools that allows them to act as independent agents. “Most scientists do not have the time,” he said. Don’t jump ship yetAlthough the kill switch moment is seen a warning shot for European scientists, it doesn’t mean labs should abandon US AI tools immediately. “I do not think the right response is simply to abandon US-based models and systems under the banner of sovereignty or independence,” said Mattias Björnmalm, secretary general of the Cesaer university association. “That would be an overreaction.”Related articlesEuropean sovereignty in AI requires ‘ugly trade-offs,’ say experts Robotic lab start-up makes case for €500M EU-funded materials testing facilityAI in science: is it useful? Instead, European researchers need to ask themselves whether they’re becoming dependent on technology that could be turned off in Washington, said Özcan. “They might not see this today, but they should really start asking this question,” she said. European researchers need a plan B, said Salathé. “I would recommend to every researcher, very proactively explore alternatives.”Own toolsIn addition, Björnmalm and others want European research institutions to develop their own scientific AI tools.Instead of signing AI deals with US digital giants, European universities should be using this money to create their own models, which may end up being superior for research, said Sabine Leonelli, an expert on the use of AI in science at the Technical University of Munich. “Universities in Europe seem to be happy to sign commercial contracts with US companies on the assumption [their AI tools] are better,” she said. But US frontier LLMs are typically opaque, and have been developed without independent scientific input, she said. “This is not good enough for science.”Last year, Swiss researchers released Apertus, an LLM designed to be completely transparent, from its development methods to its training data. The idea is that this makes scientific tools built on top of the model far more reproducible than with closed, commercial alternatives.“Europe needs more of this: serious capacity-building that gives researchers, universities and companies credible options,” said Björnmalm.
AI in Mental Healthcare Presents Both Opportunities and Challenges
Artificial intelligence (AI) technology and its applications are reshaping many domains of modern life, including how individuals seek support for mental health needs and how they receive that care. Healthcare professionals are rapidly adopting AI-based applications designed to support workflow and care delivery, streamline processes, and help expand access to services.
Apple plans to change its Hide My Email privacy feature that could make it less effective
In the coming weeks, Apple will move anonymously generated emails addresses to a different domain.
Nebraska’s Wide, Rolling Domain
The Nebraska Sandhills—the largest system of sand dunes in the Western Hemisphere—stretch across about one-quarter of the state.
Sign in with Apple and Hide My Email are getting a new shared email domain
Apple announced today that it will soon use a single shared domain for private email addresses generated by Sign in with Apple and iCloud+ Hide My Email.
Apple to Unify Sign in With Apple and Hide My Email on One Domain
Apple is planning to unify the email domains used by Sign in with Apple and iCloud+ Hide My Email under a single private.icloud.com domain. Addresses generated for both features will be issued on the new domain, Apple says. Sign in with Apple addresses currently use the privaterelay.appleid.com domain, while iCloud+ uses icloud.com. Later this summer, both will use the same private.icloud.com domain.
Is SMIC N+3’s Metal Pitch Smaller than Intel 18A’s?
Almost four years ago, we published that SMIC had started shipping 7 nm (N+1) chips. Now, SMIC is shipping its third-generation 7 nm (N+3) process in Huawei’s Kirin 9030, with a minimum metal pitch of 32.5 nm, about 10% tighter than the 36 nm minimum metal pitch shipping in Intel’s latest Panther Lake CPUs on 18A. The headline is true, but incomplete cherry picked metric. N+3 reaches the density of TSMC N6 through aggressive DUV multi-patterning and design-technology co-optimization (DTCO), but it pays for that in complexity, efficiency and process control. We found this and more in our reverse engineering and teardown where we cover SMIC’s N3 process technology, Huawei’s packaging, memory, architecture, and more. SemiAnalysis has been building a state-of-the-art teardown lab in Oregon capable of analyzing the world’s most advanced and important chips over the last year and half. We have already generated revenue on advanced datacenter chip teardowns including our recent reverse engineering of a major TSMC customer’s COUPE CPO optical engine + EIC 3D stack. This is the first public report from the SemiAnalysis Teardown Engineering & Evaluation Lab, or STEEL for short. The lab is aggressively scaling up and out and we’re excited to announce it publicly. This is a bit of inconvenient timing for TechInsights as they are private equity owned and currently being sold while having enjoyed virtually no credible competition for decades. This has led to TechInsights underinvesting in CAPEX. SemiAnalysis exceeds TechInsights in revenue despite no venture or private equity ownership and being founded only 6 years ago. Because we have no external investors and are founder led, we move faster, build faster, and we can release client chip teardowns for free regularly, while focusing on datacenter for our major clients. Here’s the first public image from our lab, the HiSilicon Kirin 9030 Pro SoC: This report will detail our teardown of the Kirin 9030 and our findings on SMIC’s N+3 process, the most advanced in China. For comparison, we’ll show our teardown of the MediaTek Helio G99, made on TSMC N6. Through this comparison, we can look at the effect of export controls – SMIC N+3 and TSMC N6 are comparable nodes, but one is heavily export-controlled, the other free to use the West’s most advanced equipment. Here we see both China’s progress and constraints. SMIC N+3 reaches TSMC N6-class logic density, but it requires far more aggressive DUV multi-patterning, so it does not match N6 on process maturity or cost. The Kirin 9030 Pro performs similarly to three-year-old Android flagships, and trails far behind the current flagship SoCs from Apple, Qualcomm, MediaTek, and Samsung. The efficiency gap is even wider. Export controls have not stopped Huawei and SMIC from shipping advanced silicon, but they have forced a different path. Without EUV, SMIC is leaning harder on DUV multi-patterning, DTCO, and increasingly complex integration. The roadmap continues forward through tighter design rules and backside power, but each step adds cost and process risk. Huawei’s τ scaling and LogicFolding show another path: stacking active logic and recovering density through advanced packaging and system-technology co-optimization (STCO). To understand the Kirin 9030, we must first understand Huawei’s SoC history. HiSilicon is Huawei’s chip design arm, responsible for the Kirin smartphone SoCs, Kunpeng server CPUs, Ascend AI accelerators, and switch/router networking silicon. Before export controls, Huawei was TSMC’s largest customer – the only customer on TSMC’s first EUV node, N7+, and among the first on N5, alongside Apple. That ended in late 2020. Huawei switched to Qualcomm SoCs in its flagship smartphones, though export controls limited them to 4G-only variants. In late 2023, Huawei returned to in-house silicon with the Kirin 9000s, a successor to the Kirin 9000, fabricated on SMIC N+2 instead of TSMC N5. In the following years, they released the Kirin 9010 and 9020 on the same N+2 process. These chips used Huawei’s in-house TaiShan CPU cores and Maleoon GPU. We have not torn down a Kirin 9020 ourselves, so the predecessor die shot is from Kurnal. The die shots show how Huawei spent its silicon budget: which functional blocks are where, and how their areas compare to the predecessor. First, a quick guide to the major blocks on the die. The total die area is nearly identical, but the 9030 uses that area more aggressively. A denser process lets Huawei fit an extra middle CPU core, more GPU and NPU cores, and larger caches into the same footprint. In contrast, the Helio G99 is a much smaller, low-cost SoC, built for budget smartphones rather than a flagship device. While the Kirin 9030 is ~140 mm², the G99 is only ~29 mm², roughly one-fifth the area. The underlying TSMC process technology, however, is directly comparable as a baseline for analyzing SMIC’s. The Kirin 9030 is an evolutionary refresh, not a clean-sheet design. Its CPU, GPU and NPU cores carry over the 9020’s families, and the gains come from three levers: the SMIC N+2-to-N+3 process step, DTCO and floorplan work, and incremental microarchitecture. Area is where the first two show up, and the 9030 scales well here. Performance and efficiency are the harder test. Huawei’s design holds up better than its node would suggest, but the chip still trails, both because N+3 sits behind the leading-edge nodes and because its cores, while competent, remain a few generations behind the newest designs. The new prime core is an incremental update. The main changes are a 10% frequency increase from 2.5 GHz to 2.75 GHz and a doubling in the L2 cache from 1 MiB to 2 MiB. Despite the increased cache, the core size decreased by 7.6%. Excluding the private L2 cache, the core size decreased by 21%. This is a large reduction for an incremental node. Compared with the TaiShan New V120 core in the Kirin 9020, the Kirin 9030’s middle core is almost unchanged architecturally, yet each core shrinks by ~22%. Most of that comes from the move from N+2 to N+3, with layout likely accounting for the rest. Visually, the most noticeable change is the increase from 3 middle cores to 4. There is also a 20% increase in the shared L3 cache of the big cluster. This helps to improve multi-core performance without sacrificing much in terms of area. Even with each core shrinking, the big CPU cluster’s total area is essentially unchanged. The per-core savings went back into an additional middle core and larger caches. The tiny cores shrank less than the prime core (excluding its L2 cache) and less than the middle cores. This is likely because fixed overhead is a larger share on a small core. We cannot resolve any architectural changes from the die shot alone, but the per-clock and efficiency gains shown below point to more than pure process and layout scaling. The area reduction was offset by a doubling of the shared L2 cache from 2 MiB to 4 MiB, leaving the total tiny CPU cluster area slightly larger. Area is the easiest improvement to see from a die shot, but it is only one part of PPA (power, performance, area). For modern logic, power and performance matter just as much, and often more. Since Dennard scaling broke down in the mid-2000s, voltage and frequency have not scaled in step with transistor dimensions, so each node has had to fight harder for gains in performance and efficiency. The starkest comparison is not Kirin 9020 versus Kirin 9030 Pro. Apple’s efficiency cores run circles around Huawei’s prime core. Apple’s low-power core delivers 20% higher integer performance while drawing only 1 W, compared with 4.5 W for Huawei’s prime core. N+3 matches TSMC N6, but N6 is several generations old. Apple and Qualcomm build on N4 and N3P, which are denser and sit on a better voltage-frequency curve, giving them a larger transistor budget and more performance per watt. The 9030’s own cores did improve. The middle and tiny cores gained 17% and 14% in per-clock integer performance over the 9020, with floating-point flat on the middle core and up 11% on the tiny. The tiny core improves cleanly, with performance rising while power falls and efficiency increases by 45% in integer and 24% in floating point. The middle core is mixed: integer performance rises but power rises faster, cutting integer efficiency by 7%, while lower power lifts floating-point efficiency 16%. Per-clock gains at the same or lower frequency are microarchitectural, so the cores are tuned, not just shrunk. Both also failed to hold their rated maximum frequencies, pointing to thermal, power, or stability limits. Per clock, the middle core sits around Arm Cortex-A720 and the tiny core near the Cortex-A520; absolute performance trails because Huawei clocks them much lower. The prime core is roughly Cortex-X2 class per clock, a 2021 design. Apple’s 2020 M1 Firestorm core is still 35% higher per clock and 57% faster in absolute integer performance at a similar 4.5 W. The current leading edge is further ahead again: the Apple M5 P-core is 60% higher per clock and 2.7× faster, the Arm C1 Ultra 45% higher and 2× faster. Matching older high-end cores per clock is a genuine design achievement. What Huawei cannot match is the voltage-frequency curve and transistor budget of leading-edge nodes, which let Apple, Qualcomm and others spend more transistors in the same area on wider cores, larger caches and deeper buffers while running at lower voltage. Huawei’s LogicFolding roadmap is one answer, stacking active logic to recover density and shorten signal paths. We return to it later. The GPU compute units (CUs) changed more visibly than the CPU cores, moving to a more rectangular layout for both the arithmetic logic unit (ALU) clusters and the CU overall. Even with ray-tracing support added, a CU shrank ~28%. However, that shrink is offset by the increase from 4 to 6 CUs and the area outside the CUs grew 33%. Overall, the GPU cluster is larger by ~10%. The GPU is where Huawei makes its biggest gains. The Maleoon 935 is not competitive with current flagships, but it is a large step up from the 920 and reaches older-flagship territory. In 3DMark it is 70% faster in Wild Life Extreme (WLE) and 79% faster in Steel Nomad Light (SNL) than the 920; with 11% higher clocks and 50% more CUs, the ~67% theoretical uplift roughly matches WLE and is beaten by SNL. It edges ahead of the Snapdragon 8+ Gen 1 in WLE and SNL, and the Dimensity 9200 and Apple A16 in WLE, but stays far behind newer parts: the Snapdragon 8 Elite Gen 5 and Dimensity 9500 are ~2.4–2.6× faster in WLE and ~3.2× faster in SNL. The Maleoon 935 is Huawei’s first GPU with hardware-accelerated ray tracing; there it lands slightly ahead of the Exynos 2200, and on par with the Apple A16, with current flagships up to 3.7× faster. The Neural Processing Unit (NPU) saw the largest structural changes of any block, moving from a Lite and a Tiny core in the Kirin 9020 to a Lite and two Tiny cores in the Kirin 9030. Both core types also show significant layout changes. This is a reversal in Huawei’s NPU design. The Kirin 9000 5G, its last flagship chip on TSMC N5, used two Lite and one Tiny core. The series of SoCs on SMIC N+2 moved to one Lite and one Tiny core, likely for area savings. With the Kirin 9030, Huawei has shifted back toward a larger multi-core NPU cluster, but with the additional area going to a Tiny core rather than a Lite core. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Interested in joining us on this ride and think you can be a difference maker? Check out our Careers page. Before diving into the process stack, the package and memory are worth separating from the SoC itself. The Pro variant of the Kirin 9030 carries 12 GB of Samsung DRAM, with two stacks of four dies each. The dies were identified as the K4L2E165YD, a 12 Gb LPDDR5X-9600 device fabricated on Samsung’s 1a node, the fourth generation of its 10 nm-class DRAM after 1x, 1y and 1z. 1a has shipped in volume since 2022, so this is current memory rather than older-node inventory. The 16 GB Pro Max variants we obtained were found with both CXMT and Samsung packages. The CXMT package is marked CXDD7JEDM, with two stacks of four dies, packaged in week 45 of 2025. The inferred die dimensions from X-ray computed tomography (CT) are consistent with a known density of ~0.3 Gib/mm² for the CXMT G4 process, roughly equivalent to other manufacturers’ 1z processes. The Kirin 9030 uses a typical integrated package-on-package (iPoP) stack: multiple DRAM dies in a memory package sit above an organic redistribution layer (RDL) interposer, which sits above the SoC and package substrate. The full package is then mounted to the printed circuit board (PCB) through ball-grid array (BGA) solder bumps. The memory package substrate is a thin bismaleimide-triazine (BT) laminate carrying the LPDDR5X stack. The organic RDL interposer over the SoC routes the PoP signals around the die and carries possible dummy thermal copper pillars. The package substrate, a thicker Ajinomoto Build-up Film (ABF) build-up over a BT core, fans the flip-chip bumps out to BGA pitch and embeds the power planes. The whole stack is organic. The only silicon is the SoC and the LPDDR5X dies; there is no silicon interposer. Keeping it all-organic brings the package’s coefficient of thermal expansion (CTE) close to the PCB’s, reducing board-level warpage, and avoids the cost of a silicon interposer the SoC’s bandwidth does not need. In an iPoP stack, the memory package connects to the organic RDL interposer through an array of solder bumps. Underfill fills the gap around those bumps, adding stiffness and protecting the joints from mechanical stress. The Pro and Pro Max variants differ here, which we cover behind the paywall. The die shot and architecture tell us how Huawei allocated its silicon budget. The process tells us what SMIC can manufacture. We use the Helio G99 as the process reference for TSMC N6. Both SMIC N+3 and TSMC N6 are evolutions of previous 7 nm-class nodes. We used targeted TEM cross-sections through logic and memory regions, imaged in both fin-cut and gate-cut directions. Each cross-section caption gives its horizontal field width (HFW), the real width of the imaged area. We start at the transistor fins, then move up through standard cells, local interconnect, and SRAM. SMIC has not overtaken Intel or TSMC. It uses aggressive DUV scaling and DTCO to reach N6-class density, but that density doesn’t translate into comparable performance and efficiency, for two reasons: the node gap to leading-edge nodes, and Huawei’s core designs. Fin Profile One of the most important knobs in a FinFET process is the fin profile: the shape of an individual fin and the channel where current passes from source to drain. The ideal fin is tall, narrow, and nearly vertical. A taller fin increases effective channel width, while a narrower fin improves electrostatic control by thinning the body the gate must control. Push either too far, and the process pays for it: weaker drive current, fragile fins, taper, footing and line-edge variation that hit yield and device variability. The Intel 22 nm, 14 nm, and 10 nm fin cross-sections show how FinFET nodes have improved over time. 22 nm fins were a first-generation structure, relatively short, wide and strongly tapered. The shape limits current density and reduces gate control uniformity across the height of the fin. At 14 nm and 10 nm, Intel pushed the fins taller and narrower while also making the sidewalls more vertical. Rather than shrinking the device, these changes increase the effective channel width per fin and improve electrostatic control. The trade-off is that taller fins at tighter pitches are much more difficult to manufacture. Now, let’s compare the Helio G99 on TSMC N6 with the Kirin 9030 on SMIC N+3. Both processes are in the same class, with fin pitch of 30-32 nm on N+3 and 34 nm in our N6 cross-section. The pitch for N6 is especially interesting as N7’s HD library is generally listed with a 33 nm fin pitch, and N6 did not shrink pitches directly. Its density gains came from DTCO instead of tighter pitches. The 34 nm pitch was stable across our sampled region and serves more as a comparison against the SMIC N+3 we have not investigated further. Pinning down N+3’s fin patterning scheme takes more than one core unit. The CPU cores show a dense ~32 nm pitch, with the pitch between N-P fin pairs alternating between 78 and 88 nm. Logic alone may be consistent with dual-pitch mandrels of 120 and 110 nm, but this is a complex and unusual approach. Combining the pitch from the the 8T SRAM, which has more complex repeat unit, with the CPU core sequence allows us to reverse engineer the patterning steps with more confidence. As both the logic and SRAM should share the same base grid, a single CD mandrel lithography pattern with 128 nm pitch undergoing SAQP produces a die-wide ~32 nm grid (128 nm/4), which supports the pitch sequencing seen in both logic and SRAM cells. In the sampled cross-sections, N+3 shows a taller, narrower, higher-aspect-ratio fin than N6. The measured fin aspect ratio is ~9.5:1 on N+3 versus 7.8:1 on N6. N+3 also shows less top rounding, with an estimated radius of ~2 nm, compared with 2.8 nm on N6. Even though the fin widths differ, the ratio of top rounding to fin width tells the same story, with N+3 at 0.37 and N6 at 0.44. In a geometric sense, lower is better; a perfectly rectangular fin would have no top-rounding penalty. These are single-digit-nanometer features measured from a handful of cuts, so treat the absolute numbers as approximate. The important result is the relative gap: N+3’s fins are consistently taller, narrower and less rounded than N6’s. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Interested in joining us on this ride and think you can be a difference maker? Check out our Careers page. Standard Cell A standard cell is the basic building block of chip layout: a fixed-height row pairing one NMOS and one PMOS transistor that share a gate, tiled in a grid to build logic blocks. The key dimensions are contacted gate pitch (CGP), cell height (CH), fin count, and the lower-metal routing grid. To measure density, we use the Bohr metric: a weighted average of NAND2 gate area (60%) and scan flip-flop area (40%). This represents a realistic mix of combinational and sequential logic. This metric has its limitations, especially for complex cell layouts like TSMC’s FinFLEX, which alternates cells with different fin counts. Even so, it is the best metric for a pure process-level comparison. Another important measurement is the fin pitch; it refers to the distance between two fins of the same transistor. In a FinFET process, multiple fins are used in each transistor to increase the drive current and thus performance. TSMC N6 ships both a high-density (HD) library with 2 PMOS and 2 NMOS fins per cell, and a high-performance (HP) library with 3 of each. More fins under the shared gate mean more effective channel width. HP cells switch harder at the cost of area. Designers mix the two on a die, primarily spending HP cells on timing-critical paths, and matching their PPA targets. In the Cortex-A55 core of the Helio G99, we found a cell height of 240 nm for the HD cell. MediaTek has used HD cells in the G99 to minimize die size and thus cost. As an SoC for budget smartphones at ~$100, this is essential. By contrast, we found only one library in the Kirin 9030, with 2 NMOS and 2 PMOS fins. This suggests a narrower library strategy than TSMC N6, where both HD and HP libraries are widely used. This likely reflects the smaller customer base and the more constrained domestic design and electronic design automation (EDA) ecosystem. In all three CPU cores of the Kirin 9030, we found cell heights of 228 nm, 5% smaller than on N6. This is also a reduction of 9.5% over SMIC N+2’s cell height of 252 nm. SMIC N+3 and TSMC N6’s HD library both feature a CGP of 57 nm. For SMIC, this is a 9.5% shrink over N+2. In the past, CGP and cell height alone may have been enough to compare transistor density. Now, however, we must consider scaling boosters and DTCO as well. SMIC’s density gain does not come from EUV. It comes from using every available DTCO booster aggressively. First is fin depopulation: reducing the number of NMOS and PMOS fins in each cell. The first FinFET nodes started with 3 or 4 fins for each transistor. SMIC N+3 and TSMC N6 HD both use only 2 fins per transistor, trading drive strength for density. Next is contact over active gate (COAG). By landing the gate contact directly over the active gate, instead of out over the isolation region, the cell height drops. N+3 integrates COAG while N6 does not. Our N+3 gate-cut cross-sections indicate COAG, with the gate contact sitting over the active region, while N6 shows an off-gate contact. Last is single diffusion break (SDB). Diffusion breaks are inserted between cells in the same row to provide electrical isolation, but they also introduce local layout effects (LLE), layout-dependent shifts in electrical characteristics. In the past, a double diffusion break was used, consuming the space of two CGPs. SMIC N+3 and TSMC N6 instead use SDB, saving area but increasing LLE sensitivity. This must be controlled at the process level and accurately modeled in the process design kit (PDK) so that EDA tools can account for it. Overall, SMIC N+3 has a transistor density of 113.4 MTr/mm², slightly above TSMC N6 at 107.7 MTr/mm². Even without EUV, SMIC has achieved density beyond TSMC’s mature N6 node which utilizes EUV. Metal Stack The smallest critical dimension in the teardown is M0; SMIC N+3 uses a 32.5 nm local metal pitch. That is smaller than the 36 nm M0 pitch on Intel 18A in Panther Lake. However, this does not mean that SMIC has a better process than Intel 18A or TSMC N3P. M0 is a local intra-cell routing layer. Its usefulness depends on the full interconnect stack: M1 and M2 pitch, track count, via and line resistance, design rules, mask count, overlay control, and routing flexibility. The 32.5 nm M0 is consistent with self-aligned quadruple patterning (SAQP), whose four-population line-width loading we read coarsely as alternating widths of 21.5 to 24 nm; M1 and M2, at 38 and 40 nm, are consistent with self-aligned double patterning (SADP), a single A/B split. On TSMC N6, M0, M2, and M3 sit at a relaxed ~40 nm and are consistent with SADP-class double patterning, with no need for quadruple patterning. That said, we measure M2 for example at ~43 nm, likely inflated by sparse routing. We do not assign any specific layer to EUV from our cross-sections; the distinction we can draw is double versus quadruple patterning, not lithography wavelength. Transistor-level density in the front-end-of-line (FEOL) sets an upper bound, but the design is ultimately limited by what the interconnect stack can route. The lowest metals are the most important for standard-cell density, but the semi-global and global layers determine how usable that density is at the block and chip level. Two axes are commonly used for chip cross-sections: the fin-cut and the gate-cut. The micrograph above is a fin-cut and shows metals 0 through 3. This axis lets us see the even-numbered metals, with M0 right above the fins. There are two kinds of M0 lines. The first are the power rails; these are wide wires for the VDD and VSS running horizontally at the top and bottom edges of each standard cell. The wide wires measure 55 nm across, more than double the other M0 lines. Their width minimizes resistance and reduces IR drop. The second kind are intra-cell wires, short segments within the cell that connect terminals to M1. These have alternating widths between 21.5 and 24 nm. The M0 pitch is 32.5 nm, a 19% reduction versus N+2 and N6. At this pitch, DUV patterning requires more aggressive multi-patterning, increasing mask count, overlay sensitivity, process complexity and cost. M0 is below what a single DUV-defined spacer (SADP) can resolve, so SMIC cascades a second spacer step (SAQP). The cross-section reflects the cost: the M0 trenches are visibly more re-entrant (narrower at the bottom than the top) than M1 or M2 on the same chip and carry a bright barrier-rich foot where the trench meets the etch-stop layer. That shape is partly the intended damascene profile, as a slightly narrow bottom helps void-free copper fill, but its magnitude at M0 is driven by the tight pitch and the higher trench aspect ratio. Intel 18A supports an M0 pitch of 32 nm, although Panther Lake has only shipped with a looser 36 nm pitch. This is due to Intel’s heavy usage of HP libraries. Among leading-edge nodes, 18A has the loosest M0 pitches due to PowerVia. With power routing moving to the backside, congestion is reduced, and the entire front-side metal stack can be used for signal routing. M2 is the first true inter-cell routing layer. It runs horizontally like M0 but spans across multiple cells to carry block-level signals. The M2 pitch sets the cell’s track height – the number of M2 tracks that fit between the VDD and VSS rails, defining what the library calls a 6-track or 7.5-track cell. This layer is the most important, limiting the routing of entire blocks. SMIC N+3 features a 5.7-track cell. The M2 pitch is 40 nm, a 5% decrease over N+2 and the same as N6. This shrink keeps the pitch at the edge of what is possible with double patterning. Future nodes will need to increase the number of masks for M2 as reducing the number of tracks is much harder due to the limitations in routing. The micrograph above is in the perpendicular direction, the gate-cut, and shows metals 0 through 4. This allows us to see and measure the odd-numbered vertical metal layers. The M1 pitch is 38 nm, 9.5% less than N+2 and 33% less than N6. The M1-to-gate ratio matters because it sets local routing flexibility. N+2 and N+3 use a 3:2 ratio, while N6 uses a 1:1 ratio, explaining the huge differences in M1 pitch. The more M1 lines there are compared with the gates, the more flexibility there is for power and signal crossing within the cell. Routing flexibility enables more complex and better cells. Clean fractional ratios are also preferred as a grid is periodic and improves layouts. The 3:2 ratio gives SMIC more local routing flexibility than a strict 1:1 grid, but it also complicates layout and patterning. This is a DTCO choice, with SMIC increasing process complexity to recover density and routability without EUV. This 3:2 ratio is not very popular in the leading-edge nodes. TSMC has only used it on N7+, the N5 family, and the short-lived N3(B). They have switched back to a 1:1 ratio for N3E. Intel has only used it on the 10 nm/Intel 7 family, with Intel 4, 3 and 18A all using a 1:1 ratio. Samsung is the only one still using a 3:2 ratio at the leading edge, using it in the SF4 and SF3 families. It remains to be seen if SMIC will remain at a 3:2 ratio or move to a 1:1 ratio with its future nodes. The industry is still actively exploring these local-routing ratios. At VLSI 2026, imec will be presenting work on even higher ratios, including a 2:1 scheme that can reduce area by up to 14%. We will be covering the conference in a future newsletter article. Subscribe We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Interested in joining us on this ride and think you can be a difference maker? Check out our Careers page. The final local interconnect layer for N+3 is M3, with a pitch of 44 nm. The M3 pitch is the same as on N+2 and 10% larger than on N6. The semi-global layers carry the majority of block-level signal routing. They have a coarser pitch than the lower local layers. On leading-edge nodes, they are designed to sit at the limit of DUV single patterning. M4 through M11 pitches were found divided between 80–82 nm (M4–M6), 128 nm (M7–M10), and 148 nm (M11). Given limited sampling, it is possible these are divided further in dense routing areas. At the top are two giant metal layers, M12 and M13. These have kept the same pitches as N+2 at 1920 nm and 4600 nm respectively. While the lower layers’ pitches are generally fixed by the process and library, the upper layers vary much more in pitch and count, depending on the design. Even two smartphone SoCs on the same process can have wildly different metal stacks. The Helio G99 carries fewer routing layers, reaching coarse metal pitches of 850 nm by M9, while the larger and higher-performance Kirin 9030 keeps fine pitches until M11. SRAM At the leading edge, SRAM is much more difficult to scale than logic. TSMC’s latest nodes have seen little to no bitcell scaling, while logic still has more DTCO levers to pull. While looking for other logic libraries in the GPU compute units, we stumbled upon the SRAM. The most common type of SRAM has 6 transistors (6T), but this cell had 8 transistors (8T) instead. 8T SRAM adds two transistors to form a dedicated read port. Unlike a 6T cell, where reading disturbs the storage, the decoupled read port removes read-disturb, improving read stability and letting the cell be pushed harder for performance. At first glance, the cut looked like an unusual logic library, with each cell row having 3 fins of one polarity and 5 fins of another. The rows also alternated in orientation. Energy-dispersive X-ray spectroscopy (EDS) resolved our confusion. The cut had not landed on the GPU logic, but on the SRAM macro beside it. The unusual fin pattern was due to the SRAM library. We return to EDS in the process flow analysis behind the paywall. SRAM libraries are not like traditional logic libraries. Due to the unequal number of PMOS and NMOS transistors, they require specialized rules and layout libraries. They do not need the flexibility of logic libraries, so they are hyper-optimized for one purpose: dense, reliable memory. The SRAM cell we found is a 1:2:2-2:2 cell. This means there is 1 fin per pull-up (PU) PMOS transistor, and 2 fins per pull-down (PD) and pass-gate (PG) NMOS transistor. These 2 PU, 2 PD and 2 PG transistors would usually form a single 6T high-current cell (HCC). An 8T HCC adds a read-pull-down (RPD) and a read-pass-gate (RPG) NMOS transistor, each with two fins. We measured a cell height of 406 nm, which brings the bitcell size to 0.0463 µm². That is a theoretical peak density of 21.6 Mib/mm². We estimate that a 6T HCC would have a cell height of 292 nm and a size of 0.0337 µm². This is ~12% larger than a 6T HCC on Intel 3 and 4. We also estimate the 6T high-density cell (HDC) to have a cell height of 228 nm and a size of 0.0260 µm². This is coincidentally the same as the logic standard-cell height measured earlier. The estimate puts the cell near Samsung 7LPP/5LPP and slightly below TSMC N7/N6. That is a theoretical peak density of 38.5 Mib/mm². 6T HDC is arguably the most important cell as it is used for the largest caches in a chip, the L3 caches and system-level cache (SLC). Both the Kirin 9020 and 9030 have split the SLC into 4 banks to raise total SLC bandwidth. In the Kirin 9030, the SLC increased from 2 MiB to 3 MiB per bank. Correspondingly, the number of arrays within the bank also increased by 50%, from 16 to 24. Each array can store 128 KiB and forms an orderly pattern on the die shot. From the Kirin 9020 to the Kirin 9030, the area of a 128 KiB SLC array decreased from 0.0477 mm² to 0.0392 mm², an 18% shrink. The achieved density is 25.5 Mib/mm², 66% of the theoretical maximum. While the SLC was quite similar across both chips, the L3 has seen some major changes, particularly in terms of its layout. The total capacity also went up from 10 MiB to 12 MiB. Much like the SLC, the L3 is also split into 4 banks. In the Kirin 9020, an L3 bank consisted of 16× 128 KiB arrays and 16× 32 KiB arrays. However, an L3 bank in the Kirin 9030 instead consists of 48× 64 KiB arrays. In the Kirin 9020 L3, a 128 KiB array was 0.0513 mm² and a 32 KiB array was 0.0154 mm². The size of the 128 KiB array is different on the L3 and SLC as the assist circuitry for the two arrays differs depending on their purpose. In the Kirin 9030 L3, a 64 KiB array is 0.0210 mm². Although not a like-for-like comparison, normalized for capacity, it is 18% smaller than the 9020’s 128 KiB L3 array and 31% smaller than its 32 KiB L3 array. The achieved density is slightly lower than the SLC, at 23.8 Mib/mm², 62% of the theoretical maximum. Unlike the L3 and SLC, the prime cores’ private L2 cache uses a 2-bank design. As the prime cores’ L2 is latency-critical, it likely uses 6T HCC instead of 6T HDC. The 9020 has 16 arrays in each bank while the 9030 has 32. Each array has a capacity of 32 KiB. A 32 KiB array in the L2 shrank from 0.0171 mm² to 0.0142 mm², ~17% smaller. The density is 17.6 Mib/mm², ~59% of the theoretical maximum for 6T HCC. SRAM scaled well from N+2 to N+3, shrinking by ~19%, close to the theoretical logic shrink. The caveat is that N+2’s bitcells were unusually large, bigger than comparable 7 nm-class nodes, so part of the gain is catch-up rather than true scaling. With the insights from STEEL’s teardowns, we will be doing a deep dive into SRAM in a future newsletter article. Subscribe Everything above came out of a single STEEL teardown: die annotation, block-level area analysis and TEM cross-sections through logic and SRAM. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Future Roadmap The same cross-sections that pin down N+3 also show where SMIC can go next. Although N+3 is already close to the practical limits of DUV multi-patterning in several layers, SMIC still has a few scaling levers left. A theoretical N+4 would likely start with cell height. N+3 uses 5 M0 tracks between its power rails. Moving to 4 M0 tracks, as on SMIC N+2 and TSMC N6, could reduce cell height by roughly 15%. The routing grid is only one side of the shrink; the front end also must fit into the smaller cell. One possible FEOL lever is reducing the p-to-n isolation spacing from two diffusion grid units to one. Intel used this scaling booster on Intel 4, and TSMC did so on its N3 family. This path trades layout flexibility for density. Fewer M0 tracks reduce local routing resources, while tighter p-to-n spacing raises integration and design-rule difficulty. M2 is also constrained by the cell height shrink. For SMIC to maintain a ~5.7-track cell, M2 would need to move toward ~35 nm. That would move another layer into SAQP territory. SMIC could also reduce the CGP from 57 nm to 54 nm. Intel reached a similar CGP on Intel 10 nm/Intel 7 without EUV. The local interconnect is also tougher. If SMIC keeps the 3:2 M1-to-gate ratio, M1 would need to shrink to 36 nm and would likely require SAQP as well. If SMIC moves to a 1:1 ratio, M1 could relax to 54 nm, but it would give up routing flexibility. Under this theoretical path, we estimate that SMIC N+4 could reach a cell height of 198 nm and a CGP of 54 nm, implying a Bohr density of 137.8 MTr/mm², on par with TSMC N5 or Samsung SF4. However, the difficulty is cumulative. Each step is individually plausible, but together they make N+4 harder than the transition from N+2 to N+3. It will likely take longer, cost more, and carry less process margin. A theoretical N+5 would require a larger integration shift. One possible path is backside contacts (BSCon), moving power routing and source/drain contacts to the backside, which would reduce front-side routing pressure and enable another reduction in cell height. The front-side metal pitches could relax to reduce the process complexity. M0 would likely relax slightly to ~34 nm, and M2 and M4 pitches could relax further. CGP is unlikely to shrink much further. Even with EUV, 48 nm has been the practical limit for yield and process control. This approach would allow N+5’s cell height to fall to 170 nm and its CGP to 53 nm. This implies a Bohr density of 163.6 MTr/mm², on par with Intel 18A’s HP library. However, this would not make N+5 cost-competitive with the leading edge. It would reach a similar density through a much more expensive route. The integration difficulty rises sharply, with new process flows for backside alignment, wafer thinning, contact reveal, and backside metallization. Past this point, standard density and interconnect scaling become increasingly unattractive. That is where Huawei’s roadmap stops looking like a normal foundry roadmap and starts looking like a packaging roadmap. At ISCAS 2026, Huawei unveiled its tau (τ) scaling law, reframing process scaling in the time domain. τ is the time cost of data movement and processing: switching delays in transistors, RC signal propagation delays in circuits, compute, memory, and networking latency. Outside Huawei’s terminology, this is called system-technology co-optimization. This is Huawei’s answer to its lack of EUV lithography. Without EUV, planar density cannot keep pace with TSMC, Intel, or Samsung. If transistor density cannot shrink further, Huawei’s alternative is to shorten wires, reduce buffering, and stack logic vertically. “LogicFolding”, Huawei’s implementation of this new scaling idea, is, in practice, an aggressive 3D stacking approach. AMD V-Cache places SRAM above or below a CPU die. AMD’s MI350X places active interposer dies (AIDs) underneath accelerator and compute dies (XCDs), with the AIDs handling cache, IO interfaces, the network-on-chip (NoC) and embedded metal-insulator-metal (MIM) capacitors. With LogicFolding, parts of the same logic block are split across multiple active dies bonded face-to-face at ultra-fine pitch. This allows Huawei to shorten some critical paths and reduce buffer overhead, not merely add cache capacity or offload the IO and interconnect. Shortening wires is where the higher clocks come from. A large share of a modern core’s delay and energy budget goes into driving long interconnects and the repeater buffers along them. LogicFolding distributes a block’s critical-path gates across multiple stacked tiers bonded at a very fine pitch, so the bond interface behaves like an additional metal layer and the longest paths get shorter. That is how Huawei expects to recover frequency and efficiency it cannot get from the process alone. Huawei’s roadmap shows its intent. Prime core frequency is targeted to rise from 2.75 GHz in the Kirin 9030 to roughly 5 GHz by 2031, far beyond what planar scaling alone could deliver. Prime cores with 3.1 and 3.39 GHz clocks are being tested in its labs, although their power consumption is unknown. Beyond that, chips are in the design, simulation or pathfinding phase, meaning the frequencies are targets. However, the direction matters more: LogicFolding also helps with performance, not just density. The catch is that Huawei’s density claim is not directly comparable to foundry densities. A stacked design can report more transistors per package footprint by adding active layers, even if each patterned die remains well behind TSMC or Intel in front-end density. This is how Huawei can claim to reach foundry 14A-equivalent density by 2031. This is not a like-for-like foundry comparison, with Huawei using stacked logic and measuring density per package footprint. On a normalized Bohr-density basis, SMIC N+3 is ~114 MTr/mm², 38% less than Intel 18A’s HD library. Huawei’s 3D roadmap closes the gap by stacking active logic, reaching 215 MTr/mm² by 2030. In 2031, the roadmap density jumps to 295 MTr/mm², implying either a third active layer, partial EUV insertion or aggressive planar DUV scaling. Huawei’s methodology makes other foundries look much denser as well. Applying it to AMD’s MI450X with an N2 top die on an N3P base die yields a theoretical density of 460.2 MTr/mm² in 2026, compared with Huawei’s 295 MTr/mm² in 2031. This Kirin 9030 does not use LogicFolding, remaining in a conventional mobile SoC package. Instead, it forms the baseline for how far Huawei and SMIC can push planar scaling. Future teardowns of Kirin and Ascend chips will show both planar logic density and Huawei’s hybrid bonding solutions. Export controls changed China’s optimization problem rather than ending it. EUV restrictions raised the cost and complexity of leading-edge manufacturing without freezing it. SMIC reaches N6-class logic density through DUV immersion, SAQP and DTCO, while Huawei shifts more of the burden onto architecture, packaging and system-level integration. Future nodes will be tougher. N+3 still had room to tighten local metals and reduce cell height and CGP. Further scaling without EUV leaves fewer levers. More aggressive multi-patterning adds masks and overlay error. SMIC can keep pushing DUV, but each step will get more expensive and less forgiving. The design side is just as critical. Huawei had domestic EDA tools and flows before the Kirin 9030, with the Kirin 9000s, 9010 and 9020 making that clear. Huawei was able to ship multiple consumer SoCs on SMIC N+2 and N+3 while cut off from the Western EDA stack. US export controls restricted EDA tools for advanced chips in 2022 but did not target tools for more mature chips. In 2025, the US government briefly placed much broader restrictions on EDA software from Synopsys, Cadence, and others, before lifting them less than two months later as part of a trade deal tied to rare earths. Huawei has been unable to access those tools because it remains on a US trade blacklist. That forced Huawei, SMIC and Chinese academic institutions to build their own tools and flows. Researchers at Peking University recently announced a prototype EDA tool for Huawei’s LogicFolding architecture, which requires a new flow to handle the multilayer layout and floorplan. This is not the same as replacing the full Synopsys or Cadence stack, but it shows where domestic EDA is headed: toward tighter co-optimization between architecture, process and packaging. These advances are also diffusing into the Chinese ecosystem. SMIC is licensing its N+2 and N+3 processes to HLMC/Hua Hong at the government’s direction rather than by choice. If the same process learning feeds into Ascend accelerators for AI training and inference, the choke point shifts from one named fab to an ecosystem. Alibaba’s T-Head silicon arm and Cambricon, a Chinese AI chip designer that is expected to supply ByteDance, could also be major beneficiaries. Sanctions aimed at SMIC alone become less effective once the manufacturing knowledge has spread to other fabs and design houses. China is not closing the gap with Intel, Samsung and TSMC. The teardown shows the opposite in several places: no EUV, no backside power, higher process complexity, and visible trade-offs. But China is still advancing. If domestic chips become good enough for phones, inference, networking and security-sensitive workloads, they can matter strategically without matching TSMC at the leading edge. Behind the paywall, we show what else STEEL can do, with material and process flow analysis of SMIC N+3, and analysis of the Kirin 9030 package. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline, access the full Kirin 9030 and SMIC N+3 analysis or to commission a custom teardown, contact sales@semianalysis.com.
Brennan seeks to 'correct matters' over 12-week ban
The solicitor of Dublin senior football manager Ger Brennan says his client has concerns "a consistent and equitable approach is unfortunately not being applied to every team, player and manager" following his well-documented ban and wishes to "correct certain matters now brought into the public domain".
Riverhead Town approves eminent domain to seize Long Island Science Center
In a 3-1 vote, the Riverhead Town Board approved a resolution to go forward with eminent domain proceedings to acquire the Long Island Science Center.
Riverhead moves to condemn science center property
The Riverhead Town Board voted to adopt findings allowing eminent domain proceedings for 111 E. Main St., the planned Long Island Science Center site.
Why a surge of election-related websites could spell rising cyber threats for the midterms
A new report, first reported by PBS News, warns that November’s midterm elections in the United States will drive “elevated” cyber threats to political organizations, fundraising and media platforms, and that some of the groundwork for election misinformation and disinformation likely is already being laid. Check Point, a cyber security company, found that in January of this year, approximately 1,300 newly registered domains contained the keyword “election,” and approximately 2,957 contained “vote.” Registering website domains
Escaping the Heat? The Politics and Problems of Orbital Data Centers
What happens when digital systems outgrow the Earth that sustains them? Computing has always consumed energy and water, but the growing ambitions of the AI industry are pushing demand to an unprecedented scale. As pressures mount, data centers in orbit around the Earth have been pitched as a solution. But space is no escape, and what is framed as a technical fix risks entrenching digital dependence in an increasingly militarized, fragile, and crisis-prone environment. Orbital data centers simply relocate critical infrastructure into an already contested domain where the boundaries between civilian and military systems blur, satellites become strategic targets, and systemic disruption becomes a tool of coercion.
Microsoft: Domain Controller lookup may fail on Windows Server 2016
Microsoft has confirmed a new known issue affecting Windows Server 2016 systems that causes domain controller lookups to fail after installing the KB5087537 May 2026 security update.
KernelScript: A Programming Language For Kernel Customization & App Optimizations
Multikernel Technologies Inc has been working on a multi-kernel architecture for the Linux kernel while in addition to that they have been developing KernelScript as a domain-specific language for carrying out Linux kernel customizations and app-specific optimizations.
Apple registers new 'gen AI' subdomain ahead of next month's WWDC keynote
Apple has just registered a new subdomain record ahead of WWDC: genai.apple.com. All signs point to WWDC 2026 being Apple’s...
Apple Preparing New 'Gen AI' Website Ahead of WWDC
Apple is readying the subdomain genai.apple.com, according to MacRumors contributor Aaron Perris, but it does not yet lead to a live web page. This comes a few weeks ahead of Apple's annual developers conference WWDC, where the company has promised to announce "AI advancements" across its software platforms. Apple's website already has an Apple Intelligence page, so it is unclear what the company's plans are for genai.apple.com at this time.
Riverhead Board Unswayed By Public Objections to Taking of Science Center Property
The Riverhead Town Board seemed unmoved by hours of comment at a public hearing Wednesday evening on its plan to take the property adjacent to the Town Square owned by the Long Island Science Center through eminent domain. In 2020, the Science Center had proposed to build a new 24,000-square-foot, $13.5 million attraction at the
LTM Has Issued an Offer to Acquire Randstad’s Technology and Consulting Services Business in Europe and Australia to Scale Domain-Driven Solutions and AI Services
LTM has issued an offer to acquire Randstad’s Technology and Consulting Services business in Europe and Australia.
Eminent domain hearing on science center property turns contentious
Riverhead officials defended a proposed eminent domain taking of the Long Island Science Center property during a contentious public hearing Wednesday night.
Riverhead board hears pleas to save site for planned Long Island Science Center
Residents questioned the town's plans to use eminent domain to take control of the property.
New MatterChat Model Helps AI to ‘See’ the Language of Science
From writing emails to generating computer code, much of the artificial intelligence prevalent in our daily lives has succeeded by mastering one domain: text. However, this leaves a major blind spot in the physical sciences, where models depend on the high-resolution, three-dimensional data of the physical world, like the intricate lattice of atoms in a crystal. Delivering on the promise of using AI for science requires teaching these data-driven text models to seamlessly “talk to” physics-based models. Now, a new AI framework from Lawrence Berkeley National Laboratory (Berkeley Lab), called MatterChat, solves this problem by creating a specialized “bridge.” It connects the conversational power of a Large Language Model (LLM) with a physics-based AI that models “interatomic potentials”: the complex physical forces between atoms. The resulting system already significantly outperforms general-purpose AI tools like GPT-4 at predicting material properties, and the team hopes it can accelerate scientific discovery by serving as a robust research partner that provides grounded insights and generates step-by-step instructions for synthesizing novel materials. A paper describing this work was recently published in Nature Machine Intelligence. “Traditional simulations can provide the physical rigor required for materials science, yet their computational cost remains prohibitive for high-throughput screening. Conversely, while LLMs excel at rapid knowledge synthesis, they inherently lack the ‘structural vision’ to interpret materials directly from their underlying atomic coordinates,” said Yingheng Tang, a postdoctoral researcher in Berkeley Lab’s Applied Math and Computational Research Division (AMCR) and lead author on the paper. “MatterChat was built to solve this dilemma, empowering LLMs with a structural ‘vision’ that allows researchers to leverage their full potential for solving complex, real-world materials challenges.” Empowering language models to solve complex challenges in materials science To build MatterChat, the Berkeley Lab team drew inspiration from technologies like Vision Question Answering (VQA) and Text-to-Image (T2I) generation. In these tasks, AI must translate high-level text concepts into visual images, or vice versa. Doing so requires developers to build tools that “bridge” two fundamentally different forms of data. The researchers adapted this concept to the physical sciences. With MatterChat, they created a “bridge model” that successfully connects an LLM’s general knowledge with the deep understanding of the atomic-scale world encoded in scientific interatomic potentials. Until now, researchers using LLMs to solve materials problems usually had to feed them raw data files as if they were just strings of text. It’s like asking an AI to understand a complex 3D engine based only on a parts list: the LLM can read the names, but it can’t “see” how the atoms fit together in space. MatterChat solves this by training a specialized AI bridge model, pre-trained on millions of crystal structures and an LLM, to align the LLM’s representation of the world with the interatomic potential’s representation of the world. The bridge model can translate physical insights into a format the LLM can actually understand. By giving the LLM these “scientific eyes”— a scientific “inductive bias” in the terminology of AI — the Berkeley Lab team has transformed it into a robust research tool capable of providing grounded scientific insights into complex materials challenges, such as predicting thermal stability or analyzing electronic band gaps. “We think of atoms as living in a physical space, but from a machine learning perspective, they are just vectors living in some very non-trivially structured manifold in a high-dimensional Euclidean space; and, of course, the same is true for the sentences and paragraphs that we use to express our ideas about those atoms,” said co-author Michael Mahoney, Berkeley Lab’s Scientific Data Division (SDD) AI Initiative Research Lead. “The bridge model basically gets those two structures to ‘talk with’ each other.” As a proof-of-concept of this general approach, the team trained their bridge model on a dataset curated by pairing nearly 143,000 stable atomic structures from the Materials Project with their corresponding physical properties. This training data was automatically assembled using the Materials Project’s API and deliberately enriched with properties fundamental to microelectronics design — like formation energy and bandgap — allowing MatterChat to learn the complex patterns connecting a material’s atomic blueprint to its functional performance. To validate their model, the researchers benchmarked MatterChat against a suite of other AI systems, from general-purpose LLMs to other specialized scientific AI methods. The results show that MatterChat consistently outperformed its competitors across a range of tasks. The model was more accurate in classifying material types and demonstrated superior precision in predicting numerical properties. For example, it excelled at predicting a material’s bandgap, a property critical for designing new electronics from high-capacity energy storage to next-generation computer chips. “Our design is significantly more efficient because we don’t have to build a massive AI model from the ground up,” said co-author Zhi (Jackie) Yao, a research scientist in Berkeley Lab’s AMCR. “Instead, we take two powerful, pre-trained models — a structural encoder for materials physics and an open-source LLM — and use them off-the-shelf. The only component we actually train is the lightweight ‘bridge model’ that translates between them. It’s the difference between building an entire car factory and simply designing a smart adapter that connects a world-class engine to a world-class navigation system. This approach is not only computationally efficient, but also makes the system modular, so we can easily upgrade components or adapt the bridge for other scientific domains in the future.” Crucially, this modular design highlights exactly how institutions like Berkeley Lab and the Department of Energy are carving out a highly valuable niche in the booming AI landscape. Rather than competing with Silicon Valley tech giants to build ever-larger language models from scratch, the lab is focusing on the specialized connective tissue that makes commercial AI useful for hardcore science. Because the bridge model approach underlying MatterChat is forward-compatible, it is perfectly positioned to leverage these parallel tracks of innovation. As Mahoney pointed out, “We expect that industry will continue to develop improved LLMs, and we expect domain scientists and facilities will continue to generate new data. An important part of scientific machine learning is not simply to solve problems on today’s data, but instead to develop general methods that will be forward-compatible with orders of magnitude more data, whether from scientific domains or from LLMs.” According to Yao, the MatterChat project, which was initially developed and enhanced with funding from a Berkeley Lab Laboratory Directed Research & Development (LDRD) Program, will now expand its capabilities. In a collaboration with Fermilab, MatterChat is already contributing to a U.S. Department of Energy Genesis Mission project — called Accelerating eXtreme Environment Specs-to-Silicon (AXESS) — that aims to speed up the development of next-generation, high-speed, radiation-hardened detectors for challenging particle physics experiments by using advanced 3D integrated circuits (chiplets) and AI-driven data analysis. In addition to the LDRD support, the team also credits supercomputing resources at the National Energy Research Scientific Computing Center (NERSC), located at Berkeley Lab, with MatterChat’s success. “We are incredibly grateful to NERSC; this research simply would not have happened without access to the Perlmutter supercomputer through their AI for Science program,” said Tang. Wenbin Xu, a NERSC postdoctoral fellow at the time, was also a major co-author of the work, as was Benjamin Erichson, a research scientist in Berkeley Lab’s SDD, highlighting the benefits of AMCR-SDD collaboration on AI for science. ### Lawrence Berkeley National Laboratory (Berkeley Lab) is committed to groundbreaking research focused on discovery science and solutions for abundant and reliable energy supplies. The lab’s expertise spans materials, chemistry, physics, biology, earth and environmental science, mathematics, and computing. Researchers from around the world rely on the lab’s world-class scientific facilities for their own pioneering research. Founded in 1931 on the belief that the biggest problems are best addressed by teams, Berkeley Lab and its scientists have been recognized with 17 Nobel Prizes. Berkeley Lab is a multiprogram national laboratory managed by the University of California for the U.S. Department of Energy’s Office of Science. DOE’s Office of Science is the single largest supporter of basic research in the physical sciences in the United States, and is working to address some of the most pressing challenges of our time. For more information, please visit energy.gov/science.
Decoding chirality at the nanoscale with momentum-space polarimetry
Light: Science & Applications - Schematic illustration of Fourier-domain Mueller matrix polarimetry probing light-matter interactions in gammadion nanostructures, and enabling extraction of...
Can people catch infections from plants?
Catching diseases from plants may not just be the domain of science fiction.
NEC Completes Acquisition of CSG Systems; Netcracker to Lead Combined Business
NEC and Netcracker have completed the acquisition of CSG Systems, resulting in a stronger global software business across a number of key domains.
Soil science reimagined: from farmland to the final frontier
Soil science is undergoing a profound transformation, evolving from its traditional focus on agriculture to a multidimensional discipline addressing some of the most urgent challenges of our time. A new perspective calls for expanding the boundaries of soil science to include nontraditional domains—such as climate regulation, urban resilience, forensic investigations, cultural heritage protection, and extraterrestrial exploration. The study proposes a systems-based framework that recognizes so
Mark Cuban says AI's 'biggest challenge' for businesses is consistency
The billionaire wrote on X that employees with a lot of domain expertise can capitalize on AI's "biggest problem."
MIT scientists finally reveal the hidden structure of a mysterious high-tech material
For decades, relaxor ferroelectrics have powered everything from medical ultrasounds to sonar systems, yet their inner atomic structure remained a mystery—until now. Researchers have finally mapped their three-dimensional structure in unprecedented detail, uncovering hidden patterns in how electric charges are arranged at the nanoscale. The breakthrough not only challenges long-standing assumptions about how these materials behave but also allows scientists to refine the models used to design them.
Breath of the Wild 'Remake' Has Us Hyped For Next-Gen Zelda
Zelda: Breath of the Wild looks more gorgeous than ever thanks to this 'remake'
Bug of the year (so far)? Nasty cPanel vulnerability probably exploited as a 0-day
: Emergency patches out now for those managing the millions of domains assumed to be affected
Brain Health Across the Life Span: A Framework for Future Studies
This Scientific Statement focuses on the role of nonvascular physical and psychological factors that impact brain health, which is described as the optimal functioning of the brain across cognitive, emotional and behavioral domains throughout life.
New study reveals how maze-like magnetic patterns form and evolve in materials
Maze magnetic domains in soft magnetic materials strongly influence energy loss in electric motors, particularly at high temperatures. However, existing models struggle to explain their complex, temperature-dependent behavior. To address this gap, researchers developed an entropy-extended Ginzburg-Landau model combined with data-driven analysis to study these structures. The approach reveals how entropy and energy interactions drive magnetization reversal and increasing domain complexity, providing new insights into magnetic energy-loss mechanisms.
Big Money Is Betting on Bagels
High-quality bagels were once the sole domain of a few major cities. Investors believe they can take the breakfast staple nationwide.
Riverhead moves to seize Long Island Science Center building by eminent domain
The center insists it has the resources to renovate the property and open soon.
Impatient Iowa landowners pressure Senate to hold eminent domain vote
Iowa landowners are putting pressure on Senate Republican leaders to hold a vote on legislation restricting eminent domain for carbon pipelines.
Zhou earns CAREER Award from the National Science Foundation
Through the early-career grant, Peipei Zhou will advance the scalable, verifiable co-design of heterogeneous reconfigurable computing systems, enabling domain experts to efficiently build next-generation customized AI and data-intensive applications, such as autonomous physical systems, adaptive intelligent agents, and advanced healthcare technologies.
MS Lawmakers Deliver Wins for Small Business, But More Work Remains
This year's session ended on Sunday, April 5.
Gemma 4 and what makes an open model succeed
Having written a lot of model release blog posts, there’s something much harder about reviewing open models when they drop relative to closed models, especially in 2026. In recent years, there were so few open models, so when Llama 3 was released most people were still doing research on Llama 2 and super happy to get an update. When Qwen 3 was released, the Llama 4 fiasco had just gone down, and a whole research community was emerging to study RL on Qwen 2.5 — it was a no brainer to upgrade. Today, when an open model releases, it’s competing with Qwen 3.5, Kimi K2.5, GLM 5, MiniMax M2.5, GPT-OSS, Arcee Large, Nemotron 3, Olmo 3, and others. The space is populated, but still feels full of hidden opportunity. The potential of open models feels like a dark matter, a potential we know is huge, but few clear recipes and examples for how to unlock it are out there. Agentic AI, OpenClaw, and everything brewing in that space is going to spur mass experimentation in open models to complement the likes of Claude and Codex, not replace them. Especially with open models, the benchmarks at release are an extremely incomplete story. In some ways this is exciting, as new open models have a much higher variance and ability to surprise, but it also points at some structural reasons that make building businesses and great AI experiences around open models harder than the closed alternatives. When a new Claude Opus or GPT drops, spending a few hours with them in my agentic workflows is genuinely a good vibe test. For open models, putting them through this test is a category error. Something else to be said about open models in the era of agents is that they get out of the debate of integration, harnesses, and tools and let us see close to the ground on what exactly is the ability of just a model. Of course, we can’t test some things like search abilities without some tool, but being able to measure exactly the pace of progress of the model alone is a welcome simplification to a systematically opaque AI space. Share The list of factors I’d use to assess a new open-weight model I’m considering investing in includes: Model performance (and size) — how this model performs on benchmarks I care about and how it compares to other models of a similar size. Country of origin — some businesses care deeply about provenance, and if a model was built in China or not. Model license — if a model needs legal approval for use, uptake will be slower at mid-sized and large companies. Tooling at release — many models release with half-broken, or at least substantially slower, implementations in popular software like vLLM, Transformers, SGLANG, etc due to pushing the envelope of architectures or tools. Model fine-tunability — how easy or hard it is to modify the given model to your use-case when you actually try and use it. The core problem is that some of these are immediately available at release, e.g. general performance, license, origin, etc. but others such as tooling take day(s) to week(s) to stabilize, and others are open research questions — with no group systematically monitoring fine-tunability. In the early era of open models, the days of Llama 2 or 3 and Qwen pre v3.5, the architectures were fairly simple and the models tended to work out of the box. Some of this was due to the extremely hard work of the Llama, Qwen, Mistral, etc. developer teams. Some is due to the new models being genuinely harder to work with. When it comes to something like Qwen 3.5 or Nemotron 3, with hybrid models (either gated delta net or mamba layers), the tooling is very rough at release. Things you would expect to “just work” often don’t. I’ve been following this area closely since we released Olmo Hybrid with a similar architecture, and Qwen 3.5 is just starting to work well in the various open-source tools that need to all play nice together for RL research. That’s 1.5 months after the release date! This is just to start really investing more into understanding the behavior of the models. Of course, others started working on these models sooner by investing more engineering resources or relying on partially closed software. The fully open and distributed ecosystem takes a long time to get going on some new models. All of this is lead-in for the most important question for open models — how easy is it to adapt to specific use-cases? This is a different problem for different model sizes. Large MoE open-weight models may be used by entities like Cursor who need complex capabilities in their domain, e.g. Composer 2 trained on Kimi K2.5. Other applications can be built on much smaller models, such as Chroma’s Context-1 model for agentic search, built on GPT-OSS 20B. The question of “which models are fine-tunable” is largely background knowledge known by engineers across the industry. There should be a thriving research area here to support the open ecosystem model. The first step is to understand characteristics of different base and post-trained models to understand what they look like. The second step is to tune pretraining recipes for open models so they’re more flexible. Interconnects AI is a reader-supported publication. Consider becoming a subscriber. Subscribe For The ATOM Project and other Interconnects endeavors, we’ve put in substantial effort to measuring adoption trends in the open ecosystem. Everything takes a long time to unfold after a model is first publicly available — and adaptability is why. What we know for sure now, when Qwen has been going from strength to strength with its releases, is that technical staff across the industry has gotten comfortable working with Qwen models. Countless research methods and datasets were made to work with Qwen. It’ll take patience for any other model family to get to this point — a patience I’m not sure many open model builders have. This takes us to Gemma 4, Google’s latest open models. Gemma 3 was released more than a year ago, in March of 2025, and is a bit underrated. Gemma 4 comes in 4 sizes for now, with a bigger, MoE model of over 100B total parameters rumored but not released yet. The models we have today come in sizes of ~5B dense, 8B dense, 26B total 4B active MoE, and 31B dense. I’m most excited that they’re finally adopting a standard Apache 2.0 open source license. This’ll massively boost adoption. The standard of better licenses for strong open-weight LLMs was set by mostly Chinese open model labs in the last 1-2 years, and now U.S. companies are following suit. I will personally be so happy if the horrible Llama licenses and Gemma terms of service were an ~18-month transient dynamic of the industry being nervous about releasing strong open models. The Gemma 4 scores look very solid, the small models have incredible benchmark scores (especially in general domains like LMArena) and the 31B model rivals the recent Qwen 3.5 27B, which is the leading member of that class. The ~30B size range is an important one, as it’s accessible both to researchers and to enterprises looking to deploy the model in real use-cases. Where the 7B model scale is the default for tinkering and research, a 30B model is the default for seeing if an open model can unlock substantial value in your specific workflow — a good mix of intelligence, low price, tractability for downstream training, etc. This takes us back to the above adoption criteria I mentioned for open models and the bigger question — do I think Gemma 4 will be an overwhelming success? Previous Gemma models have been plagued by tooling issues and poorer performance when being finetuned. Gemma 4’s success is going to be entirely determined by ease of use, to a point where a 5-10% swing on benchmarks wouldn’t matter at all. It’s strong enough, small enough, with the right license, and from the U.S., so many companies are going to slot it in. I’m cautiously optimistic that Gemma 4 is going to work better here. Winds are shifting for open models built in America. We saw GPT-OSS go through a bumpy launch to become an overwhelming success. There’s a collective energy around the likes of Reflection, Arcee, Nemotron, Gemma, Olmo, and peers that show substantial demand for building new stacks around open models. There’s capital to be spent on AI stacks across the economy by those who want more ownership of everything, including the model. After launching The ATOM Project 240 days ago, the conversation is shifting into the next stage. Summer of 2025 was a crisis moment where the U.S. AI scene realized it can’t wait and figure out open models after building AGI. The two markets will capture different areas and proceed in parallel. Now that more companies in the U.S. are releasing strong models, we need to improve the ecosystem so that these models are easy to use, understand, and build value around. It’s the hard work to build another inflection point in these adoption plots I’ve been updating consistently, but that’s the work to be done. Join me in it. More data coming soon! Here’s a sneak peek:
Science center pitches new plan; Riverhead eyes condemnation
LI Science Center representatives outlined a new phased plan for 111 E. Main St., but several Riverhead Town Board members remain skeptical as the town weighs eminent domain.
Labels, Logistics And Legacy: The New Business Of Old French Wine Families
Centuries‑old French domaines are redesigning labels, reshaping portfolios and rethinking exports so the next generation can thrive in the international wine market.
Riverhead may seize L.I. Science Center property amid delays
The Riverhead Town Board said if the Long Island Science Center doesn't fulfill its expansion plans, they may proceed with eminent domain.
Long Island Science Center faces renewed eminent domain threat from Riverhead
Town board members, exasperated at the lack of progress on renovations to the science center's Main Street facility, said they would give its leaders one more chance to make their pitch.
Quantum computers take a step into real materials science
An IBM quantum computer reproduced experimental signatures of real materials, according to a new preprint from IBM and researcher partners.
After teaming up with Sony Music Publishing to acquire Miranda Lambert catalog, Domain Capital closes $768M
SMP Nashville and Domain teamed up to acquire Miranda Lambert catalog in January…
Domain Capital Group Closes $768 Million In Commitments For Domain Entertainment Fund II
Domain Capital Group LLC, a private investment management firm, and its subsidiary Domain Capital [...]
Domain Capital Group Closes $768 Million in Commitments for Domain Entertainment Fund II
ATLANTA, March 25, 2026--Domain Capital Group LLC, a private investment management firm, and its subsidiary Domain Capital Advisors LLC, today announced the closing of $768 million in equity commitments for its second entertainment fund and its affiliates.
Exclusive | Domain Capital Raises $768 Million Fund to Tap Surging Entertainment Demand
The firm is expanding its entertainment investments with a new artist-management venture and financing agreements with major studios.
Apple takes aim at Google Workspace and Microsoft 365 with new hosted business email
The new Apple Business platform is expanding beyond device management. It now includes fully integrated email, calendar, and directory services for business domain.
Strengthening One Health Field Epidemiology Capacity in the WHO South-East Asia Region
Recent public health emergencies—including the COVID-19 pandemic, recurrent zoonotic disease outbreaks, and the high level of antimicrobial resistance—have underscored the urgent need for strong, multisectoral field epidemiology capacities. This reinforces the importance of a workforce equipped with One Health field epidemiology competencies. To address this need, WHO works with the Food and Agriculture Organization of the United Nations (FAO), the United Nations Environment Programme (UNEP), and the World Organisation for Animal Health (WOAH), as part of Quadripartite Alliance for One Health, to strengthen field epidemiology training programmes using a One Health approach.These efforts are aligned with WHO SEARO’s Strategic Framework for Action for Strengthening Surveillance, Risk Assessment and Field Epidemiology and the Regional Roadmap to Advance Field Epidemiology Capacities 2025–2029 emphasize workforce development, multisectoral collaboration, and enhanced preparedness for health emergencies. With funding from the Pandemic Fund, The Competency for One Health Field Epidemiology (COHFE) integration within Field Epidemiology Training Programmes (FETPs) or similar initiatives has been initiated in Bangladesh and India and is planned in Sri Lanka.BangladeshIn Bangladesh, COHFE is being adapted to strengthen the Field Epidemiology Training Programme, Bangladesh (FETP-B) Advanced programme. Initiated in July 2025 and led by the Institute of Epidemiology, Disease Control and Research (IEDCR), the process brought together stakeholders from human, animal, and environmental health sectors, academia, and laboratories.A Multisectoral Working Group (MWG) was established to guide implementation, conduct readiness assessments, and identify opportunities to institutionalize One Health collaboration. Through national multisectoral consultations and a competency prioritization workshop held in Dhaka in November 2025, stakeholders identified priority technical competencies for surveillance, outbreak investigation, data analysis, and risk assessment, alongside functional competencies related to leadership, coordination, and the laboratory–epidemiology interface. The process also surfaced systemic barriers—such as challenges in data sharing and limited joint investigations—enabling targeted recommendations. These outcomes are guiding curriculum revision, the introduction of One Health simulations and joint field exercises, and the development of a national multisectoral mentorship pool, with updated training materials expected to be implemented in the upcoming cohort.Figure 1. Competency prioritization involving multisectoral stakeholders“COHFE represents a significant step forward in operationalizing the One Health approach. The collaboration between national institutions and the Quadripartite partners is critical for building resilient systems to address complex health challenges in the region.”, Prof. (Dr) Tahmina Sirin, Director, Institute of Epidemiology, Disease Control and Research (IEDCR), Bangladesh.Aligning India’s One Health Training with COHFEIn India, the National Centre for Disease Control (NCDC) has strengthened One Health workforce development through its SectorConnect initiative. WHO supported a comprehensive competency mapping and curriculum review to align the Field Epidemiology Programme in One Health (FEP-OH) with all 14 COHFE domains. The review identified strong foundations while generating actionable recommendations to strengthen One Health learning outcomes, expand joint field-based learning, and enhance competency-based assessment. These improvements are informing programme refinement and phased scale-up across additional states.Figure 2. Strengthening learning outcomes for the SectorConnect FEP OH CurriculumThrough these efforts, WHO SEARO will continue to support countries to move from separate sector-based training toward an integrated, impact-driven One Health field epidemiology workforce capable of addressing complex health threats at human-animal-environment interface.ReferencesFood and Agriculture Organization of the United Nations, World Health Organization, & World Organisation for Animal Health. (2024). Competencies for One Health field epidemiology (COHFE) framework. https://www.who.int/publications/i/item/9789240080058World Health Organization. (2023). Strategic framework for action for strengthening surveillance, risk assessment and field epidemiology for health security threats in the WHO South-East Asia Region. WHO Regional Office for South-East Asia. https://www.who.int/publications/i/item/9789290210030World Health Organization. (2024). Regional roadmap to advance field epidemiology capacities in the WHO South-East Asia Region 2025–2029. WHO Regional Office for South-East Asia. https://www.who.int/publications/i/item/9789290229544
Perplexity AI CEO Aravind Srinivas agrees that Computer Science is gradually returning to the domain of…
Tech News News: Aravind Srinivas, CEO of Perplexity AI, added his weight to a growing conversation about what AI is doing to software engineering. On March 13, he quo.
Mandelson documents to be released after PMQs
Hundreds of papers relating to his appointment as ambassador to the US to be put into public domain today
VTA taking local trucking business to court after eminent domain dispute
VTA and a local truck dealership are headed to trial over VTA's use of eminent domain and a question of fair compensation. The agency has been acquiring land for its six-mile BART extension project, slated to open in 2036.
San Jose business sues VTA alleging revenue loss after it was moved using eminent domain
The Shop at CAC is opening second coworking space in South Market
The expansion by The Shop Workspace, owned by real estate firm Domain Cos., comes as demand for coworking space continues to grow.
MDA Space Launches 49North, a Canadian defence business delivering multi-domain and mission-critical capabilities
MDA Space (TSX: MDA), a trusted mission partner to the rapidly expanding global space industry, today formally launched 49North, a wholly-owned subsidiary of MDA Space exclusively focused on delivering secure, multi-domain C4ISR* and mission-critical capabilities for Canada's national defence priorities outside the space domain.
DIC Enters into a Partnership with Switzerland-Based Emerald to Accelerate Business Creation in the Physical AI Domain
TOKYO, February 16, 2026--DIC launches a $62M fund and partners with Emerald to accelerate Physical AI business, expanding global startup investment and collaboration.
Wyoming Small Business Owners Outline Top Priorities for 2026 Legislative Session
Right to Repair, stiffer penalties on theft, and eminent domain reform are among the top priorities for Wyoming small business owners
Illinois joins World Health Organization network, after Trump administration withdraws from group
Joining the World Health Organization’s Global Outbreak Alert and Response Network is the state’s latest move into an area that was previously the domain of the federal government, before the…
Politics: Bill restricting eminent domain undergoes changes in Iowa Senate
After similar legislation passed through the Iowa House of Representatives with relative ease last week, the Senate is considering a bill to distinctly limit the government’s authority to issue eminent
What happened in Iowa politics the week of Jan. 19-23
Listen to IPR's Katarina Sostaric and Meghan McKinney review the latest from the Iowa Capitol. In week two of the legislative session, lawmakers considered bills related to property tax relief, eminent domain and higher education.