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Sooners trying to get back in the game, trail 28-6 in third quarter
Mateer connects with Rocky Beers for Sooners first score: Mateer, still trying to shake off a tumultuous first half, connected with tight end Rocky Beers for a 17-yard score. OU
Withings and Function Integrate Connected Health Data with Comprehensive Lab Testing
Withings and Function have announced a partnership integrating connected health device measurements with comprehensive laboratory testing, enabling users to access daily biometric data and clinical results through both companies’ digital platforms. The integration aims to provide a more continuous view of individual health by combining routine measurements with periodic laboratory assessments.Under the agreement, Function members can synchronize data from Withings devices directly into the Function app, including body com...
Sponsored: 7 Simple Ways to Support Brain Health
Taking care of your brain can start with simple everyday choices. From staying active and getting quality sleep to managing stress and staying connected, these seven habits can help support
TUT royalty out on the town
Editor’s Note: Stay connected with more than 4,100 of our Northeast Michigan neighbors through the Up North Voice Mail, delivered FREE every Thursday morning. Sign up today! HOUGHTON LAKE – The Tip Up Town past Mayor Ted Calabrese and Marshall TJ Calabrese got together at Copper Kettle to strategize for the upcoming festival. Also pictured […]
How a Chicago educator uses food to teach science thanks to Pilot Light, a local chef-led nonprofit
The goal was to conduct a sensory exploration of honey samples native to Illinois, while hitting a core standard of food education: Food connects us and the food and the environment are interconnected.
Chase for Business Expands Its Integrated Digital Experience with Chase Payroll, Powered by Gusto
NEW YORK, October 07, 2026--Small business owners increasingly want the tools they use to run their businesses to work together and be managed in one place. In recent Chase research, 89% of business owners said they would find it valuable to manage payroll within the same platform they use for business banking and payments, highlighting growing demand for a more connected business experience. Additionally, 37% said meeting payroll put pressure on cash flow over the last six months, underscoring
Apple Intelligence Taking up 30GB+ on Some Macs Running macOS 27
After you install macOS 27 Golden Gate, Apple automatically downloads a multi-gigabyte AI model to your Mac the next time it's connected to the internet. Unlike previous versions of macOS, you can't prevent it. Siri AI, and by extension Apple Intelligence, are now a mandatory part of your system.
From PMS to Menopause: Two new clinical studies strengthen the science behind one saffron extract
PMS and menopause represent distinct stages of a woman’s life, with different hormonal patterns and symptoms. Yet both are characterised by significant hormonal fluctuations that can influence interconnected biological pathways involved in emotional well-being, sleep, stress response and overall quality of life
Sandhills Community College Small Business Center expands to Moore and Hoke Counties
Small Business Center Director, Laura Kinsman. Photo provided by: SCCSandhills Community College (SCC) is launching a redesigned Small Business Center model that expands no-cost entrepreneurial support across Moore and Hoke Counties. Rooted in the College’s commitment to strengthening small businesses and entrepreneurship as drivers of economic growth, the enhanced model is led by recently appointed Small Business Center Director, Laura Kinsman. The model also includes two new Senior Business Advisors who will provide trusted expertise, stronger community connections, and individualized guidance to entrepreneurs and business owners throughout the region.Kinsman brings a unique perspective to the director’s role as both a local business owner, operating in downtown Southern Pines, and a former Moore County educator. “Her combination of education, business ownership, leadership, and community involvement make her a great fit for the Small Business Center and the work we are continuing to build across Moore and Hoke counties,” said Taylor L. McCaskill, senior director of Workforce Development & Corporate Partnerships in a press release.Kinsman is an active member of the Southern Pines Business Association and has been connected to the Sandhills Small Business Center since the beginning of her entrepreneurial journey. She looks forward to building on that experience by strengthening the Center’s partnerships and expanding its connections throughout the community.She will lead the Center's efforts to support entrepreneurs and business owners throughout Moore and Hoke County and be the connector to the North Carolina Community College System Small Business Center Network operations. The Center offers no-cost, confidential one-on-one counseling, practical workshops, and connections to the resources and partners that help local businesses start, grow, and create jobs.A key part of this new approach, only offered at SCC, is a network of Senior Business Advisors, experienced professionals who will provide individualized guidance in areas such as business planning, finance, marketing, operations, growth strategy, and problem-solving. These advisors will serve as trusted partners to entrepreneurs and business owners, helping them turn ideas into action, overcome barriers, strengthen existing businesses, and pursue new opportunities. This one-on-one counseling is available at no cost, ensuring that high-quality business support is accessible to entrepreneurs at every stage.Senior Business Advisor for Hoke County, Kenna Parks. Photo provided by: SCCKenna Parks has been named the senior business advisor for Hoke County. She is a business professional, entrepreneur, and educator who brings a unique combination of academic training and real-world business experience. She earned her Master of Business Administration (MBA) in 2017 and has built her career around entrepreneurship, marketing, business development, and helping others turn ideas into sustainable opportunities.Senior Business Advisor for Moore County, Katrin Henderson. Photo provided by: SCCAs a military spouse, she has successfully launched and operated businesses across five states, giving her firsthand experience in adapting to diverse markets, building new customer bases and understanding the importance of global reach in today’s business environment. Over the last decade, her areas of focus include business planning, marketing strategy, branding, customer development, financial preparedness, operational planning and connecting entrepreneurs with educational programs and community resources.Parks brings an especially valuable perspective to business advising because she is an entrepreneur herself. She is the owner of Glamo Society Bridal & Formal Wear in Raeford, N.C., giving her firsthand experience with the realities of launching, operating, marketing and growing a small business. She understands that entrepreneurship extends far beyond developing a great idea; it requires strategy, financial awareness, adaptability, strong customer relationships, and consistent execution.Katrin Henderson will serve as the senior business advisor for Moore County. Thriving in hospitality and retail, Henderson has enjoyed positions in Food & Beverage Management and Retail Management in various fine dining and retail establishments in the area, before opening her own children's shop in 2015, in the Village of Pinehurst. She is a native of Moore County.Quickly immersing herself in this new world of small business ownership, Henderson joined various boards and committees, including President Elect of Pinehurst Business Partners and Event Chair for the Holly Arts & Crafts Festival. She also partnered with local organizations such as Moore County Economic Development and Moore County Chamber of Commerce and Sandhills Community College Small Business Center in events and educational opportunities. In 2026, Henderson sold her shop and now offers full-time support to both new and seasoned entrepreneurs through freelance consulting mentorship and the SCC Small Business Center program.The Small Business Center team is passionate about making business resources more accessible, and ensuring entrepreneurs know they do not have to navigate business ownership alone. Through their work with SCC, they are committed to building meaningful relationships with local businesses, community organizations, and industry partners while helping entrepreneurs move from idea to strategy, strategy to action, and action to sustainable growth.“Sandhills Community College believes deeply in the power of small business and entrepreneurship because strong local businesses create jobs, spark innovation, generate investment, and strengthen the communities we serve,” said McCaskill in press release. “Through this new Small Business Center model, Sandhills is building a stronger ecosystem where entrepreneurs can connect, grow, and thrive, while helping drive long-term economic vitality throughout our region.”To learn more about the Center's services or to schedule a consultation, please contact Kinsman directly at kinsmanl@sandhills.edu or 910-695-3938.
AI is among 17 potentially ‘catastrophic threats’ that researchers say require targeted action
More than a dozen “interconnected catastrophic threats” pose significant risk to global health and wellbeing through the remainder of the 21st century, researchers say – including the potential for extinction. But targeted action from world leaders can help avoid worst-case scenarios.
Trump Negotiators’ Business Ties Collide With Multibillion-Dollar Russian Oil Deal: NYT
Trump’s negotiations with Russia about Ukraine reportedly now include an oil deal involving business figures connected to Steve Witkoff and Jared Kushner.
Graffiti in Turners Falls causes damage, business owners perplexed by messages
What struck several people in downtown Turners Falls when their businesses were defaced with graffiti is — it seemed targeted, but misplaced. In this western Massachusetts village in the town of Montague, the numerous messages were connected to the violence in Gaza, to children dying, and notably to the eating of brunch.
What role does high school play in mental health? Feeling connected to other students and staff is key
By the time an Australian student is 15, they will have already spent as many as 11,000 hours at school. What happens here matters for their wellbeing.
A $6 Lead And 15,000 Women Reveal A Healthcare Market Failure
Xella Health integrates multi-omic diagnostics, AI, and Oura wearable data into a connected precision health platform. CEO Kelly Lacob on closing the diagnostic gap.
Music-themed District Sound Lounge is coming to Wyandotte
The new bar is connected to live music venue District 142 and will have a full bar, food, acoustic performers and vinyl DJs.
Multinationals eye higher risk spending to combat multiple threats
More than two-thirds of multinational companies worldwide expect to increase risk management spending over the next 12 months, yet many doubt their ability to manage increasingly interconnected risks…
Women's health event offers access to local resources at Donahue's Family Restaurant in Youngstown, Ohio
Women in Youngstown were getting connected with local health resources.
UToledo Medical Students Set Sail to Study How Lake Erie Shapes Human Health
An evening on the water showed future physicians how the health of the Great Lakes and the health of their patients are deeply connected.
The Kids in the Arena: Spectrum Business Keeps Florida Esports Facility Connected
With Spectrum Business Internet Gig, Valhallan Esports Training now has reliable high-speed, low-latency connectivity so young gamers have a safe, supportive environment to play their favorite games.
Samsung Galaxy phones can't tell if they're connected to Bluetooth or not
Samsung Galaxy phones are experiencing a problem that is causing the volume slider to show the incorrect icons.
Apple Smart Home Hub to Feature iMac G4-Style Design and More
Apple's long-rumored smart home hub will have an iMac G4-style design and a host of unique features, Bloomberg's Mark Gurman reports. The smart home hub is said to feature a square 6-inch display, with variants that can be placed on a countertop or mounted on a wall. It features a single FaceTime camera on the front, with microphones and speakers in its connected base.
WHO joins Pre-COP31 to advance climate action that delivers for people’s health
The World Health Organization (WHO) is joining Pacific leaders, governments and partners at Pre-COP31 in Fiji from 5 to 8 October to advance health priorities in climate action and strengthen the Pacific voice ahead of the 31st Conference of the Parties (COP31) to the United Nations Framework Convention on Climate Change (UNFCCC).COP31, to be held next month in Antalya, Türkiye, marks an important step for global climate and health action. Health is one of the 10 priority themes of the COP31 Action Agenda, “Dynamic and Resilient Health Systems”, and a dedicated Health Day will take place on 9 November, the first day of COP31. The inclusion of health reflects growing global recognition that climate action and health are closely connected. The climate crisis is affecting population health globally. Across the WHO Western Pacific Region, which includes Pacific island countries and areas, the consequences of climate change include extreme heat, cyclones, floods, rising sea levels, food and water insecurity, infectious diseases and disruptions to essential health services. The Pacific in particular faces additional challenges. A recent review of 76 hospitals in 14 Pacific island countries found that 62% of health facilities are located within 500 metres of the sea or a river, leaving them particularly exposed to flooding, storm surges and sea-level rise.Bringing Pacific priorities to the global climate agendaThe Pacific Pre-COP31 provides an important opportunity for Pacific countries and partners to consolidate regional priorities and bring the experiences and leadership of Pacific communities into global climate discussions.Pacific countries have been advancing practical approaches to protect health in a changing climate, including strengthening climate-resilient health systems, improving preparedness for extreme weather events, building resilient health infrastructure and mobilizing climate finance for health. “This Pre-COP is an important moment for the Pacific, bringing global climate discussions to a region that has long been at the forefront of the climate crisis. It provides an opportunity for Pacific countries and areas to set their priorities, experiences and leadership on the global stage, and to ensure that the realities of Pacific communities are genuinely reflected in the decisions made on climate action,” said Dr Saia Ma’u Piukala, WHO Regional Director for the Western Pacific.Throughout this week, WHO will co-convene and participate in high-level discussions and events focused on climate and health, climate resilience, adaptation, financing and implementation. “Climate finance is essential for resilient and healthy Pacific communities,” emphasized Dr Mark Jacobs, WHO Representative to the South Pacific and Director of Pacific Technical Support. “We must ensure that financing reaches the people, communities and essential services most exposed to climate risks, supporting locally defined priorities and investments.”WHO will work with partners to strengthen the integration of health considerations across climate policies and investments, including national climate plans and resilience initiatives.Health as a driver of climate actionAmid the risks to health and pressures on health systems, well-strategized and implemented climate action can deliver significant health benefits. Investments in clean energy, sustainable transport, resilient infrastructure, food systems and nature-based solutions have proven to reduce health risks while contributing to climate mitigation and adaptation.“Climate action is truly an investment in health. Cleaner energy, healthier food systems and climate-resilient health services can protect lives while building stronger communities. We now need to turn these opportunities into action and make health a core part of climate investments,” said Dr Sandro Demaio, Director and Head of Office, WHO Asia-Pacific Centre for Environment and Health in the Western Pacific Region. “These benefits demonstrate that climate action is not only about reducing future risks. It is also an opportunity to improve lives today while building healthier, safer and more resilient societies.”At COP31 next month, WHO will also support the Health Pavilion, which will bring together the global health community and partners to advance health and equity within climate negotiations. With COP31 poised to move health higher on the global climate agenda, WHO will continue working with countries and partners across the Western Pacific Region and globally to strengthen climate-resilient and low-carbon health systems, and ensure that climate action protects and improves people’s health.____________________Media contactsElizabeth Bennett, WHO Asia-Pacific Centre for Environment and Health in the Western Pacific Region, elizabeth.bennett@who.intJulia Dongwhan Shin, WHO Asia-Pacific Centre for Environment and Health in the Western Pacific Region, dong.shin@who.intWHO Western Pacific Communications, wprocom@who.int
Glenwood cremation business searched in South Chicago funeral home investigation
A cremation business in Glenwood is now part of a broader investigation connected to the South Chicago funeral home where authorities discovered 56 bodies last month.
Gemini just got a big upgrade with new connected apps for work, creativity, and life
Google is bringing several new additions to Gemini's connected app ecosystem, including Peloton and SeatGeek.
Findings from the EHF Texas Health Tracking Poll 2025
The annual EHF Texas Health Tracking Poll 2025 also shows how health care affordability, food insecurity, and health are closely connected. Food-insecure Texans are more than 4.5 times as likely to have medical bill problems as those who are food secure, and health outcomes steadily worsen as food security decreases. Texans who regularly run short...
Lavender Psychiatry and Ember Health Advance a More Connected Model for Specialized Mental Health Care
/PRNewswire/ -- Lavender Psychiatry, the largest nurse-led psychiatry and therapy practice in the United States, and Ember Health, a leading provider of IV...
The Michael Miller Show: Greater Kendall Business Association & Upcoming Business Expo
Getting your Trinity Audio player ready... On this episode of The Michael Miller Show, Michael Miller welcomes Carlos Ribeiro from the Greater Kendall Business Association (GKBA). They discuss how GKBA has connected local business owners, entrepreneurs, and professionals through networking and relationship-building for nearly 20 years. 🤝 They also highlight the upcoming Greater Kendall Business […]
How Rutgers Is Training Tomorrow’s Public Health Heroes
Since its launch in 2024, the Rutgers Health Service Corps has connected students with faculty and staff to improve population health outcomes throughout New Jersey
SKYBOXE Enters Reseller Partnership to Offer Verizon Business Data Plans to Business Customers
SKYBOXE®, a 5G fixed wireless internet company built for the way people work, build, and stay connected today, announced that it has entered into a reseller partnership that enables SKYBOXE to offer Verizon Business data plans to qualified business customers across the United States.
Inside Brittany Mahomes’ Growing Billion-Dollar Business Empire
Inside Brittany Mahomes' growing business empire, including major brand partnerships and investments connected to companies worth billions. The post Inside Brittany Mahomes’ Growing Billion-Dollar Bus...
Eminem and Kid Rock Preach Political Unity After Years on Opposite Sides
Eminem and Kid Rock found common ground despite their political differences. The longtime friends reunited for “7 Sins,” a new track that Kid Rock said could offer a lesson about staying connected des...
Intel Panther Lake Teardown, 18A, BSPD, GAAFET, SemiAnalysis STEEL
Panther Lake debuts the first commercial implementation of backside power delivery (BSPDN), introduces Intel’s first iteration of gate-all-around (GAA) transistors, and showcases their advanced packaging capabilities with its Foveros-S assembly. With Panther Lake, Intel’s manufacturing arc has shifted from nebulous roadmaps to shipped silicon, a significant milestone on their long road back to competitive semiconductor manufacturing. To evaluate the extent of Intel’s comeback, we tore down Panther Lake. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Our teardown traces 18A from its four-sheet RibbonFETs (Intel’s marketing name for GAAFETs) and gate stacks through contacts, frontside and backside wiring, and the bonded carrier. We explain how these material and integration choices improve gate control and reduce resistance, while adding capacitance, thermal resistance, and process complexity. Our measurements put Panther Lake’s 18A compute logic and TSMC N3E GPU logic at similar logic density. However, 18A does not lead TSMC N3P, N2 or Samsung SF2 in peak density. Panther Lake’s CPU cores are incremental updates, and the high-end GPU still uses TSMC N3E. Panther Lake assembles one compute tile, one GPU tile, and one I/O tile atop a passive base tile using Intel’s Foveros-S advanced packaging. Both compute tile variants use Intel 18A. The Xe3 GPU options are a 4-core GT1 tile on Intel 3 and a larger 12-core GT2 tile on TSMC N3E. Both I/O tile variants use TSMC N6. [1], [2] Our analysis centers on the PTL-U compute tile, both the 4-core and 12-core GPU tiles, as well as the 12-lane I/O tile. In conventional chips, power and signal are routed through the same frontside metal stack towards the device frontend. Power rails consume scarce routing resources near the transistors, while tall via stacks carry VDD and VSS from the coarse upper wires to local rails. Backside power delivery (BSPD) moves the main power network behind the transistor layer, to the backside, separating it from frontside signal routing. We covered BSPD and its impacts in 2024. [3], [4], [5] Intel’s BSPD implementation, branded as “PowerVia”, routes power through dedicated backside metals to nano-TSVs, which connect those rails to local source/drain (S/D) contacts. Implementing that separation requires Intel to build the interconnect stacks from both sides of the wafer. The frontside comprises the M0-M14 signal stack, while the backside comprises the BM0-BM5 power stack. M0 and BM0 are closest to the transistors. The nano-TSVs connect the two sides, but Intel patterns and etches each via from the front after forming the contacts. A narrow via runs from the side of the contact deep into the silicon substrate. Intel then completes the frontside signal metal stack, bonds the wafer to a carrier, flips it and removes the original substrate until the buried via tips are exposed. The backside metal stack is then deposited directly on the revealed vias. The nano-TSV and backside-via profiles taper in opposite directions because Intel forms them from opposite sides of the wafer. The transistor structures form the FEOL. Local contacts and nano-TSVs connect them to the wiring. M0 begins the frontside interconnect stack. The silicon carrier remains attached above the frontside interconnects. It supports the device wafer during substrate removal and backside processing and remains part of the finished chip’s thermal path. PowerVia removes the main power distribution from the congested frontside metals, routing supply through shorter and wider backside wires. Its lateral landing still occupies area in the standard cell, so it recovers less cell area than a direct backside contact. [3] Nano-TSVs beside the logic devices carry VDD or VSS from the backside power network, while signal connections continue upward through the frontside metals. Backside Interconnects Samsung SF2 data is included for comparison to Panther Lake’s within this article. SF2 is the incumbent GAA foundry node but lacks BSPD, serving as a useful reference to evaluate 18A. A full teardown of Samsung’s S26 products, processed on SF2, will be shared soon.Nanosheet-cut EDS comparison. The PowerVia supply path runs from the backside Cu rails through Mo-lined W nano-TSVs to the local transistor contacts. In this cross section, the tapered connection spans roughly 150 nm from the contact level to BM0. The Ta liner confines Cu and promotes adhesion to the surrounding stack; the AlOₓ etch stop controls the next dielectric etch above the rail. Dielectric beneath the ribbons electrically separates the devices from the backside wiring and removes the conducting silicon body below the channel. [6] AlOₓ serves as an etchstop (ES), enabling endpointing and protecting the underlying layers. Low-volatility aluminum fluoride reaction products resist the fluorinated plasma, allowing a thin AlOₓ film to protect the metal while the surrounding low-k dielectric is removed. [6], [7]. While the BM0 and layers above the M1 lines show double AlOx layers, Our SMIC N+3 teardown showed single AlOₓ layers. SMIC uses a simpler local AlOₓ substack, while the remaining cap and etch sequence provide the required landing protection. So why double layers? The closely spaced AlOₓ doublets provide two protected endpoints in the etch sequence. Intel documents an AlOₓ/SiN/AlOₓ stack that explains the benefit. The main dielectric plasma etch stops on the first AlOₓ film; a selective wet clear opens that film; a second plasma etch removes the intermediate SiN and stops on the second AlOₓ film. The final wet clear exposes the metal landing surface. SiN is the intermediate dielectric in Intel’s published example. [8] The second stop protects the metal through a cap breakthrough. Wide openings can etch faster than narrow ones, and etch depth varies across the wafer. Metal under an early-clearing opening would otherwise be exposed while other openings still need more etching. Staged protection widens the process window and reduces metal erosion, corrosion and void formation. [8] TSMC documents AlN/AlOₓ/SiOC/AlOₓ above Cu, with AlN blocking Cu diffusion, and a simpler AlN/SiOC/AlOₓ variant that omits one AlOx film. [9] Levels with different opening sizes, aspect ratios, pattern densities and cap materials need different etch margins. A double AlOx stop is useful where another protected endpoint justifies the added processing. The extra film adds formation, selective opening and cleaning steps, plus another set of interfaces to control adhesion, moisture, and stress. These blanket films are opened through the existing via pattern, so each film does not require another lithography mask. AlOₓ adds parasitic capacitance when it replaces lower-k dielectric; two thin AlOₓ films can nevertheless contain less AlOₓ than one thick film. Total thickness, placement, and theintermediate dielectric determine the electrical cost. Deposition chemistry also changes AlOx permittivity and residual hydroxyl content, which can oxidize the underlying metal. [7], [8], [10], [11] The backside stack separates into relatively fine BM0-BM2 wiring near the devices and coarser BM3-BM5 power distribution. The largest pitch increase occurs between BM2 and BM3. BM0’s pitch closely matches the logic-row height, fitting local power delivery to the cell rows. Higher levels aggregate current through larger conductors: routing density becomes less important than low resistance and current capacity as the network approaches the package. This hierarchy provides wide power wiring for the power delivery network without consuming scarce frontside signal-routing resources. [3] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Frontside Interconnects Intel 18A combines Mo-lined W contacts and nano-TSVs with a separate backside Cu power network. Samsung SF2 keeps power on the frontside, using Ti-based contact interfaces and Ta-based barriers and Co liners around Cu wiring. In 18A standard-cell rows, backside power rails supply the devices through nano-TSVs within the cells, freeing frontside routing resources. Samsung’s M0 accommodates both power and signal connections. From the device toward M0, the connection runs through a Ti-based S/D interface, W contact fill, a Mo-lined W via, and the Cu M0 wire. Mo supplies a conductive nucleation and adhesion layer for W, replacing the resistive TiN liner used in conventional W integration. This increases the effective conduction volume within the feature while retaining W fill and its established polishing, cleaning and etching processes. Intel’s Mo/W patent describes this integration tradeoff. The nano-TSV uses the same Mo-lined W construction in the backside supply path. [12] The move from TiN to Mo is an incremental change. While a full Co or Mo fill can also reduce the volume lost to liners in very small features, it requires new integration schemes that increase complexity and risk. Cu remains attractive for wider wires due to its low resistance. As wires and vias shrink, the diffusion barrier consumes an increasing fraction of their cross-section. [12], [12], [14] Intel uses Co/Ru liners at M0-M1, Co at M2-M4, and Nb at M5-M9. The lower-level liners help Cu adhere and reduce void formation during trench fills. Applied Materials’ Endura has new thermal control that facilitate wetting process, so the thin film continuity is good enough that good capillary pressure will drive Cu atoms to the via bottom without voiding. Intel’s choice to use Nb is particularly interesting. Intel’s Nb patent describes a conductive diffusion barrier intended to reduce the barrier’s contribution to resistance relative to conventional Ta-based barriers, particularly at via bottoms where all current crosses the barrier. The patent pairs Nb in coarser levels with the option of lower-cost PVD processing. [15], [16] The upper metal layers support thicker barriers formed through physical vapor deposition (PVD) despite its worse coverage and uniformity. Meanwhile, the lower metal layers require thinner barriers deposited through conformal atomic layer deposition (ALD). Co/Ru adds another material interface and requires controlled deposition and Cu fill. Changing liners and barriers by metal layer allows Intel to optimize interconnect resistance, process complexity, and reliability. [15, 16] RibbonFET, Intel’s name for its gate-all-around FETs (GAAFETs), replaces the FinFET’s vertical fins with four stacked horizontal silicon nanosheets, allowing the gate to surround the channel on every side. The path to GAAFET begins with the planar transistor. A planar MOSFET places the gate above the channel between its source and drain. Pairing an NMOS with a PMOS transistor creates a CMOS inverter, in which the NMOS pulls the output low for a high input, and the PMOS pulls it high for a low input. The gate must retain electrostatic control of the channel to ensure clean switching. As gate lengths shrank, the drain began to compete with the gate for that control, increasing off-state leakage. Electrostatic control was restored through an architectural evolution that raised the channel into a vertical fin and wrapping the gate around three sides. Called “FinFET”, this new architecture packed more effective channel width into a smaller footprint. Further scaling made it harder to maintain both drive current and leakage within smaller cells, and reintroduced the same problems planar MOSFETs faced. Nanosheet GAAFETs close the fourth side by replacing the vertical fin with a stack of horizontal nanosheets, each surrounded by the gate. The tighter electrostatic control suppresses leakage at shorter gate lengths while stacking adds effective channel width within the cell footprint. In a FinFET process, channel width changes in discrete steps as designers must add or remove whole fins. Nanosheet width can instead be adjusted continuously within the process’s design rules. Wider sheets increase drive current, while narrower sheets reduce capacitance at the cost of drive current. Intel 18A uses stacks of four nanosheets each and varies their widths across logic and SRAM. At the process level, adding more sheets to each stack increases effective channel width and drive current, but complicates fabrication. RibbonFET vs MBCFET Samsung began GAAFET production in 2022 with SF3E, following with SF3 and now SF2. Its ‘MBCFET’ provides a useful structural comparison with Intel’s first RibbonFET implementation. [17] STEEL is digging deeper into SF2, used in the Exynos 2600, and TSMC’s GAAFET N2, used in Apple’s A20 Pro, in upcoming newsletter articles. We’re throwing some teasers on X. Let’s compare Samsung SF2’s MBCFET with Intel 18A’s RibbonFET. Subscribe Even to the untrained eye, Intel’s extra nanosheet is obvious. Intel stacks four ribbons to Samsung’s three. Samsung’s sheets are much wider in these fields, so both sheet count and width matter to the available channel perimeter. Sheet width also changes which silicon surfaces carry current. On conventional (001) silicon, wide nanosheets emphasize the broad top and bottom surfaces, favoring electron transport; the larger sidewall contribution in a narrow sheet favors hole transport. Thinner sheets improve gate control but increase confinement and scattering. This makes width and thickness part of the NMOS/PMOS balance, alongside strain and threshold voltage. [18], [19] GAAFET designs like 18A use different work-function-metal (WFM) stacks for NMOS and PMOS. Around each ribbon, a thin SiOx interfacial layer separates the silicon channel from the HfOx high-k dielectric, with La providing dipole tuning and the WFM wrapping the dielectric. NMOS uses a TiAl-based stack, while PMOS uses TiN WFM. W fills the remaining gate trench, providing a lower-resistivity path where the work-function layers are no longer needed. In this field, the PMOS stacks leave room for W between ribbons, while the NMOS stacks occupy more of those gaps. A silicon-based dielectric marks the P/N boundary, allowing the PMOS and NMOS gates, sharing the same gate trench, to be processed sequentially. Fast logic paths, retention circuits, and SRAM need a family of threshold options. Changing threshold without substantially changing device dimensions, capacitance or fabrication complexity is valuable. FinFET processes typically use different work-function-metal stacks. In a four-ribbon GAA stack, the narrow sheet-to-sheet gap limits how much WFM can fit around each channel. La in the gate dielectric creates interfacial dipoles at the SiOx/HfOx boundary, shifting effective work function and tuning threshold voltage. This gives Intel another control alongside its NMOS and PMOS WFM stacks. Low-threshold devices improve critical-path drive; higher thresholds reduce leakage elsewhere. Dipole tuning is especially useful in GAA because it changes threshold without consuming the narrow intersheet gap with thicker WFM. Precise control of La incorporation, diffusion and interface quality has long been a challenge, limiting viability in high volume production but is now seen from every leading-edge foundry. Intel’s patent describes depositing a dipole-forming oxide above HfOx and annealing it toward the interfacial oxide before completing the work-function and fill metals. This separates threshold tuning from the space available for metal. Newer research addresses the thermal cost: imec’s 2026 dipole-middle research inserts the shifter between two HfOx depositions, shortening the diffusion path while protecting SiOx during patterning. [20], [21]Matched-cut EDS, Intel 18A (left) vs. Samsung SF2 (right). Intel retains raised source/drain epi beneath its contacts, while Samsung recesses W deep into the epi to form a V-shaped Ti-lined interface. The deeper contact increases metal-to-semiconductor area and shortens the current path from the lower sheets, reducing contact and spreading resistance. It also removes epi volume and brings the contact etch closer to the channel ends. Retaining more epi preserves the material available for strain transfer, especially from SiGe into PMOS. These geometries balance contact access against stress engineering and etch margin. [22], [23] Samsung stacks three sheets to Intel’s four ribbons, and both processes use sheet width to tune drive strength. In our Samsung cross-sections, widths range roughly from 19 to 30 nm in the NPU rows and 37 to 50 nm in the CU cell. The Samsung nanosheets taper, with the widest sheet at the bottom and the narrowest at the top. Both processes use HfOx gate dielectric and Ti-based work-function stacks, with Al in the NMOS stack. In the Samsung devices shown here, the dielectric and WFM occupy the intersheet gaps, leaving W above the top sheet. Intel’s PMOS stack leaves more room between ribbons, and W fills those gaps while the thicker NMOS stack leaves W mainly in the upper trench. Gate-stack EDS maps. The W between Intel’s PMOS ribbons provides a conductive path close to the lower gates. Where WFM fills the entire gap, the gate still surrounds the channel, but voltage reaches it through the more resistive work-function films. Thinner WFM and dipole tuning preserve room for low-resistivity fill; Mo and Ru are alternative fill metals being developed for further scaling. [24] A masked, sequential WFM flow explains the different gate heights and inter-nanosheet fill. The proposed sequence below shows how separate NMOS and PMOS work-function steps produce that geometry. Enabled by the BSPDN process, Intel replaces the dense-logic silicon subfin with dielectric, removing the parasitic conduction path below the ribbons and reducing substrate-related capacitance. A retained silicon body as in classical, non-SOI, planar and FinFET designs needs junction and punchthrough-stop engineering to suppress leakage. Dielectric isolation makes that leakage less sensitive to the subfin doping profile but adds removal and fill steps. It also weakens the direct thermal path through silicon, making the contacts, metal stacks and package more important for heat extraction. [24], [26] Fluorine is concentrated around selected Intel device structures in the maps. WF6 is a standard precursor for W nucleation and fill, while barrier films protect adjacent dielectrics from fluorine attack. Low-fluorine W processes reduce the residual-F burden. Chloride-based precursors avoid introducing F during W deposition, but require control of chlorine attack, nucleation and fill quality. The integration target is a continuous, low-resistance W path with a thin protective liner and minimal chemical damage to the surrounding stack. [20], [27], [28] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. We measured cell height, gate pitch, metal geometry, and ribbon dimensions at the XTEM sites shown below. The tables group these dimensions by site and device polarity. Our “sheet cuts” cross the silicon channel and show the ribbons end-on. “gate cuts” run along the channel through successive gates. The 18A logic cell dimensions point to a five-track logic library while the N3E and Intel 3 cell dimensions evidence a seven-track logic library. The DDR-PHY uses wider M0 wires and much larger spacing than core logic. That trades routing density for lower wire resistance and weaker coupling between neighboring nets. The geometry suits the current delivery and coupling requirements of analog, clock, and I/O circuitry. PowerVia lets 18A combine a compact cell height with wider M0 geometry by moving the main power rails off the signal-routing tracks. That relaxes local wire scaling while preserving a small cell footprint. Cell height and gate pitch set the geometric density; pin access and routability determine how much of it a real block can use. [29] The biggest takeaway from our gate-pitch measurements is that Intel 18A compute logic and TSMC N3E GPU logic have similar density in the Bohr representative-cell model. The 18A example is 18.6% denser than the Intel 3 GPU example. Gate pitches are nearly identical across the three sites, so cell height drives most of the difference. The Bohr model combines a four-transistor NAND2 spanning three gate pitches and a 32-transistor scan flip-flop (SFF) spanning nineteen pitches, weighting their densities 60:40. The sensitivity column shows how independently changing cell height and gate pitch by ±1 nm changes the result. This compares representative cell geometries; whole-die density also depends on cell mix and placement. The 18A P-core gives M0 substantially more metal cross section than the N3E vector engine. Treating each profile as a trapezoid gives 2.63 times the area per line and 1.84 times the area after normalization by routing pitch. The larger section reduces the geometric contribution to line resistance and lowers current density for a given current. Taller and wider wires also add capacitance, so circuit delay depends on the balance of resistance and capacitance. The DDR-PHY has less metal area per routing width than the 18A core fields, while remaining above N3E. [30] Area = height × (top CD + bottom CD) / 2, including liners. Area/pitch normalizes by routing width. Taper is the symmetric sidewall angle from vertical, with the largest angle belonging to the DDR-PHY. Compute tile The measurements show how ribbon dimensions and gate-stack geometry vary across the compute tile and between NMOS and PMOS to balance channel drive, gate load and the space needed for the dielectric/WFM stack across logic, SRAM and the DDR-PHY. Width mainly changes available channel perimeter; thickness also changes electrostatic control and carrier confinement. Gate-stack thickness then determines the space left for low-resistivity fill P-core and LP E-core logic Both the P-core and LP E-core use multiple nanosheet widths. Widths are measured on high-magnification XTEMs while wider-field images demonstrate additional width choices within the LP E-core. Multiple widths are expected even within an LP E-core. Timing-critical paths, buffers and cells with different fanout need different drive strengths. The lower-magnification fields show this width diversity beyond the sites quantified in the table. L2 and L3 SRAM GAA gives SRAM designers another way to balance the pull-up (PU), pass-gate (PG), and pull-down (PD) transistors. FinFET bitcells set device strength through fin count while GAA adds nanosheet width as a sizing knob. In a 6T SRAM cell, a strong pull-down relative to the pass-gate limits read disturbance, while a strong pass-gate relative to the pull-up improves writability. During a write, the pass-gate and write driver pull the node storing “1” below the inverter trip point. During a read, the pull-down holds the node storing “0” low. Bias, threshold voltage, mismatch and assist circuitry set the remaining margin. FinFET high-current cells commonly use a PU:PG:PD fin-count pattern of 1:2:2, a device-sizing ratio rather than a current ratio. Ribbon width lets Intel balance SRAM strengths without adding whole fins. The L2 cell uses its narrowest ribbons for PU and widest for PD, improving writability and read stability respectively. Intel’s disclosed HCC operates without assist; its denser HDC uses negative-bitline write assist. Pulling the selected bitline briefly below ground increases pass-gate overdrive so it can overpower the pull-up at lower supply voltage. That buys density and low voltage writability at the cost of boosting circuitry, switching energy, and additional voltage stress that must be controlled. [31], [32] Four rectangular ribbons give the perimeter = 8 × (width + thickness), before corner rounding. PG/PU is 1.49 and PD/PG is 1.16. The L3 structures closely resemble L2 in layout and cell height. Fewer L3 nanosheet widths are tabulated because fewer high-magnification images were available. DDR PHY The DDR-PHY trades density for controlled analog behavior and reliable off-chip signaling. It contains drivers, receivers, delay circuits, and calibration logic that set drive strength, sampling time, and voltage margin. Repeated four-sheet devices with similar widths fit the use of regular transistor units for matching and programmable drive. Its wider local wiring provides room for current delivery and separation of sensitive signals, while consuming more area than a dense core-logic grid. The layout serves the memory channel’s electrical requirements as well as digital logic density. [33] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Intel 3 GPU devices Vector engine logic Intel 3’s XVE logic uses two-fin PMOS and NMOS devices with power rails in M0. Its cell height and M0 pitch give a seven-track geometry, two tracks more than the 18A logic. One-fin groups also appear among the two-fin devices. Intel 3 L2 SRAM The Intel 3 L2 SRAM uses the familiar HCC sizing pattern: one PU fin, two PG fins, and two PD fins. N3E GPU devices Vector engine logic The N3E XVE field contains repeated two-fin devices with seven-track cell geometry. N3E remains a FinFET process, giving Panther Lake a direct FinFET-to-RibbonFET comparison. N3E L2 SRAM The N3E L2 SRAM uses the same PU:PG:PD fin-count pattern of 1:2:2. Panther Lake-U follows Lunar Lake’s floorplan quite closely. Both pair 4 P-cores with 4 LP E-cores and NPU, media and display engines in similar locations. Lunar Lake also uses Xe2, the direct predecessor to Panther Lake’s Xe3 GPU. This makes Lunar Lake the most direct basis for our comparisons. Arrow Lake differs in core count and uses the older Xe-LPG GPU architecture, so we only use it where it offers a more direct component-level comparison. Compute tile Panther Lake compute-tile floorplans remain sparse even months after launch. Intel 18A’s backside metal and dielectric stack must be removed without damaging the underlying structures before a clean transistor-level floorplan can be imaged. Most published die shots hide or heavily process the background, but we are quite proud of the die shot we achieved and are excited to show the work we have done. We measured the areas of the key components on the compute tile and compared them with their Lunar Lake predecessors on TSMC N3B. These help us to capture changes in block area and compare the two chips across process nodes and designs. Our total tile areas exclude the scribe-line area. The compute-plus-GPU subtotal below uses the PTL-U compute tile and GT1 GPU; it excludes the I/O tile and passive base. Individual block areas use the boundaries marked on the floorplans The compute-plus-GPU row is recomputed from the displayed PTL-U and GT1 areas. Component rows use their stated per-region counts and are not an additive partition of the whole tile. The P-core area remains almost unchanged between Lunar Lake and Panther Lake, despite L2 capacity increasing from 2.5 MiB to 3 MiB. Arrow Lake uses the same Lion Cove core as Lunar Lake but also has a 3 MiB L2. Cougar Cove fits 20% more L2 into the same P-core area. The larger private cache keeps more of each core’s working set close to its execution units, reducing access to shared L3 and DRAM. Extra capacity adds storage leakage and lookup energy, so designers balance it against avoided lower-level accesses. The shared P-core L3 cache also shrank by 14.8%. [2] Cougar Cove combines a similar footprint with Intel’s reported power-efficiency improvements. RibbonFET’s tighter channel control reduces leakage, while PowerVia reduces supply droop and allows tighter voltage guardbands. [1] Darkmont’s four-core LP E-core cluster is 5.0% smaller than Skymont’s on Lunar Lake, with most of the reduction in its L2 regions. The 1 MiB region shrank by 8.4% and the 1.5 MiB region by 14.9%. The tag arrays also use one fewer visible row. Tags identify which memory addresses the data array holds, so rearranging them changes the cache’s layout and wiring without requiring less data capacity. [2] The LP E-cores share one L2. This pools capacity and avoids duplicating all the cache machinery, but the four cores contend for its banks and bandwidth. Their separate cluster also keeps light work away from the performance cluster and its L3, allowing that larger domain to sleep. [1], [2] Cache area includes more than the storage cells. Tags identify each line, decoders select rows, sense amplifiers read the small bitline signal, and wires connect to the banks. Splitting an array into smaller sections shortens wordlines and bitlines, improving access speed, but duplicates peripheral circuits. Panther Lake’s smaller cache regions therefore reflect the complete memory implementation, including how much of each region is devoted to storage. [34] Unlike Meteor Lake and Arrow Lake, Panther Lake has no separate SoC tile. The NPU, LP E-cores, memory controllers, PHYs, media and display engines now share the compute tile. This removes an active die and keeps CPU memory traffic on one die. The cost is moving PHY and I/O-related circuitry onto 18A: drivers, receivers and analog circuits must still meet external voltage, loading and signal-integrity requirements, so their area does not shrink like dense digital logic. [1], [2] The biggest shrink comes from the NPU, which occupies 36.9% less area. NPU 5 consolidates the same total INT8 MAC count into half as many neural compute engines. Each of the three NCEs has a larger MAC array to make the complete NCE envelope 22.6% larger than an NPU 4 engine. Consolidation also halves the number of scratchpads and SHAVE DSPs, from 12 to 6. The MAC array handles matrix multiplication and convolution, while SHAVE executes vector and custom operations that fit the array poorly. [1], [2], [35] The paired floorplans identify each NCE envelope and its scratchpad, MAC, and SHAVE regions. Each measured MAC polygon is counted once per NCE in the area accounting below. The scratchpads store weights, activations, and intermediate results near the MAC arrays, allowing repeated use without fetching them again from DRAM. Halving their number delivers the largest measured area saving but leaves less local storage for the same total MAC count. Layers that no longer fit locally require smaller working tiles or more transfers of intermediate data. The benefit depends on keeping the enlarged arrays busy while managing that tighter storage budget. [36] NPU 5 also adds native FP8. Using half the operand width of FP16 reduces storage and transfer demand, helping workloads fit the smaller local memory budget. Lower precision and format-dependent range make scaling and model validation part of deployment. Hardware activation functions further reduce work that would otherwise occupy the programmable DSPs. [1], [2] Microsoft requires an NPU to deliver at least 40 TOPS for Copilot+ PCs. Both Lunar Lake and Panther Lake meet this threshold, but Panther Lake uses significantly less silicon. GPU tiles Panther Lake is Intel’s first product with Xe3, its latest GPU architecture. It offers two different GPU tiles: a smaller GT1 tile with 4 Xe3 cores on Intel 3 and a larger GT2 tile with 12 Xe3 cores on TSMC N3E. Panther Lake allows us to compare the same GPU architecture across both Intel 3 and TSMC N3E. Wildcat Lake adds a third Xe3 implementation on Intel 18A. A future newsletter will detail Xe3 and its implementation differences across all three process nodes. GT2 scales Xe3 to a different physical layout, with render slices arranged vertically instead of GT1’s horizontal arrangement. Slice placement sets the distances to shared cache banks and the D2D interface. Those wires consume area and add delay, so scaling the number of Xe cores also requires a new balance of cache placement, routing and timing. [1] What’s immediately obvious is that the GT2 tile on TSMC N3E has much smaller Xe cores than GT1. These block areas include logic, caches, and routing. An Xe core on the GT1 tile is ~69% larger than one on Lunar Lake, and ~55% larger than one on GT2. Intel 3 therefore uses substantially more area per Xe core. The block-area gap exceeds the measured logic and SRAM density gaps, bringing routing, timing targets, cell mix, and floorplan allocation into the comparison. The measured vector/matrix engine region is almost unchanged between Lunar Lake and Panther Lake’s GT2 tile. Xe3 retains eight 512-bit vector engines and eight 2048-bit XMX engines per core. Its gains also come from feeding those engines more effectively: more resident threads hide stalls, and variable register allocation lets shaders trade registers per thread against the number of threads kept active. [1] The shared L1/SLM capacity increased by 33% from 192 KiB to 256 KiB, while its area increased only 5%, raising effective density by 27%. L1 retains reused cache lines, while software-managed SLM lets a thread group share data locally. Both reduce traffic to more distant memory. Allocating more SLM per group can also limit how many groups reside on a core at once. [1], [37] The GT1 tile carries 4 MiB of L2 against 16 MiB on the GT2 tile. GT1 divides its L2 cache into four 1 MiB banks, while GT2 uses eight 2 MiB banks. Each bank contains 128 macros, but each N3E macro stores 16 KiB, twice the Intel 3 macro’s 8 KiB capacity. The N3E macro is only 54% larger while holding twice as many bits, giving it 30% higher density: ~23.7 Mbit/mm² versus 18.3 Mbit/mm². Including bank-level circuitry, the gap widens to ~16.9 Mbit/mm² on GT2 versus ~10.4 Mbit/mm² on GT1. GT2 gains density with its macros storing more bits per unit area, and those macros occupy more of each cache bank. Larger macros spread decoder and sense-amplifier overhead across more storage, while a more compact bank layout reduces the share spent on control and routing. The compromise is longer wordlines and bitlines that carry more capacitance. [34] I/O tile Panther Lake uses two I/O tile variants, both fabricated on TSMC N6. The smaller one provides 4 PCIe 5.0 and 8 PCIe 4.0 lanes and serves lower-tier systems as well as those without a discrete GPU, while the larger one adds 8 PCIe 5.0 lanes, bringing the total to 20 lanes, for discrete-GPU connectivity. Panther Lake SKUs with the larger 10- or 12-Xe GPUs use the smaller I/O tile. [38] The smaller I/O tile adds a PCIe 4.0 block and a Thunderbolt block to Lunar Lake’s I/O layout, providing four additional PCIe 4.0 lanes and another Thunderbolt 4 port. Its repeated N6 blocks retain nearly identical areas and layouts. Reusing these proven PHYs and controllers avoids porting and requalifying external interfaces on 18A, where faster digital logic offers less benefit to circuits constrained by the off-chip link. [38] SemiAnalysis’s teardown lab (STEEL) dives deep into the world’s advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. We’re hiring technical experts from system to transistor and everywhere in between. Check out our Careers page. Panther Lake offers scalability and modularity through its disaggregated packaging that partition compute, GPU, and I/O silicon into separate tiles allowing for a suite of tile configurations. This partitioning makes the package part of Intel’s node economics as it determines how much leading-edge wafer area each product consumes, which functions can remain on other processes, and how much configuration freedom Intel can offer from a shared set of tiles. Furthermore, fabricating the compute and GPU tiles separately confines the new 18A process to the compute tile and allows graphics and I/O to use other, more established, and more cost-effective processes. For Panther Lake, the GPU and I/O tiles are assembled alongside the compute tile on a passive silicon base using Foveros-S. Intel’s current technology brief lists a nominal 36 µm pitch for Foveros-S. Through-silicon vias (TSVs) in the base connect the fine wiring above to the larger package connections below. The functional tiles sit side by side on that passive base in a 2.5D configuration. [39] Our cross-section through the compute and GPU tiles shows the package’s wiring hierarchy. Microbumps connect each active tile to the passive silicon base; its fine redistribution layer (RDL) carries the short, dense tile-to-tile links. TSVs carry connections through the base to the package substrate, which fans them out to the much coarser motherboard solder joints. The base supplies interconnect, while computation remains in the active tiles above it. [39] At the compute-tile edge, the higher-magnification inset shows a local microbump spacing of approximately 25.24 µm and a feature width of 12.33 µm. These local spacings are finer than Intel’s nominal Foveros-S value. The X-ray fields further confirm tighter neighboring bumps, consistent across every die-to-die area found on each tile. Additional X-ray analysis is offered after the paywall. Putting the memory controller beside the CPU removes the D2D transfer that CPU memory requests required in Meteor Lake and Arrow Lake. This avoids the extra transmitter, receiver, and link traversal, saving interface energy and latency. Panther Lake’s separate GPU still crosses a D2D link to reach DRAM, so its larger local caches also help contain package traffic. [1], [40] Smaller dies are less likely to contain a random fatal defect, and screening them before assembly prevents one bad tile from consuming a complete package of good silicon. Reuse also spreads design and qualification work across more products. Against those gains, Intel pays for the passive base, D2D circuits, extra bonding and test steps, and losses during assembly. Cost per working product across the portfolio captures the combined effect of wafer yield, reuse, test, and assembly. [29] Wildcat Lake packaging Intel launched Core Series 3, formerly Wildcat Lake, on 16 April 2026 for value mobile and edge systems. Wildcat Lake keeps 18A but removes the passive base and combines more functions on one die to simplify the package. The two products therefore reveal two distinct ways to commercialize the same leading-edge process. [41] Wildcat Lake’s 18A die combines up to two Cougar Cove P-cores, four Darkmont LP E-cores, two Xe3 cores and a smaller NPU. A separate platform-controller die supplies I/O, connected through UCIe, Intel’s first processor implementation of the standard. Consolidating graphics remove a tile boundary and the passive base, reducing assembly complexity for a modest-bandwidth value product. It also ties CPU and graphics scaling to the same die, giving up Panther Lake’s ability to swap in a much larger GPU. [42], [43] In July 2021, Intel CEO Pat Gelsinger set out an ambitious process roadmap aimed at regaining performance leadership by 2025, later described as five nodes in four years. Five years and one CEO later, Intel’s comeback story is not as unambiguously positive as Pat may have hoped. [44], [45] Intel once set the pace for process technology, bringing high-k metal gate technology and FinFETs into volume production years ahead of the rest of the industry. Its 22 nm FinFET process reached consumers with Ivy Bridge in 2012. [46] Intel’s integrated device manufacturing (IDM) model allowed its architects and process engineers to co-optimize products and processes. Starting with Sandy Bridge, Intel dominated x86, while AMD struggled with Bulldozer. That lead faltered at 14 nm and broke at 10 nm. Intel targeted a massive 2.7× density increase, but the node arrived years late and required several revisions before it could support Intel’s full lineup. This delay forced Intel to stretch 14 nm across six generations, while TSMC moved ahead in process technology and AMD recovered in x86. By 2019, Intel was still shipping 14 nm across most of its product stack, with its 10 nm client ramp focused on Ice Lake mobile processors. Meanwhile, TSMC was shipping N7 and N7+, and AMD’s Zen 2 compute chiplets used N7 to raise core counts and improve efficiency. Intel’s process failures were central to its decline, but unsound business decisions furthered their downward slide. Product delays compounded product mistakes, pushing client, server, and FPGA roadmaps off schedule. Several attempts to enter AI (Nervana and Gaudi) and networking (Tofino) also failed to establish lasting businesses. Intel’s recovery has focused on consumer CPUs and advanced packaging. Tiger Lake, Alder Lake, Lunar Lake and now Panther Lake have restored Intel’s consumer roadmap. On the process side, Intel 4 shipped with Meteor Lake, Intel 3 with Granite Rapids and Sierra Forest, and Intel 18A with Panther Lake. Intel has also made advanced packaging part of its foundry offering. However, Intel is still playing catch-up in servers. Several Xeon generations arrived years late and trailed contemporary AMD and Arm server CPUs in performance, efficiency, and core count. The process roadmap is back, but Intel does not hold the same process-technology leadership position it held prior to 10 nm. The introduction of gate-all-around nanosheets and backside power delivery are two of the biggest changes to transistor integration in a decade. Intel took on both changes at once: 18A paired its first RibbonFET with PowerVia in Panther Lake. Panther Lake is a substantial manufacturing milestone. Our cross-sections show how RibbonFET and PowerVia reshape local contacts and wiring, while the floorplans show where architectural consolidation and process choices save area. A sustained competitive lead depends on product performance, cost, yield, and the next implementation. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page.. 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Jerry Jeudy Trade: Giants Connected to Browns WR
Jerry Jeudy is not living up to his paycheck, and one prominent NFL insider believes the Cleveland Browns could trade him despite the team's winning record. A first-round pick in the 2020 NFL Draft, Jeudy began his career with the Denver Broncos and established himself as a good but not great pass-catching weapon. However, he …
New Richland Lab Could Transform How Scientists Study Microbes and Boost Regional Jobs
The BriefGroundbreaking held Tuesday: PNNL officially began construction on the M2PC lab, a 30,800-square-foot facility funded by the U.S. Department of Energy's Office of Science that will study soil microbes to improve crop productivity and develop new biotechnology applications. The facility will be open to researchers from around the nation and the world.Research timelines could shrink dramatically: The facility's automation and AI capabilities could reduce experiments that currently take six months to just 72 hours, allowing scientists to explore more possibilities faster than ever before.New jobs coming to the Tri-Cities: The project is expected to create positions for automation engineers, AI experts, roboticists, technicians, and skilled craftspeople, with the facility opening in 2029.RICHLAND, Wash. — Pacific Northwest National Laboratory broke ground Tuesday on a first-of-its-kind facility that could accelerate scientific discoveries about the microscopic organisms living in soil—organisms that may hold the key to growing more food and developing new energy technologies.The Microbial Molecular Phenotyping Capability, or M2PC, represents a significant investment in automation and artificial intelligence to speed up research that traditionally takes years to complete. The 30,800-square-foot facility will house more than 100 connected automated instruments designed to study microbes at a pace and scale never before possible.Reshaping Agriculture's FutureThe M2PC facility will not put a new tool directly into a farmer's hands tomorrow morning, but it is actively reshaping the commercial pipeline to solve agriculture's biggest headache with biologicals: inconsistent field performance. For years, PNNL researchers have explored how microbes work and how they might help produce useful materials, advance energy technologies, and address challenges involving critical materials and minerals. But those experiments have been limited by what researchers could accomplish by hand."They can be used to provide nutrients to a plant so that the plant would grow more. So, like increasing your crop productivity, for example," said Douglas Mans, PNNL's Associate Laboratory Director for Integrated Discovery Sciences.PNNL's own research shows soil microbes can help plants access nutrients and withstand drought—benefits that could prove crucial as farmers face growing environmental pressures. The M2PC facility will allow scientists to identify and optimize useful microbes faster than ever before, accelerating the development of biological solutions that actually work consistently in the field.What Makes M2PC UniqueThe Microbial Molecular Phenotyping Capability differs from traditional research labs because it operates as a first-of-its-kind, AI-enabled autonomous laboratory designed to shrink experimental timelines from years down to months or weeks. The M2PC lab will connect more than 100 automated instruments to grow microbes, prepare samples, measure their behavior, and link observations to the molecular processes behind them. Artificial intelligence will help analyze results and guide the next experiments, allowing scientists to explore more questions faster.Deb Gracio, PNNL Director, emphasized the transformative potential during Tuesday's groundbreaking ceremony: "Research that has taken years will become possible in months and hopefully in weeks."That acceleration is already being demonstrated. PNNL's smaller automated lab, called the Anaerobic Microbial Phenotyping Platform or AMP2, completed three experimental cycles in just 72 hours—a process that normally would have taken about six months."That normally would have taken us about six months … and we were able to do that in 72 hours," Mans said.The AMP2 laboratory is not being closed or replaced. Instead, the current 1,800-square-foot laboratory serves as an active prototype and precursor for the much larger M2PC facility. AMP2 will continue operating as a separate lab designed to run anaerobic experiments—those conducted in the absence of oxygen—while M2PC will focus on aerobic research.Broader Applications Beyond AgricultureWhile improving crop productivity is one important application, the M2PC facility is designed to support research into multiple areas critical to national priorities. The lab will advance research into biofuels, manufacturing materials, and energy technologies. It will also help researchers understand how microbes respond to environmental changes and how to design biological systems for biotechnology applications.As a flagship component of the Department of Energy's Genesis Mission, M2PC represents a significant investment in using artificial intelligence and automation to accelerate U.S. scientific discovery. Dorothy Koch, Associate Director of the DOE Office of Science Biological and Environmental Research program, highlighted the facility's importance during the groundbreaking."M2PC will accelerate biological discovery and design," Koch said, noting that the facility is expected to conduct a minimum of 500 strain experiments per week, 100 microbiome experiments per week, and take a million measurements per month.Economic Opportunity for the RegionBeyond the scientific breakthroughs, the M2PC project represents significant economic opportunity for the Tri-Cities region. The facility will require hiring automation engineers, AI experts, technicians skilled in operating robotics, and specialized craftspeople to build and maintain the sophisticated equipment."We're anticipating that type of hiring," Mans said when asked about job creation.PNNL has already begun recruiting talent nationally and internationally for positions related to the smaller AMP2 lab, bringing automation engineers from cities like Boston and San Francisco to work in the region. The M2PC facility is expected to accelerate that trend."This capability won't really exist anywhere else in the world," Mans said, suggesting the facility could become a draw for scientific talent seeking to work on cutting-edge biotechnology research.Timeline and Next StepsThe M2PC facility is expected to open in 2029. Between now and then, construction crews will level and prepare the ground, while the building takes shape. Simultaneously, Ginkgo Bio Works, the automation contractor, will build the facility's automation components off-site so they can be installed as the building is completed.In the interim, PNNL researchers and the broader scientific community will begin planning the first experiments to be conducted in the facility, ensuring research is lined up and ready to begin as soon as the doors open.The groundbreaking ceremony included representatives from the Department of Energy, PNNL leadership, and elected officials at the federal, state, and local levels, underscoring the project's significance to the region and the nation's biotechnology future. News The U.S. Department of Energy Secretary tours Pacific Northwest National Laboratory Dan Hanson, Apple Valley News Now News Beyond DNA: Scientists Explore New Frontiers in Biology Research Dan Hanson, Apple Valley News Now News TRIDEC optimistic that Hanford, PNNL will see funding in national budget Robert Desaulniers News Big picture science: monitoring the Yakima River Basin News PNNL research could shape the future of fighting fentanyl COPYRIGHT 2026 BY APPLE VALLEY NEWS NOW. ALL RIGHTS RESERVED. THIS MATERIAL MAY NOT BE PUBLISHED, BROADCAST, REWRITTEN OR REDISTRIBUTED.
CT launches health insurance subsidy for child care workers
Connecticut officials on Wednesday announced that eligible staff in the early childhood sector can now apply for a subsidy toward health insurance plan premiums, a benefit connected to the ambitious […]
Tyrone Tracy News: Steelers, Giants Connected In Trade Rumors
Tyrone Tracy is still a member of the New York Giants, but that may not be the case for long. A former fifth-round pick in the 2024 NFL Draft, the Purdue product began his career on a relatively high note. Appearing in all 17 games while making 12 starts, the rookie finished his inaugural campaign …
Preparing for cascading climate risks
Arizona communities already understand that climate hazards rarely occur in isolation. Extreme heat can drive up electricity demand, drought can increase wildfire risk, and flooding can disrupt transportation, water systems, housing and local economies. Because these systems are connected, a disruption in one can quickly threaten public health and safety.
GTA VI not yet gold: Rockstar explains the final push before launch
Grand Theft Auto VI has yet to go gold ahead of its scheduled November 19, 2026 launch, with Rockstar developers telling Bloomberg that final fixes and refinements remain underway. The report examines how the game’s complex, interconnected systems have shaped development, though ongoing work does not itself signal another delay.
Jauan Jennings Trade: Raiders, Vikings Connected In Rumor
Jauan Jennings has not lived up to expectations with the Minnesota Vikings, and the team could part ways with the veteran receiver before the trade deadline. A seventh-round pick in the 2020 NFL Draft, the Tennessee product spent his early years in a supporting role before earning more snaps later in his career. He first …
Lions Trade Buzz Heats Up Around $20M Cornerback
Now that the Detroit Lions have moved on from pursuing Joey Porter Jr., it appears the cornerback most connected to the team is Kristian Fulton of the Kansas City Chiefs. Jeremy Fowler of ESPN poured more fuel on the speculation fire by offering Fulton as a strong option to tie to the Lions before the […] The post Lions Trade Buzz Heats Up Around $20M Cornerback appeared first on HEAVY.
Considering a healthcare career? Check out these sessions
The IU Health workforce training organization is adding an orientation to help Indianapolis residents get connected with jobs in healthcare.
At Meta Connect, the company's smart glasses were everywhere
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Calling all current and future scientists: Kiel is the place to be this week
This week, Kiel has become a meeting place for science in Europe. Researchers, school pupils, young scientists and members of the public are coming together through a series of major events led or co-organised by Kiel University.At the centre of it all are around 150 of Europe’s most talented young researchers, aged 14 to 20, who have travelled to Kiel from nearly 40 countries for the 37th European Union Contest for Young Scientists (EUCYS). Running from 22 to 27 September, the European Union’s flagship competition for young scientists brings together winners of national science competitions to present around 100 original research projects across fields ranging from engineering and computer science to medicine, environmental research and the social sciences. The winners will be announced at the Award Ceremony on Saturday.For Kiel University, hosting EUCYS is both an honour and a natural extension of a much longer story. Germany’s northernmost comprehensive university has invested for many years in supporting young scientific talent and bringing research into dialogue with society. The Kiel Science Factory gives school pupils opportunities to experience research first-hand, while programmes such as Rent-a-Scientist send researchers directly into local classrooms. Major annual public events including Kiel Week and the European Researchers’ Night take science beyond the campus through talks, exhibitions and hands-on activities.That long-standing commitment has increasingly taken on a European dimension – and this week, many of those efforts are coming together.One of the foundations for this success is the European Researchers’ Night (ERN), which celebrates its tenth edition in the Kiel region this year. The initiative is funded through the Marie Skłodowska-Curie Actions, with Kiel University developing the successful EU proposals and securing the funding, while regional partner KielRegion coordinates the many activities on the ground. Together with research institutions, schools, companies, local authorities and civil society, they have built ERN into a major platform for public engagement.Over the years, Kiel’s ERN programme has grown far beyond a single evening into a whole “Science Summer”, beginning with “Science Shopping” in spring and culminating tomorrow, 25 September, in Science Day.“We have developed a wide range of public engagement formats, often together with the other research institutions in the region, the city and regional authorities, schools, companies and civil society,” says Eckhard Quandt, Kiel University’s vice president for research, academic infrastructure and transfer. “Over the past decade, we have increasingly taken this commitment to the European level.”That combination of European funding expertise and strong regional partnerships also helped Kiel University take the next step. Drawing on its experience with ERN and its European networks, including the SEA-EU University Alliance, the university brought together Brest in France and Split in Croatia for a successful bid to the EU’s new Science Comes to Town initiative. Throughout 2026, the three cities are serving as Europe’s first Science Ambassadors, with more than one thousand activities bringing science into schools, public spaces, cultural venues and everyday life.EUCYS is perhaps the clearest example of how Kiel University is using Science Comes to Town to create new connections between major European initiatives. From the outset, the university deliberately planned the contest for the week of European Researchers’ Night and opened the EUCYS exhibition to the wider Science Day audience. Tomorrow, that means thousands of visitors can encounter the next generation of scientific talent first-hand, while the young researchers themselves gain a much bigger public stage.“Because we opened EUCYS up for European Researchers’ Night, there will be a lot of people actually visiting the exhibition,” says organiser Stefanie Altemark of Kiel University.“We wanted Europe’s most talented young scientists not only to compete with one another, but also to become visible to the wider public. At the same time, people in Kiel will have the opportunity to see what the next generation of scientists are already capable of,” says Quandt.“We’ve shown over the last years that science is a big part of Kiel, and it’s always been the goal to not only show that to people in Germany, but also to show it to people all over Europe. Thanks to Kiel University’s expertise in European funding programmes, we have been able to turn that ambition into reality,” says Sünje Fock, who is coordinating the Science Summer at KielRegion.The model is characteristic of Kiel University’s approach: combining European funding expertise and international networks with strong regional partnerships to give major initiatives greater reach and visibility.This year also marks the 30th anniversary of the Marie Skłodowska-Curie Actions, giving Kiel University the special opportunity to welcome Vanessa Debiais-Sainton, Head of Department for the Marie Skłodowska-Curie Actions at the European Research Executive Agency, to Kiel tomorrow. Her visit brings together two priorities that have shaped Kiel University’s work over the past decade: supporting researchers and bringing science closer to society. Debiais-Sainton emphasises how closely the two are connected: "For thirty years, the Marie Skłodowska-Curie Actions (MSCA) have given more than 150,000 researchers the chance to pursue their dreams and open up new fields. Doctoral Networks and Postdoctoral Fellowships give them the freedom to move, to connect, to train and to follow their curiosity across borders, sectors and disciplines. But excellence cannot live only in laboratories. Researchers’ Night takes science out of the lab and into the city, to the families, the schoolchildren and the curious minds who will become the next generation. Kiel shows what that looks like at its best. That is the MSCA promise: open science, open borders, open doors."For Kiel University, these activities are not separate endeavours. They are part of a broader understanding of academic excellence in which outstanding research, talent development, international cooperation, knowledge transfer and engagement with society strengthen one another.“For me, one of the most important lessons from the past decade is that scientific excellence, knowledge transfer, talent development and engagement with society cannot be treated as separate tasks,” stresses vice president Quandt. “They reinforce one another.”That philosophy is also reflected in Kiel University’s current bid for Germany’s Excellence University status. The designation is part of Germany’s national Excellence Strategy, which provides substantial long-term funding to selected universities to strengthen internationally competitive research and their overall institutional development. A successful outcome would provide new opportunities to build on what has already been created: deepening international cooperation, creating more opportunities for knowledge exchange and public engagement, and extending the university’s reach across the region and beyond. “If we are successful, it would allow us to take what we have built in Kiel considerably further – including expanding our networks and transfer activities beyond the region and increasingly across the Baltic area,” says Quandt.This week’s events offer a glimpse of what that could mean in practice: a university using its research strength, European expertise and regional partnerships to create opportunities for scientists at every stage of their careers while making science more visible, accessible and exciting to the wider public.
“The game is connected…Any time you have live-ball …
“The game is connected…Any time you have live-ball …
Geotab receives Business Intelligence Group's 2026 Sustainable Transportation Award
/PRNewswire/ -- Geotab Inc. ("Geotab"), a global leader in connected operations, video telematics and AI-powered insights, today announced it has been named a...
Breast Cancer Care and Heart Health: What Black Women Need to Know
Black women face disproportionately high rates of heart disease and breast cancer mortality. Understanding how both are connected can help women advocate for screening, treatment and follow-up, say experts with Baptist Health.
Presley Gerber’s ex says they’re ‘connected for life’ in emotional tribute 1 week after his death
Gerber, the only son of Cindy Crawford and Rande Gerber, died of a “suspected overdose” at age 27 on Sept. 20.
Misericordia University to Host Healthcare Symposium with Presenting Sponsor Geisinger
Misericordia University’s College of Health Sciences and Education, with Geisinger as Presenting Sponsor, will host the 2026 Healthcare Symposium, “Connected Care: Aligning Education, Innovation & Community Health,” on Friday, Oct. 23, from 8 a.m. to 5 p.m. in Lemmond Theater on the University’s Dallas campus.
Student voters say they feel disconnected from politics, candidates, political campaigns
On Tuesday, Nov. 3, the 2026 election will fill more than 577 positions, ranging from the U.S. Senate – Ohio to county officers like Summit County Common Pleas Court Judge. Students at the University of Dayton are split on whether they plan to vote, with some citing it as their civic duty and others feeling...
‘An opportunity to compete’: DC-area small businesses connect with big institutions
Small minority-owned construction businesses in the D.C. area connected with large contractors at an event at Georgetown University’s Capitol Campus Monday.
Introspection required if EU Inc fails, says start-up lobbyist
European start-ups have a new voice in Brussels. Startups for Europe, created from the merger of lobby groups Allied for Startups and the European Startup Network, is hoping to harness the momentum behind EU-Inc, a campaign that united start-ups and investors behind demands for a new pan-European company regime.At a launch event for the new association in Brussels on October 1, the mood was remarkably upbeat compared to a typical Eurobubble gathering, more Silicon Valley than Schuman roundabout.When asked whether this reflects a feeling that Europe is on the right track, chief executive Serena Borbotti-Frison said it’s a “scary” moment as the continent looks to boost its competitiveness amid a new technological arms race.“What is at stake is quite intense, and the way we can answer is by delivering, but also with hope,” she told Science|Business. “It’s what our industry does. It’s not about identifying a pain point and then saying it’s too hard.”For many in the start-up community, that sense of hope is dwindling. In March, the European Commission presented its proposal for EU Inc, naming its initiative after the grassroots campaign.EU Inc was meant to be a gamechanger: the ability to incorporate within 48 hours for less than €100 and scale up across Europe; a harmonised stock option regime enabling start-ups to compete for talent; and simplified insolvency procedures for innovative start-ups to reduce the cost of failure.However, haggling by EU governments has raised concerns that EU Inc will be stripped of the very features, including stock option harmonisation, that are meant to make it attractive for companies.“I fear we are proving to ourselves that the model doesn’t work,” Borbotti-Frison said of the policymaking process. “Everyone agrees we should have EU Inc. Everyone agrees it’s hard to scale and we need to scale to answer the competitiveness [challenge], and still we cannot deliver? [. . .] What does that say about ourselves?”The Commission has made EU Inc a cornerstone of its single market reform, and has agreed with the European Parliament and the Council of the EU to target an agreement by the end of 2026. However, several points are currently holding up an agreement, including national rules around employee participation in management decisions, and the provision that employee stock options always be taxed at the point of sale. Some EU governments have reportedly pushed back on the Commission’s choice of legal basis, contending that anything related to taxation requires unanimity in the Council.Trade unions have also protested against EU Inc, fearing it will be exploited by companies looking to undermine workers’ rights.“If this doesn’t work, it’s introspection time, on the way our institutions work, maybe the way our lobbies work, and maybe the way the cooperation between them works,” Borbotti-Frison said.“Is it in the national interest? Is it a gap between political will and technical ability to operate? Is it speed? I don't know, but something needs to be fixed.”Ahead of last week’s European Council meeting, EU-Inc campaigners tried a new strategy: appealing directly to EU presidents and prime ministers. In an open letter, they urged EU leaders to “step in and give your negotiating teams a clear mandate to change course and reverse their objections to the Commission’s original proposal.”Lessons from EU-IncLike its predecessors, Startups for Europe will represent national start-up associations, but it is also targeting investors. The founding sponsors are venture capital firm Atomico and EQT, the investor selected earlier this year to manage the €5 billion Scaleup Europe Fund.It also wants to harness the knowledge and cross-border experience of European success stories. “Take the list of the 100 biggest unicorns in Europe. We are speaking to all of them,” Borbotti-Frison said. The association plans to publish a full list of supporters following the Slush tech conference in Helsinki in November.Andreas Klinger and Simon Schaefer, two key figures in the EU-Inc campaign, are both on the board of the new association, and Startups for Europe wants to take the lessons from their campaign.What was unprecedented about EU-Inc was “how rooted it was, and how strong it was in bringing everyone on board behind one clear pain point and solution to fix it,” Borbotti-Frison said. “This is an inspiration for us, and then we need to turn it into something more systematic, more bridged in Brussels, more connected to the policymaking game, and to scale it.”If it’s possible to unite such a broad coalition, it’s because the European start-up ecosystem is now mature, she said. “Maybe it was not ten years ago. Maybe it was not five years ago. But now, it’s mature to speak with one voice.”Open and liberal EuropeThe association plans to campaign on files related to three “pain points,” Borbotti-Frison said: “start and scale in Europe, fundraise and invest in Europe, and making Europe the most innovative continent.”As well as EU Inc, she cited public procurement, the EU’s simplification push, the Savings and Investments Union, and files related to AI adoption and technological sovereignty as priorities for the coming months.What these files have in common is that they relate not to subsidies but to the framework conditions influencing the availability of mostly private, or in the case of procurement, public, funding.Related articlesEmployee participation disagreement delays MEPs’ vote on EU IncCommission urges EU governments not to water down EU IncEU’s ‘ultra-fast’ €5B scale-up fund is set up to win, says its fund managerThe budget dispute over the next Horizon Europe programme will also impact start-ups, which are supported notably through the European Innovation Council. But EU innovation funding is a drop in the ocean compared to venture capital and public procurement budgets.“If competitiveness and innovation are a priority, then the [EU budget] should reflect it,” Borbotti-Frison said. However, she added that the main question is not how much public money is invested, but “how do we create the right conditions for the market to solve the problem?”The Scaleup Europe Fund mixes both approaches, using €1 billion in EU funding to crowd in private investors and address Europe’s lack of large-scale, late-stage growth funds. “It’s a proof of concept. Ideally, then the market will do it itself,” Borbotti-Frison said.Startups for Europe is also focused on bringing an alternative political narrative. Amid competing visions for open, global markets on the one side and a protectionist Europe on the other, it wants to offer “a third voice, to say we can be proudly European and build a strong continent in a liberal economy, open to the world, and global.”It can be tempting, when thinking about how Europe can better support innovation, to look across the Atlantic. But while it’s important to compare statistics to see where Europe needs to catch up, that’s where the comparison should stop, Borbotti-Frison said. “On everything else, we need to do it our own way. We don't have the same history. We don't have the same political model. We don't have the same way of life.”Many of the key files that could benefit the start-up community, including EU Inc and the Savings and Investments Union, rely on closer integration within Europe, making it easier to operate across borders.While the Commission has made deepening the single market a political priority, support at national level is more precarious. The coming months will see pivotal elections in Spain and France, while the German government has also been coming under pressure domestically. In each country, far-right parties have been gaining ground.When asked if she was concerned the political situation could jeopardise this progress, Borbotti-Frison responded: “Of course. I would be lying if I said I wasn’t.” However, she continues to believe that cooperation is the only way forward. “Doing it alone is not the solution. It’s also not who we are, it’s not the model we are building, and it’s not the scale we need.”
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EPCO was born from the EU-PolarNet projects funded through Horizon 2020 and currently coordinates the EU Polar Cluster, a network of EU-funded collaborative polar projects.While the practical details remain to be defined, the decision sends “a clear and positive signal,” said Maria Grigoratou, head of EPCO and executive secretary of EPB. “By reinforcing EPCO, the Commission has an opportunity to build on the legacy of EU-PolarNet 2, strengthen European polar research coordination and expand cooperation with a broader range of Arctic stakeholders,” she told Science|Business.The move has been welcomed by the polar research community. “The polar research hub could play an important role in connecting existing research communities, observation systems and infrastructure, and in bringing scientific knowledge closer to policymaking, in cooperation with local communities and Indigenous people,” said Katrine Moland Hansen, director of operations at Norway’s Nansen Environmental and Remote Sensing Center.But money will be an issue. “It is clear that EPCO will need more resources and structure to function well and to make research reach policymakers,” said Kati Lindström, vice-chair of the Polar Research Committee of the Estonian Academy of Sciences. “European polar research is big if we pool the resources, and it should not only be left to enthusiastic scientists to develop networks of strategic importance in their free time.”The Arctic strategy makes a point of saying that local communities should have a greater involvement in Arctic science. “All EU Arctic research consortia are mandated to invite Indigenous people representatives to participate in projects,” it reads. “The EU also supports research that is directly led by Indigenous communities and address their challenges.”It also underlines the importance of reinforcing collaboration with like-minded partners such as Norway, Iceland, Canada, the UK, Japan and South Korea, as well as deepening its engagement with NATO. This includes the US, with which “the EU is committed to continuing a pragmatic transatlantic engagement based on shared interests and values.”Related articlesViewpoint: Does Europe dare to invest in the Arctic?Anchor Greenlanders in Arctic climate research, experts tell EU ahead of policy updateFor Moland Hansen, this open and inclusive approach to cooperation is encouraging. “The Arctic is also a strong example of why equal participation of associated countries in EU funding instruments matters.”Overall, she finds the new Arctic strategy to be ambitious, timely and comprehensive. “We particularly welcome the recognition that climate change, environmental protection, security, resilience and competitiveness are closely interconnected,” she said. “Research, observations and forecasting capabilities are essential to understanding the rapid changes taking place in the Arctic and addressing these challenges together.”Security focusWhile the Arctic strategy foregrounds security, with pledges to protect undersea cables, boost satellite monitoring, deploy more icebreakers and improve military mobility, the polar community is satisfied that environmental concerns have not been forgotten.“It is inevitable that there is a strong security angle to the EU Arctic strategy, but the impact of climate change and need for climate mitigation and resilience is also strongly recognised and includes a pledge to stay the course on climate commitments,” said Sian Prior, lead advisor to the Clean Arctic Alliance, a coalition of campaigning non-profit organisations.“We need to remember that by the time the next Multiannual Financial Framework comes to an end, in 2034, the polar regions, especially the Arctic region, will be living under a new reality when it comes to ecosystem processes, when it comes to the climate,” Grigoratou went on. “And that will affect any ambition that humans may have in the region.”Lindström agreed. “All aspects of European security are dependent on climate change in the Arctic and consequently, on climate science,” she said. “We cannot close our eyes to issues like energy security, critical minerals, northern shipping routes, dual-use technologies and others. However, it remains to be seen how well the promises to protect the environment and Indigenous rights will hold when faced with critical mineral extraction under the Critical Minerals Act.”
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Instead, he sees their role changing as AI becomes capable of handling more of the repetitive tasks involved in computer-based work. “Everything’s converging on just AI basically doing all the grunt work,” Butler said. The bottom of the cognitive pyramid Butler is from Lennoxville, completed his undergraduate studies at Bishop’s and later earned his PhD at the Université de Sherbrooke. He joined Bishop’s in 2019 and now chairs its Department of Computer Science. He uses AI in research, teaching and other creative work, and said the technology is increasingly capable of handling routine digital tasks that once required substantial human time. “You’ve got the grunt work, like moving things around in Excel, doing basic programming tasks,” Butler said. “That’s like the bottom grunt work that the entry-level worker would have done two or three years ago.” Butler went further, saying in his view that much of this type of work has already been absorbed by AI tools. He connected that change to a shift he sees taking place in computer science, where entry-level roles have declined while experienced workers can use AI to increase what they can produce. “A senior developer now has access to essentially an unlimited amount of junior developers on demand,” Butler said. He was describing AI systems metaphorically, not literal employees. His point was that one experienced developer can now ask AI tools to produce code or other technical work that might previously have been assigned to more junior workers. That raises a broader question for universities and employers. If some of the simpler work traditionally given to newcomers can now be done by machines, how do people gain the experience needed to become senior workers themselves? Students doing work that once required years of programming Butler said he is already seeing the change inside his classroom. He created a Bishop’s course called CS208, Coding in Plain English, to show students — including those without traditional programming backgrounds — what they can accomplish using AI. Some come from disciplines such as psychology or neuroscience with no previous programming experience. “What I’m finding is that students who have zero programming experience, they come in from another discipline like psychology or neuroscience or something, they are now able to get up and running with real data sets,” Butler said. Butler’s own doctoral work involved neuroimaging, and he said he has assigned students work he considers comparable to the kinds of analysis he performed during his PhD. He described giving students a real dataset, an expected result and instructions to use AI to complete the analysis. Butler said those students have been able to carry out work at a level he associates with tasks he once performed after years of programming experience. That does not mean a student using AI instantly acquires the same knowledge as an experienced computer scientist. But Butler sees it as evidence that AI can dramatically lower the technical barrier between having a problem to solve and producing a working result. The role of the person using the system then changes. They need to know what to ask for, understand enough about the subject to judge the answer and take responsibility for what is ultimately produced. What about AI hallucinations? One persistent concern surrounding generative AI is hallucination — when a system produces information that sounds convincing but is false or unsupported. Butler said that problem has improved substantially in newer systems and is not as severe as it was with earlier models. He pointed in particular to newer AI systems’ ability to search the web, consult scientific databases and return source links rather than simply generating a citation from their internal model. Butler nevertheless said users should verify what AI produces. “You should verify,” he said while discussing citations generated with AI. His position is that hallucinations have become less common in the systems he uses, not that incorrect AI output is impossible. Human checking remains part of the process. Hours of work compressed Butler offered another example from his administrative work at Bishop’s. The university has been comparing CEGEP courses with first-year Bishop’s courses to determine where students may qualify for advanced standing. Traditionally, Butler said, that means reviewing two sets of course descriptions and manually matching one institution’s courses with another’s. As department chair, that could require hours of reading and comparison. He said AI can now be given both sets of material and asked to generate an initial mapping automatically. “It saves me hours and hours of work,” Butler said. Butler said the AI-generated mapping can also produce a better result than he would produce himself. He sees similar opportunities in businesses. A company may receive specifications, drawings, emails or other digital material from customers and then have employees convert that information into an internal format before anything can be manufactured or delivered. AI can increasingly perform parts of that intermediate processing. In Butler’s view, the employee does not necessarily disappear. Instead, the job becomes more about checking the result. “The human is still there,” he said. Judgement could become more valuable That change is central to Butler’s view of where digital work may be headed. If AI can produce a first draft, write basic code, compare documents or process large amounts of information, he argues that knowledge and judgement become increasingly important. “The real scarce resource going forward is going to be domain knowledge, expertise, and… credentials, authority, the ability to work with other people,” Butler said. He is therefore encouraging students not only to learn AI tools but also to broaden their education. He mentioned acting, fine art and photography as examples of courses that can help develop what he described as taste and intuition — the ability to recognize what is good, what is not and what should be changed. “And that’s the skill that they need now because the grunt work has been automated and now it’s about evaluating what the AI produces and telling it how to improve or expand the output,” Butler said. That does not remove the need for technical knowledge. Butler’s argument is that the emphasis may shift away from manually completing every step of a task and toward directing, checking and improving work produced with AI assistance. He also stressed that humans remain responsible for final decisions. “At the end of the day, the human has to make the final call,” Butler said, pointing to the question of accountability. Physical work may be different Butler draws a distinction between digital work and jobs requiring people to manipulate the physical world. He expects AI to continue advancing quickly in tasks performed almost entirely on computers. He is more cautious about claims that humanoid robots will soon be able to replace workers such as plumbers or electricians. Butler said those trades would not be replaced “anytime soon” in his view and described some current robotics demonstrations as overhyped. He described the situation as counterintuitive. “It’s almost like we solved the highest level first,” he said, contrasting advances in digital AI with the harder problem of building robots capable of operating reliably in the physical world. Butler’s argument is that some digital occupations could face automation sooner than trades requiring complex physical work. The wider AI shift in the Townships Butler’s comments come as local institutions are increasingly grappling with how AI should be used. The federal government recently announced up to $162 million over five years for 10,000 AI-related placements through Mitacs. The Université de Sherbrooke told The Pulse that the number of its collaborative research and innovation projects supported through Mitacs has approximately doubled since 2018-19, while the number of placements has approximately tripled. UdeS also said it already has projects involving both AI adoption and the application of AI to other fields. At Bishop’s, Butler said part of his role involves building the Computer Science department’s local presence, connecting students with regional partners and strengthening relationships with the Sherbrooke technology ecosystem. Those developments put universities in a difficult position. They have to prepare students to use the tools employers increasingly have available while also making sure graduates understand enough to recognize when those tools are wrong, incomplete or being applied to the wrong problem. The risk of losing human skills Butler does not see AI as risk-free. Later in the interview, he raised a separate concern: as AI becomes better at reading, writing, programming and other cognitive tasks, people could lose some of the underlying skills that historically helped produce new ideas. “The other danger is that we’re going to lose the human skills,” Butler said. He specifically mentioned reading and writing and argued that people could lose some of the lower-level understanding that contributes to breakthroughs. Butler said AI systems are based on existing human knowledge and argued that they become much more powerful when paired with a capable person. That tension runs through his view of the technology. AI can remove hours of routine work. It can allow beginners to perform tasks that once required substantial technical training. It can give experienced workers significant leverage. But the more capable the technology becomes, the more important it may be for people to develop the judgement needed to decide what should be done in the first place. For Butler, that is where education may have to change. Students still need to understand their field. They still need to know when something is wrong. And they still need to be able to make the final decision. But if AI increasingly handles the bottom of the cognitive pyramid, the value of a worker may depend less on how quickly they can perform the grunt work and more on whether they understand what the work is supposed to accomplish. Don’t miss the next story that affects your community. Join thousands of readers getting The Pulse every morning—plus breaking news alerts when it matters most. If you value this kind of local journalism, consider supporting it. Subscribe, share and like! Subscribe Share
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