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Results for " flex " 523 found 🔀 AI-powered Shuffle

Looking for the ultimate car 'flex'? Buy a sedan with a V12 engine, insiders say

The Mercedes-Maybach S 680 sedan is available in very few markets.

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Jul 25 • 5:10 AM EDT • Technology • abcnews.com
Vanderbilt Staffing Collaborative expands workforce flexibility across Vanderbilt Health

By providing greater staffing stability, the VSC equips nursing leaders with scheduling alternatives that reduce mandatory overtime and on-call shifts for their teams.

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Jul 24 • 11:48 AM EDT • Health • news.vumc.org
High School Science That Teaches an ID Perspective? Yes, Please!

Kristin Marais and Summer Edwards explain why they’re so passionate about teaching their subject and how the courses are designed with maximum flexibility.

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Jul 24 • 10:47 AM EDT • Science • scienceandculture.com
Nestlé to sell half of waters business in $3.4B deal

Peranel, which will house brands such as S.Pellegrino and Source Perrier, will be a fully independent company and have full flexibility to “pursue growth opportunities.”

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Jul 24 • 7:18 AM EDT • Business • fooddive.com
UNC turns to LLC model as college sports money game shifts

UNC is creating an LLC to manage key athletics programs, aiming for more flexibility and new revenue in a fast-changing college sports landscape.

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Jul 23 • 11:30 AM EDT • Sports • sports.yahoo.com
You Can Now Fly Delta Business Class for a Lot Less, but There’s a Catch

Travelers can now book cheaper premium cabin tickets on Delta, but they’ll give up flexibility, lounge access, and other perks depending on the fare.

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Jul 22 • 6:35 PM EDT • Business • inc.com
Smart Tips to Maximize Your NASCAR Weekend at New Hampshire Motor Speedway

At New Hampshire Motor Speedway, fans get more than just racing — they get great value. New England's only NASCAR Cup Series weekend features affordable tickets, free parking, flexible camping options and inclusive entertainment like live music and fan experiences.

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Jul 22 • 5:00 AM EDT • Entertainment • nhms.com
Trump flexes GOP muscle in Arizona primaries as Dems dodge far-left upset

Arizona’s primaries put Trump’s GOP influence on display and set the stage for high-stakes governor and House races in November.

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Jul 22 • 1:07 AM EDT • Politics • foxnews.com
Carolina Hurricanes To Launch Own Sports Network For Game Broadcasts

The NHL franchise is taking control of its local broadcasts, ditching traditional regional networks to deliver innovative programming and flexible viewing options directly to Canes fans.

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Jul 21 • 2:59 PM EDT • Sports • sports.yahoo.com
Financial incentives, flexibility and safe living needed to retain remote health care workers

Appropriate housing and safety, adequate time off and financial incentives are among the key factors supporting primary health care workers in remote jobs across Australia, according to a new study by ...

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Jul 21 • 11:40 AM EDT • Health • medicalxpress.com
How to Use Flexible Funding Strategies in Public Health

Use this toolkit to incorporate flexible funding strategies into your public health agency's operational and project management procedures.

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Jul 21 • 9:00 AM EDT • Health • astho.org
Davenport University launches business degrees that save students time and money

This story is one in a series about Davenport saving students time and money Davenport University is introducing two innovative business degree pathways this fall that give students more affordable and flexible options for earning a college degree in less time without compromising academic quality. The new programs reflect Davenport's ongoing commitment to improving access to higher

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Jul 20 • 8:18 AM EDT • Business • post.davenport.edu
Being a caregiver can be both emotionally demanding and rewarding

Careb Bien-Aime enjoyed the flexible hours and getting to help people as a home health aide while studying in college.

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Jul 18 • 8:17 AM EDT • Health • businessinsider.com
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Being a caregiver can be both emotionally demanding and rewarding

Careb Bien-Aime enjoyed the flexible hours and getting to help people as a home health aide while studying in college.

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Jul 18 • 8:17 AM EDT • Business • businessinsider.com
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Bizcap US Launches, Bringing Fast, Flexible Funding to SMBs

VICTORIA, AU / ACCESS Newswire / July 17, 2026 / Global non-bank funder Bizcap has officially launched in the US, expanding its international footprint and bringing its proven funding model to one of the world's largest small business markets. Already ...

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Jul 17 • 4:10 AM EDT • Business • finance.yahoo.com
Couple making $120,000 with laundromat side hustle as passive business trend booms

The couple hopes the unexpected booming business will create more flexibility and freedom in the future.

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Jul 15 • 10:57 PM EDT • Business • au.finance.yahoo.com
Flex Raises $70 Million to Improve Payments for High Net Worth Business Owners

Business banking platform Flex raised $70 million in a Series B1 round to expand its business finance, payments, private credit, and ERP offerings while doubling its workforce.

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Jul 15 • 6:45 PM EDT • Business • finovate.com
The States Try to Topple WarnerMount…Thus Begins the Local Antitrust Era

(Welcome to the “Most Important Story of the Week”, my bi-weekly strategy column analyzing the most important (but often not buzziest) news story of the last two weeks. I’m the Entertainment Strategy Guy, a former streaming executive who now analyzes business strategy in the entertainment industry. Please subscribe.) Well, it looks like it’s time for another strategy column. Can I finally avoid writing about M&A? No, it seems I cannot. Admittedly, I’m a week early with this column, since I usually put it out every other week. But this news couldn’t wait. This will make three “Most Important Stories” in a row with a merger or acquisition as its centerpiece. First, Roku-Fox (an acquisition), then Comcast-NBCUniversal (a divestment!), and now the State AGs and the WGA’s lawsuits against Paramount’s pursuit of Warner Bros. Discovery (antitrust). M&A is usually the “most important” topic any given week, simply because a giant company merging or breaking up (or preventing those outcomes) can have the biggest impact on the streaming board. If you think about these companies as players in a game, changing the number of players is one of the biggest changes you can make. I shouldn’t really complain, either, since this lawsuit is very good news for customers and suppliers (econ speak for talent, workers and indie studios in Hollywood). So let me answer some questions about this potential trial, along with (shudder) making some heavily caveated predictions. I’ll also look at whether Hollywood must consolidate, whether or not the states can win, trouble at X-Box, Netflix’s YouTube binge, and more. Plus, I have five images that visualize this merger and the harm, including three brand new data looks you’ve never seen before. Subscribe Most Important Story of the Week - Can The States and the WGA Stop Hollywood’s Consolidation (Crisis)? If every other newsletter and news outlet is writing about the same story, I try to avoid writing about it as well, but I can’t ignore a story this consequential. The story of the last year was the fate of Warner Bros. Discovery, and this development potentially extends that saga into 2027. As I tried to figure out my angle, I realized, like my last column, I’m again faced with a series of questions. These questions, though, are much more forward-looking. Will the states win? Will the WGA win? If so, what happens to Warner Bros. Discovery? Either way, will this chill the market for future mergers? So you know what that means: predictions. About the future, no less, the hardest thing to predict.1 Just remember: nothing here comes with a guarantee. And the more confident someone is in their predictions, the less you should trust them. This situation is incredibly fluid, nuanced, uncertain and tenuous. So let’s try to explain what may happen. Question: Why File this Lawsuit? I’ll admit, a few months back, I was fairly pessimistic about the fate of this lawsuit. Rumors had started bubbling up that the state Attorneys General (in particular California) wanted to settle with either some minor divestments (usually CNN) or behavioral remedies. And that tracked for me: the states usually settle lawsuits, like the recent John Deere right-to-repair suit. Yet, they plan to fight this. (As they did the LiveNation-Ticketmaster monopolization trial and the Nexstar-Tegna merger.) Honestly, that also makes a ton of sense. Frankly, this move is just good politics for these State AGs. Most are still running for higher and higher office in blue states—some folks have emphasized that only Democratic AGs joined this suit, but given the Ellison/Trump ties, and fears of retribution, that tracks—and a high profile case like this will help them move up the electoral ladder, especially since Paramount and its leadership (the Ellisons, father and heir) have sided with the other side of the political aisle. That makes them unsympathetic to Democratic voters and Hollywood workers in particular. Why did this lawsuit happen? In addition to the very real concerns about industry consolidation, this is why. That said, I don’t think we would have seen this lawsuit for Netflix and Warner Bros., simply because they’re more sympathetic and aligned with Democrats. But those consolidation concerns are real. The “town”—meaning Hollywood and such—really is seeing the damage of mergers on this industry. That’s why the WGA also filed its own lawsuit in defense of workers as well. (Wildcard: What about Europe? Will they try to stop the deal, too? There have been some rumors out of the UK they may try to fight the deal, and UK enforcers just stopped a Getty Images-Shutterstock tie up, so there is precedence. This argument could go either way, though. On one hand, the EU doesn’t need to step in, cause they states are handling it. On the other hand, this could make the EU’s case easier. Just imagine if both sides coordinated. I’ll simply say, “We’ll see!”) Question: Will The State AGs or the WGA Win? Can the state AGs play David to Paramount-Skydance’s Goliath here? That’s really the whole thing, isn’t it? If you know this result, you could make a lot of money. When things are uncertain, it’s tempting to shrug and say, “Eh” meaning it’s a 50/50 proposition. I wouldn’t, though. When in doubt, you should expect that the merging parties succeed. AT&T did successfully buy Warner Bros., after all, and Disney bought Fox without any challenges. Many judges are extremely sympathetic to mergers, and I’d bet the state AGs get a judge who will allow the merger. (Even Obama-appointed judges often allow mergers.) As I understand it, we’ll see two main attacks. First, theatrical films. The AGs are arguing that, when it comes to share of box office and the number of both “wide releases” and blockbuster (or “tentpole”) films, the merging parties will have over 27% market share. Now, the Supreme Court once ruled from on high that any merger that exceeds 30% is presumptively illegal, but that’s guidance, not an ironclad bar. Still, the states will have to argue that this is close to having too much power, and with that power, this will likely further worsen the theater/studio splits in particular. Indeed, as Matthew Stoller pointed out, “just five studios are responsible for 95% of all blockbusters; if this merger goes through, then Paramount and Disney will control 60% of that.” So yes, movie studios will be very concentrated after this merger. Want me to visualize some of that? Well, here’s the share of films that grossed over $200 million at the domestic box office since 2022. (Note: this isn’t all films released in over 3,000 screens, but it is a good look at market power.) First, here are the 43 films by studio: Notice all the blue (Disney), orange (Universal), and purple (Warner Bros)? Yeah, those studios are powerful, and this combines Paramount with one of them. Here’s the look by studio and share of the films that grossed over $200 million: Now, if you look at that and also think, “Huh, should we break up Disney?” I’m with you. I’ve seen some folks poo-poo this idea that this is a real category, but it is! For an upcoming article, I’ve been pulling data on the share of top 100 films at the box office as a share of total box office, and it’s massive. Here’s the chart: (This analysis looks at The-Number’s top 100 films and total domestic box office each year.) To be clear, tentpoles make up 80.7% of the box office each year, so I do think it’s a genuine market. (To be clear, films grossing over $50 million make up 80% of the domestic box office, and films grossing over $100 million make up 64.1%.) I mean, the top 100 films at the box office make up 95% of each year’s grosses. Worse, the combined studios will likely cut output to flex that market power. Everyone can just look at what happened to Disney and Fox to see the precedent. (With fewer films, the remaining theaters have to give more for those few films that remain.) Here’s an image I’ve used a lot, the share of wide-release films from Disney and Fox over time: The AGs will also argue that this consolidation will also impact the cable industry. In this case, the consolidation is actually worse, but that environment is…complicated. Paramount will argue that the cable industry is shrinking. That said, predictions that cable will “go to zero” also don’t look very well supported by the data, as the declines are shrinking, meaning “cable” or “vMVPDs” will likely stabilize at some point. Can the state Attorneys General win on those two main arguments? I honestly don’t know. Again, I’d bet no, since history in general supports that, but it depends on the judge/jury and how they interpret the arguments. Notably, Paramount won’t face accusations about monopoly power in other areas, like streaming, news, sports rights, or vertical integration. I tend to disagree with leaving out sports rights, but I also see the appeal for a simpler case. The states also aren’t really pushing novel theories about labor harm either, which should help. (By the way, Sean McNulty at The Ankler wrote a great run through of potential options, and Capitol Forum also wrote a great paper on theatrical consolidation. Both these pieces predated the lawsuit. Matthew Stoller is also out with his analysis of the pros and cons of the case too.) In some ways, the WGA’s case is even stronger. Quoting Sean McNulty’s summary: “The WGA is citing WARNAMOUNT as crossing a 30% market share in multiple sectors, a number that the Supreme Court has precedent for deeming “presumptively anticompetitive” in a market. According to the WGA numbers, WARNAMOUNT would have represented: - 35% of film writing jobs between 2021 and 2024 - 36% of TV writing projects between 2022 and 2025 - 38% of overall deals between 2021 and 2024” Notably, antitrust enforcers did win recently in the Penguin-Simon & Schuster merger by focusing on labor impact, so don’t count this thinking out. (Wildcard: Will the states try to get a jury trial? Most likely no, they’ll let a judge handle it. If I’m them, though, I’d try to put this in front of a jury. Juries tend to understand monopoly power in a more realistic way than judges faced with legions of economists.) Question: What if They Win? What if They Lose?

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Jul 15 • 4:48 PM EDT • Entertainment • entertainment.substack.com
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Nationals to Recall Top Catching Prospect, Activate Max Kranick

Harry Ford is expected to join the Nationals after the All-Star break, while Max Kranick returns after rehabbing from last year’s flexor tendon surgery.

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Jul 15 • 4:42 PM EDT • Sports • sports.yahoo.com
Essential Strategies for New Science Facilities

First-time lab developers succeed not by intentionally building flexible, partnership-driven discovery ecosystems.

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Jul 15 • 2:46 PM EDT • Science • rdworldonline.com
Essentia Health encourages parents to schedule well-child/teen visits during slow summer months

As families settle into summer routines, Essentia Health is encouraging parents to take advantage of the season’s added flexibility by scheduling well-child/teen visits before school, sports and activities pick back up.

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Jul 15 • 11:32 AM EDT • Health • essentiahealth.org
Samsung says Galaxy Z Fold 8 crease is less visible thanks to ‘Flex Titanium’ display

The Galaxy Z Fold 8 series will get a new foldable display architecture, Samsung admits, which will improve the phone’s...

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Jul 14 • 7:26 PM EDT • Technology • 9to5google.com
Samsung's new foldables will debut new Flex Titanium display on July 22

Ahead of Galaxy Unpacked, Samsung is pulling back the curtains on a new foldable phone feature that will debut at the event.

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Jul 14 • 7:00 PM EDT • Technology • mashable.com
PlayStation FlexStrike Wireless Fight Stick Delayed Without A Firm Release Date

Sorry Marvel Tokon fans, PlayStation's FlexStrike fight stick has been delayed.

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Jul 14 • 3:05 PM EDT • Technology • engadget.com
The celebrities who had to RSVP 'no' to Taylor Swift's wedding, from Shania Twain to Ryan Seacrest

First came the guest list. Now comes a new Hollywood flex: explaining why you couldn't make Taylor Swift and Travis Kelce's wedding.

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Jul 14 • 2:24 PM EDT • Entertainment • yahoo.com
Sony's FlexStrike PS5 Fight Stick Delayed Indefinitely, Now Launches After Marvel Tokon

Fight to make it right

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Jul 14 • 1:00 PM EDT • Technology • pushsquare.com
Flex Raises $70 Million To Put Business Banking On Stablecoin Rails

Invisible stablecoin rails are making cross-border banking faster for business owners. Flex has raised a $70 million Series B1 to capitalize on the shift.

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Jul 14 • 8:00 AM EDT • Business • forbes.com
Austin Reaves, Sandro Mamukelashvili are helping Lakers' cap situation

Austin Reaves and Sandro Mamukelashvili did something with their contracts to help give the Lakers some added salary cap flexibility.

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Jul 13 • 11:32 PM EDT • Sports • sports.yahoo.com
LeBron James’s last two Lakers seasons show he would be a perfect fit in Cleveland

Positional flexibility is the best ability for LeBron to utilize.

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Jul 13 • 10:30 AM EDT • Sports • sports.yahoo.com
Lindsey Graham’s journey from a pool hall to the heights of political power

A former military lawyer who reached the rank of colonel in the Air Force, the wisecracking Graham was known for his Southern drawl, political flexibility and reliably hawkish stance on foreign policy.

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Jul 12 • 9:24 PM EDT • Politics • wsbtv.com
Lindsey Graham’s journey from a pool hall to the heights of political power

The high-energy Republican lawmaker was known for his Southern drawl, political flexibility and reliably hawkish stance on foreign policy. He first won election to Congress in 1994.

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Jul 12 • 5:45 PM EDT • Politics • adn.com
FlexWork Sports fumbled Tetairoa McMillan youth football camp

The far more clickable headline would be that Panthers receiver and 2025 NFL offensive rookie of the year Tetairoa McMillan was a no-show for a youth football camp on Wednesday, July 1.

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Jul 12 • 8:25 AM EDT • Sports • nbcsports.com
FlexWork Sports fumbled Tetairoa McMillan youth football camp
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Jul 12 • 8:25 AM EDT • Sports • sports.yahoo.com
With their fruit crops obliterated by freeze, these Colorado growers are forced to flex their business muscles to survive

An April freeze devastated farmers along the North Fork Valley, including a total loss at the Kropp family’s First Fruits. Here’s how the orchards are moving on.

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Jul 12 • 6:22 AM EDT • Business • coloradosun.com
What Could Possibly Be Holding Up Cason Wallace’s Extension

Rising luxury tax pressures and Wallace’s soaring potential have created a high-stakes standoff, forcing Sam Presti to balance future financial flexibility with securing a cornerstone perimeter defender.

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Jul 11 • 3:28 PM EDT • Sports • sports.yahoo.com
5 Small Business Ideas That Let You Work From Home

Make your home office your main office with these small business ideas that allow more flexibility in your work day.

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Jul 11 • 7:00 AM EDT • Business • inc.com
ECSU adds data science, online history, social work degrees

Elizabeth City State University, one of four North Carolina Promise institutions providing affordable access to higher education, is expanding its curriculum and adding flexibility for students.

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Jul 7 • 9:16 AM EDT • Science • coastalreview.org
Incredible new material makes heat programmable

A newly developed material can control and "program" heat, allowing it to direct thermal radiation, switch modes, and remember its settings without continuous power. The innovation could lead to smarter infrared sensors, better energy technologies, and memory devices that use light and heat instead of electrical charges.

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Jul 7 • 8:00 AM EDT • Science • sciencedaily.com
HP OmniBook X Flip 14 review: Flexible performance with AMD Zen 5

The new OmniBook X Flip 14 is even more impressive than the OmniBook Ultra Flip 14 with more CPU performance, more ports, and a revised keyboard and look. However, most SKUs are limited to just a 60 Hz touchscreen despite the ~$1500 asking price.

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Jul 6 • 4:18 PM EDT • Technology • notebookcheck.net
Inside the $85 million private jet that made one of Africa’s richest billionaires the owner of the world’s fastest business jet

Months after entering service, Bombardier’s Global 8000 has arrived in Africa, with one of Nigeria’s most powerful industrialists becoming its first customer on the continent in a move that flexes both aviation ambition and billionaire financial muscle, especially for a buyer who already owns two other Bombardier jets

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Jul 6 • 7:49 AM EDT • Business • africa.businessinsider.com
Scientists build living ‘neurobots’ that grow their own neural networks

Self-powered, entirely biological constructs injected with neural precursor cells - reveal the surprising flexibility of nervous systems.

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Jul 6 • 1:04 AM EDT • Science • advancedsciencenews.com
Three Under-the-Radar Trade Targets for Philadelphia 76ers

To optimize a star-studded core, the Philadelphia 76ers must prioritize low-usage role players. These three players offer the chemistry and financial flexibility necessary for a deep postseason run.

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Jul 5 • 9:07 PM EDT • Sports • sports.yahoo.com
Ben Johnson's Run Game Keeps Bears' Offense Flexible and Explosive
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Jul 5 • 4:06 PM EDT • Sports • sports.yahoo.com
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A Digital Twin-Lens Reflex Camera is Long Past Due

Of all the ways that we take photographs, the twin-lens reflex experience has been left by the wayside. Maybe that needs to change.

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Jul 5 • 8:30 AM EDT • Technology • petapixel.com
With Julia Letlow’s victory, Jeff Landry flexes political muscles as he eyes reelection next year

Landry scored a big win when Letlow won the Republican nomination for Senate. What does that mean for his reelection chances next year?

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Jul 5 • 5:16 AM EDT • Politics • nola.com
Gavin Newsom Signs Law Limiting Mental Health Diversion for People Accused of Crimes

A new California law gives just more flexibility to keep defendants in jail rather than releasing them to community-based mental health treatment programs.

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Jul 4 • 5:51 PM EDT • Health • independent.com
Dior, Chanel bags among items offered at Taylor and Travis' wedding

If an invite to Taylor Swift and Travis Kelce's New York wedding wasn't cool enough, guests can also flex what they brought home.

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Jul 3 • 7:42 PM EDT • Entertainment • centraloregondaily.com
Artificial intelligence: Yann LeCun works on more flexible AI

Leading AI researcher Yan LeCun has a start-up which is developing a more flexible AI system.

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Jul 2 • 7:02 PM EDT • Technology • bbc.com
Timeline Emerges For LeBron James' Free Agency Decision

Even at the age of 41, LeBron James still has basketball fans around the world anxious to find out where he's heading next. Despite taking a step back at times during the 2025-26 season, James flexed his muscles during the postseason. He powered the Los Angeles Lakers to the second round, averaging ...

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Jul 2 • 4:58 PM EDT • Sports • sports.yahoo.com
WHO, Member States discuss expanding South-East Asia Emergency Health Fund SEARHEF

With climate-related disasters, disease outbreaks and other health emergencies becoming more frequent and complex across South-East Asia, WHO and Member States today discussed measures to strengthen and expand the South-East Asia Regional Health Emergency Fund (SEARHEF) to ensure countries have rapid access to life-saving support when crises strike. "Health emergencies are becoming more frequent, more complex and more costly. Countries need rapid, flexible financing that can be mobilized immediately when lives are at risk. SEARHEF represents regional solidarity in action, enabling Member States to support one another when emergencies strike," said Dr Catharina Boehme, Officer-in-Charge WHO South-East Asia Region. She was addressing the Fifteenth Meeting of the Working Group on the Governance of SEARHEF.

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Jul 1 • 8:00 PM EDT • Health • who.int
Strengthening Collaboration between Workforce, Health, and Human Services to Meet New Federal Requirements

Human Services Policy Advisors Institute | June 24th, 2026 H.R. 1, or “The One Big Beautiful Bill”, introduced significant changes to work requirements across major health and human services programs. including expanding the populations subject to SNAP time limits, reducing state/territory SNAP waiver flexibility, and creating new work requirements in Medicaid. These changes accelerate the […]

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Jun 30 • 9:03 AM EDT • Health • nga.org
Claude Science, an AI workbench for scientists

Claude Science is a customizable app that integrates the tools and packages researchers most often use, produces auditable artifacts, and provides flexible access to computing resources.

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Jun 30 • 8:00 AM EDT • Science • anthropic.com
Studio Gang and Henning Larsen Complete One Milestone Life Science Campus in Boston

Studio Gang and Henning Larsen's One Milestone brings life science labs, flexible workspaces, and public amenities to Boston's Allston neighborhood.

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Jun 30 • 1:30 AM EDT • Science • archdaily.com
Gavin Newsom signs law limiting mental health diversion for people accused of crimes

A new California law gives just more flexibility to keep defendants in jail rather than releasing them to community-based mental health treatment programs.

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Jun 29 • 7:32 PM EDT • Health • calmatters.org
Apple Plans Wider Color Gamut for Future MacBook Pro, iMac, and iPad Pro

Apple plans to adopt OLED panels capable of displaying a much wider range of colors, according to a new report from research firm TrendForce. The new panels would cover 95% of the BT.2020 color standard, which describes a far broader spectrum of colors than the DCI-P3 standard Apple's screens currently target. In practice, that means deeper, more accurate reds, greens, and blues.

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Jun 29 • 9:35 AM EDT • Technology • macrumors.com
Flexjet buys Steve Varsano’s The Jet Business | Corporate Jet Investor

TikTok’s favourite business jet broker has been bought by Flexjet. Steve Varsano, founder of The Jet Business will become president.

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Jun 29 • 5:56 AM EDT • Business • corporatejetinvestor.com
WGU’s flexible, skills-first pathways are bridging Detroit’s talent gap

Discover how skills-first education is helping employers address workforce shortages across Southeast Michigan.

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Jun 29 • 5:00 AM EDT • Business • crainsdetroit.com
The Orlando Magic Waive Defensive Versatile Forward Jonathan Isaac

The Orlando Magic severs ties with the former lottery pick to avoid a looming salary guarantee, ending an injury-plagued nine-year tenure while seeking financial flexibility for a critical offseason.

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Jun 27 • 5:43 PM EDT • Sports • sports.yahoo.com
Women Over 50 Aren't Just Starting Businesses. They're Redefining Work.

Women over 50 are starting businesses, but the bigger story is how they're redefining work through greater flexibility, purpose, and control over their careers.

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Jun 27 • 9:01 AM EDT • Business • forbes.com
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'Godfather of SaaS' says you can't get truly rich working from home

SaaStr founder Jason Lemkin agrees with Flexport CEO Ryan Peterson's skepticism of remote work.

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Jun 27 • 5:13 AM EDT • Business • businessinsider.com
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Tired of long waits? Mochi Health offers virtual care starting at $39

Mochi Health now offers full-service virtual care with unlimited visits, flexible pharmacy options and plans starting as low as $39.

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Jun 26 • 5:06 PM EDT • Health • usatoday.com
Why the Amex Business Gold is my go-to card for business expenses

The Amex Business Gold makes earning rewards simple with automatic bonus categories, flexible Membership Rewards points and statement credits that help offset its annual fee.

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Jun 26 • 1:00 PM EDT • Business • thepointsguy.com
Matt Rhule hosts youth football camp in Omaha through FlexWork Sports

Matt Rhule and four Nebraska football players made the trek to Omaha Thursday.

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Jun 25 • 8:23 PM EDT • Sports • wowt.com
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What Does Success Look Like in 2026 for Dolphins?

After moving on from veterans such as Tua Tagovailoa and Tyreek Hill, the upcoming season is about developing the Dolphins' roster, resetting the culture, and gaining salary cap flexibility for the future. The goal for any NFL team is not just to succeed in the immediate future but to establish a solid foundation for long-term success. After releasing Tagovailoa, Willis became the Dolphins' most significant free agent acquisition after he signed a three-year, $67.5 million contract with $45 million guaranteed.

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Jun 24 • 6:00 PM EDT • Sports • sports.yahoo.com
‘Incuhub’ for small businesses opens location in Newport News

NEWPORT NEWS, Va. (WAVY) – A flexible workspace and business incubator has now opened a new location. Incuhub has locations in Portsmouth, Hampton and now Newport News. Incuhub is a modern wo…

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Jun 24 • 2:28 PM EDT • Business • wavy.com
New York primaries: Clean sweep as 3 candidates endorsed by Mamdani win

New York Mayor Zohran Mamdani flexed his political muscle Tuesday, getting a clean sweep as his three endorsed congressional candidates advanced to November's general election.

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Jun 24 • 10:26 AM EDT • Politics • abc7ny.com
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How wellness and longevity trends are reshaping American real estate

Health-obsessed homebuyers are splurging on cold plunges, saunas, and cryotherapy chambers. Real estate's biggest flex isn't just for the uber-rich.

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Jun 24 • 4:23 AM EDT • Business • businessinsider.com
Monster Fantasy Combines the Thrill of Monster Hunter with the Cosy Chill of Animal Crossing

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Mamdani and AI industry flex political power in New York, plus more to watch in Tuesday's primaries

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Mamdani and AI industry flex political power in New York, plus more to watch in Tuesday's primaries

Two factions in the AI industry are clashing in a Democratic primary for a U.S. House seat

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Jun 23 • 12:06 AM EDT • Politics • washingtonpost.com
Mamdani and AI industry flex political power in New York, plus more to watch in Tuesday's primaries

Two factions in the AI industry are clashing in a Democratic primary for a U.S. House seat.

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Jun 23 • 12:03 AM EDT • Politics • newsday.com
Mamdani and AI Industry Flex Political Power in New York, Plus More to Watch in Tuesday's Primaries

WASHINGTON (AP) — Two opposing factions in the artificial intelligence industry square off in a Democratic primary for a U.S. House seat. New York City Mayor Zohran Mamdani tests his political clout by backing fellow democratic socialists. And President Donald Trump, after two of his chosen ...

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Game-Changing New, Online Master’s in Sport Management and Recreation Therapy

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Jun 15 • 8:00 AM EDT • Science • sciencedaily.com
Is SMIC N+3’s Metal Pitch Smaller than Intel 18A’s?

Almost four years ago, we published that SMIC had started shipping 7 nm (N+1) chips. Now, SMIC is shipping its third-generation 7 nm (N+3) process in Huawei’s Kirin 9030, with a minimum metal pitch of 32.5 nm, about 10% tighter than the 36 nm minimum metal pitch shipping in Intel’s latest Panther Lake CPUs on 18A. The headline is true, but incomplete cherry picked metric. N+3 reaches the density of TSMC N6 through aggressive DUV multi-patterning and design-technology co-optimization (DTCO), but it pays for that in complexity, efficiency and process control. We found this and more in our reverse engineering and teardown where we cover SMIC’s N3 process technology, Huawei’s packaging, memory, architecture, and more. SemiAnalysis has been building a state-of-the-art teardown lab in Oregon capable of analyzing the world’s most advanced and important chips over the last year and half. We have already generated revenue on advanced datacenter chip teardowns including our recent reverse engineering of a major TSMC customer’s COUPE CPO optical engine + EIC 3D stack. This is the first public report from the SemiAnalysis Teardown Engineering & Evaluation Lab, or STEEL for short. The lab is aggressively scaling up and out and we’re excited to announce it publicly. This is a bit of inconvenient timing for TechInsights as they are private equity owned and currently being sold while having enjoyed virtually no credible competition for decades. This has led to TechInsights underinvesting in CAPEX. SemiAnalysis exceeds TechInsights in revenue despite no venture or private equity ownership and being founded only 6 years ago. Because we have no external investors and are founder led, we move faster, build faster, and we can release client chip teardowns for free regularly, while focusing on datacenter for our major clients. Here’s the first public image from our lab, the HiSilicon Kirin 9030 Pro SoC: This report will detail our teardown of the Kirin 9030 and our findings on SMIC’s N+3 process, the most advanced in China. For comparison, we’ll show our teardown of the MediaTek Helio G99, made on TSMC N6. Through this comparison, we can look at the effect of export controls – SMIC N+3 and TSMC N6 are comparable nodes, but one is heavily export-controlled, the other free to use the West’s most advanced equipment. Here we see both China’s progress and constraints. SMIC N+3 reaches TSMC N6-class logic density, but it requires far more aggressive DUV multi-patterning, so it does not match N6 on process maturity or cost. The Kirin 9030 Pro performs similarly to three-year-old Android flagships, and trails far behind the current flagship SoCs from Apple, Qualcomm, MediaTek, and Samsung. The efficiency gap is even wider. Export controls have not stopped Huawei and SMIC from shipping advanced silicon, but they have forced a different path. Without EUV, SMIC is leaning harder on DUV multi-patterning, DTCO, and increasingly complex integration. The roadmap continues forward through tighter design rules and backside power, but each step adds cost and process risk. Huawei’s τ scaling and LogicFolding show another path: stacking active logic and recovering density through advanced packaging and system-technology co-optimization (STCO). To understand the Kirin 9030, we must first understand Huawei’s SoC history. HiSilicon is Huawei’s chip design arm, responsible for the Kirin smartphone SoCs, Kunpeng server CPUs, Ascend AI accelerators, and switch/router networking silicon. Before export controls, Huawei was TSMC’s largest customer – the only customer on TSMC’s first EUV node, N7+, and among the first on N5, alongside Apple. That ended in late 2020. Huawei switched to Qualcomm SoCs in its flagship smartphones, though export controls limited them to 4G-only variants. In late 2023, Huawei returned to in-house silicon with the Kirin 9000s, a successor to the Kirin 9000, fabricated on SMIC N+2 instead of TSMC N5. In the following years, they released the Kirin 9010 and 9020 on the same N+2 process. These chips used Huawei’s in-house TaiShan CPU cores and Maleoon GPU. We have not torn down a Kirin 9020 ourselves, so the predecessor die shot is from Kurnal. The die shots show how Huawei spent its silicon budget: which functional blocks are where, and how their areas compare to the predecessor. First, a quick guide to the major blocks on the die. The total die area is nearly identical, but the 9030 uses that area more aggressively. A denser process lets Huawei fit an extra middle CPU core, more GPU and NPU cores, and larger caches into the same footprint. In contrast, the Helio G99 is a much smaller, low-cost SoC, built for budget smartphones rather than a flagship device. While the Kirin 9030 is ~140 mm², the G99 is only ~29 mm², roughly one-fifth the area. The underlying TSMC process technology, however, is directly comparable as a baseline for analyzing SMIC’s. The Kirin 9030 is an evolutionary refresh, not a clean-sheet design. Its CPU, GPU and NPU cores carry over the 9020’s families, and the gains come from three levers: the SMIC N+2-to-N+3 process step, DTCO and floorplan work, and incremental microarchitecture. Area is where the first two show up, and the 9030 scales well here. Performance and efficiency are the harder test. Huawei’s design holds up better than its node would suggest, but the chip still trails, both because N+3 sits behind the leading-edge nodes and because its cores, while competent, remain a few generations behind the newest designs. The new prime core is an incremental update. The main changes are a 10% frequency increase from 2.5 GHz to 2.75 GHz and a doubling in the L2 cache from 1 MiB to 2 MiB. Despite the increased cache, the core size decreased by 7.6%. Excluding the private L2 cache, the core size decreased by 21%. This is a large reduction for an incremental node. Compared with the TaiShan New V120 core in the Kirin 9020, the Kirin 9030’s middle core is almost unchanged architecturally, yet each core shrinks by ~22%. Most of that comes from the move from N+2 to N+3, with layout likely accounting for the rest. Visually, the most noticeable change is the increase from 3 middle cores to 4. There is also a 20% increase in the shared L3 cache of the big cluster. This helps to improve multi-core performance without sacrificing much in terms of area. Even with each core shrinking, the big CPU cluster’s total area is essentially unchanged. The per-core savings went back into an additional middle core and larger caches. The tiny cores shrank less than the prime core (excluding its L2 cache) and less than the middle cores. This is likely because fixed overhead is a larger share on a small core. We cannot resolve any architectural changes from the die shot alone, but the per-clock and efficiency gains shown below point to more than pure process and layout scaling. The area reduction was offset by a doubling of the shared L2 cache from 2 MiB to 4 MiB, leaving the total tiny CPU cluster area slightly larger. Area is the easiest improvement to see from a die shot, but it is only one part of PPA (power, performance, area). For modern logic, power and performance matter just as much, and often more. Since Dennard scaling broke down in the mid-2000s, voltage and frequency have not scaled in step with transistor dimensions, so each node has had to fight harder for gains in performance and efficiency. The starkest comparison is not Kirin 9020 versus Kirin 9030 Pro. Apple’s efficiency cores run circles around Huawei’s prime core. Apple’s low-power core delivers 20% higher integer performance while drawing only 1 W, compared with 4.5 W for Huawei’s prime core. N+3 matches TSMC N6, but N6 is several generations old. Apple and Qualcomm build on N4 and N3P, which are denser and sit on a better voltage-frequency curve, giving them a larger transistor budget and more performance per watt. The 9030’s own cores did improve. The middle and tiny cores gained 17% and 14% in per-clock integer performance over the 9020, with floating-point flat on the middle core and up 11% on the tiny. The tiny core improves cleanly, with performance rising while power falls and efficiency increases by 45% in integer and 24% in floating point. The middle core is mixed: integer performance rises but power rises faster, cutting integer efficiency by 7%, while lower power lifts floating-point efficiency 16%. Per-clock gains at the same or lower frequency are microarchitectural, so the cores are tuned, not just shrunk. Both also failed to hold their rated maximum frequencies, pointing to thermal, power, or stability limits. Per clock, the middle core sits around Arm Cortex-A720 and the tiny core near the Cortex-A520; absolute performance trails because Huawei clocks them much lower. The prime core is roughly Cortex-X2 class per clock, a 2021 design. Apple’s 2020 M1 Firestorm core is still 35% higher per clock and 57% faster in absolute integer performance at a similar 4.5 W. The current leading edge is further ahead again: the Apple M5 P-core is 60% higher per clock and 2.7× faster, the Arm C1 Ultra 45% higher and 2× faster. Matching older high-end cores per clock is a genuine design achievement. What Huawei cannot match is the voltage-frequency curve and transistor budget of leading-edge nodes, which let Apple, Qualcomm and others spend more transistors in the same area on wider cores, larger caches and deeper buffers while running at lower voltage. Huawei’s LogicFolding roadmap is one answer, stacking active logic to recover density and shorten signal paths. We return to it later. The GPU compute units (CUs) changed more visibly than the CPU cores, moving to a more rectangular layout for both the arithmetic logic unit (ALU) clusters and the CU overall. Even with ray-tracing support added, a CU shrank ~28%. However, that shrink is offset by the increase from 4 to 6 CUs and the area outside the CUs grew 33%. Overall, the GPU cluster is larger by ~10%. The GPU is where Huawei makes its biggest gains. The Maleoon 935 is not competitive with current flagships, but it is a large step up from the 920 and reaches older-flagship territory. In 3DMark it is 70% faster in Wild Life Extreme (WLE) and 79% faster in Steel Nomad Light (SNL) than the 920; with 11% higher clocks and 50% more CUs, the ~67% theoretical uplift roughly matches WLE and is beaten by SNL. It edges ahead of the Snapdragon 8+ Gen 1 in WLE and SNL, and the Dimensity 9200 and Apple A16 in WLE, but stays far behind newer parts: the Snapdragon 8 Elite Gen 5 and Dimensity 9500 are ~2.4–2.6× faster in WLE and ~3.2× faster in SNL. The Maleoon 935 is Huawei’s first GPU with hardware-accelerated ray tracing; there it lands slightly ahead of the Exynos 2200, and on par with the Apple A16, with current flagships up to 3.7× faster. The Neural Processing Unit (NPU) saw the largest structural changes of any block, moving from a Lite and a Tiny core in the Kirin 9020 to a Lite and two Tiny cores in the Kirin 9030. Both core types also show significant layout changes. This is a reversal in Huawei’s NPU design. The Kirin 9000 5G, its last flagship chip on TSMC N5, used two Lite and one Tiny core. The series of SoCs on SMIC N+2 moved to one Lite and one Tiny core, likely for area savings. With the Kirin 9030, Huawei has shifted back toward a larger multi-core NPU cluster, but with the additional area going to a Tiny core rather than a Lite core. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Interested in joining us on this ride and think you can be a difference maker? Check out our Careers page. Before diving into the process stack, the package and memory are worth separating from the SoC itself. The Pro variant of the Kirin 9030 carries 12 GB of Samsung DRAM, with two stacks of four dies each. The dies were identified as the K4L2E165YD, a 12 Gb LPDDR5X-9600 device fabricated on Samsung’s 1a node, the fourth generation of its 10 nm-class DRAM after 1x, 1y and 1z. 1a has shipped in volume since 2022, so this is current memory rather than older-node inventory. The 16 GB Pro Max variants we obtained were found with both CXMT and Samsung packages. The CXMT package is marked CXDD7JEDM, with two stacks of four dies, packaged in week 45 of 2025. The inferred die dimensions from X-ray computed tomography (CT) are consistent with a known density of ~0.3 Gib/mm² for the CXMT G4 process, roughly equivalent to other manufacturers’ 1z processes. The Kirin 9030 uses a typical integrated package-on-package (iPoP) stack: multiple DRAM dies in a memory package sit above an organic redistribution layer (RDL) interposer, which sits above the SoC and package substrate. The full package is then mounted to the printed circuit board (PCB) through ball-grid array (BGA) solder bumps. The memory package substrate is a thin bismaleimide-triazine (BT) laminate carrying the LPDDR5X stack. The organic RDL interposer over the SoC routes the PoP signals around the die and carries possible dummy thermal copper pillars. The package substrate, a thicker Ajinomoto Build-up Film (ABF) build-up over a BT core, fans the flip-chip bumps out to BGA pitch and embeds the power planes. The whole stack is organic. The only silicon is the SoC and the LPDDR5X dies; there is no silicon interposer. Keeping it all-organic brings the package’s coefficient of thermal expansion (CTE) close to the PCB’s, reducing board-level warpage, and avoids the cost of a silicon interposer the SoC’s bandwidth does not need. In an iPoP stack, the memory package connects to the organic RDL interposer through an array of solder bumps. Underfill fills the gap around those bumps, adding stiffness and protecting the joints from mechanical stress. The Pro and Pro Max variants differ here, which we cover behind the paywall. The die shot and architecture tell us how Huawei allocated its silicon budget. The process tells us what SMIC can manufacture. We use the Helio G99 as the process reference for TSMC N6. Both SMIC N+3 and TSMC N6 are evolutions of previous 7 nm-class nodes. We used targeted TEM cross-sections through logic and memory regions, imaged in both fin-cut and gate-cut directions. Each cross-section caption gives its horizontal field width (HFW), the real width of the imaged area. We start at the transistor fins, then move up through standard cells, local interconnect, and SRAM. SMIC has not overtaken Intel or TSMC. It uses aggressive DUV scaling and DTCO to reach N6-class density, but that density doesn’t translate into comparable performance and efficiency, for two reasons: the node gap to leading-edge nodes, and Huawei’s core designs. Fin Profile One of the most important knobs in a FinFET process is the fin profile: the shape of an individual fin and the channel where current passes from source to drain. The ideal fin is tall, narrow, and nearly vertical. A taller fin increases effective channel width, while a narrower fin improves electrostatic control by thinning the body the gate must control. Push either too far, and the process pays for it: weaker drive current, fragile fins, taper, footing and line-edge variation that hit yield and device variability. The Intel 22 nm, 14 nm, and 10 nm fin cross-sections show how FinFET nodes have improved over time. 22 nm fins were a first-generation structure, relatively short, wide and strongly tapered. The shape limits current density and reduces gate control uniformity across the height of the fin. At 14 nm and 10 nm, Intel pushed the fins taller and narrower while also making the sidewalls more vertical. Rather than shrinking the device, these changes increase the effective channel width per fin and improve electrostatic control. The trade-off is that taller fins at tighter pitches are much more difficult to manufacture. Now, let’s compare the Helio G99 on TSMC N6 with the Kirin 9030 on SMIC N+3. Both processes are in the same class, with fin pitch of 30-32 nm on N+3 and 34 nm in our N6 cross-section. The pitch for N6 is especially interesting as N7’s HD library is generally listed with a 33 nm fin pitch, and N6 did not shrink pitches directly. Its density gains came from DTCO instead of tighter pitches. The 34 nm pitch was stable across our sampled region and serves more as a comparison against the SMIC N+3 we have not investigated further. Pinning down N+3’s fin patterning scheme takes more than one core unit. The CPU cores show a dense ~32 nm pitch, with the pitch between N-P fin pairs alternating between 78 and 88 nm. Logic alone may be consistent with dual-pitch mandrels of 120 and 110 nm, but this is a complex and unusual approach. Combining the pitch from the the 8T SRAM, which has more complex repeat unit, with the CPU core sequence allows us to reverse engineer the patterning steps with more confidence. As both the logic and SRAM should share the same base grid, a single CD mandrel lithography pattern with 128 nm pitch undergoing SAQP produces a die-wide ~32 nm grid (128 nm/4), which supports the pitch sequencing seen in both logic and SRAM cells. In the sampled cross-sections, N+3 shows a taller, narrower, higher-aspect-ratio fin than N6. The measured fin aspect ratio is ~9.5:1 on N+3 versus 7.8:1 on N6. N+3 also shows less top rounding, with an estimated radius of ~2 nm, compared with 2.8 nm on N6. Even though the fin widths differ, the ratio of top rounding to fin width tells the same story, with N+3 at 0.37 and N6 at 0.44. In a geometric sense, lower is better; a perfectly rectangular fin would have no top-rounding penalty. These are single-digit-nanometer features measured from a handful of cuts, so treat the absolute numbers as approximate. The important result is the relative gap: N+3’s fins are consistently taller, narrower and less rounded than N6’s. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Interested in joining us on this ride and think you can be a difference maker? Check out our Careers page. Standard Cell A standard cell is the basic building block of chip layout: a fixed-height row pairing one NMOS and one PMOS transistor that share a gate, tiled in a grid to build logic blocks. The key dimensions are contacted gate pitch (CGP), cell height (CH), fin count, and the lower-metal routing grid. To measure density, we use the Bohr metric: a weighted average of NAND2 gate area (60%) and scan flip-flop area (40%). This represents a realistic mix of combinational and sequential logic. This metric has its limitations, especially for complex cell layouts like TSMC’s FinFLEX, which alternates cells with different fin counts. Even so, it is the best metric for a pure process-level comparison. Another important measurement is the fin pitch; it refers to the distance between two fins of the same transistor. In a FinFET process, multiple fins are used in each transistor to increase the drive current and thus performance. TSMC N6 ships both a high-density (HD) library with 2 PMOS and 2 NMOS fins per cell, and a high-performance (HP) library with 3 of each. More fins under the shared gate mean more effective channel width. HP cells switch harder at the cost of area. Designers mix the two on a die, primarily spending HP cells on timing-critical paths, and matching their PPA targets. In the Cortex-A55 core of the Helio G99, we found a cell height of 240 nm for the HD cell. MediaTek has used HD cells in the G99 to minimize die size and thus cost. As an SoC for budget smartphones at ~$100, this is essential. By contrast, we found only one library in the Kirin 9030, with 2 NMOS and 2 PMOS fins. This suggests a narrower library strategy than TSMC N6, where both HD and HP libraries are widely used. This likely reflects the smaller customer base and the more constrained domestic design and electronic design automation (EDA) ecosystem. In all three CPU cores of the Kirin 9030, we found cell heights of 228 nm, 5% smaller than on N6. This is also a reduction of 9.5% over SMIC N+2’s cell height of 252 nm. SMIC N+3 and TSMC N6’s HD library both feature a CGP of 57 nm. For SMIC, this is a 9.5% shrink over N+2. In the past, CGP and cell height alone may have been enough to compare transistor density. Now, however, we must consider scaling boosters and DTCO as well. SMIC’s density gain does not come from EUV. It comes from using every available DTCO booster aggressively. First is fin depopulation: reducing the number of NMOS and PMOS fins in each cell. The first FinFET nodes started with 3 or 4 fins for each transistor. SMIC N+3 and TSMC N6 HD both use only 2 fins per transistor, trading drive strength for density. Next is contact over active gate (COAG). By landing the gate contact directly over the active gate, instead of out over the isolation region, the cell height drops. N+3 integrates COAG while N6 does not. Our N+3 gate-cut cross-sections indicate COAG, with the gate contact sitting over the active region, while N6 shows an off-gate contact. Last is single diffusion break (SDB). Diffusion breaks are inserted between cells in the same row to provide electrical isolation, but they also introduce local layout effects (LLE), layout-dependent shifts in electrical characteristics. In the past, a double diffusion break was used, consuming the space of two CGPs. SMIC N+3 and TSMC N6 instead use SDB, saving area but increasing LLE sensitivity. This must be controlled at the process level and accurately modeled in the process design kit (PDK) so that EDA tools can account for it. Overall, SMIC N+3 has a transistor density of 113.4 MTr/mm², slightly above TSMC N6 at 107.7 MTr/mm². Even without EUV, SMIC has achieved density beyond TSMC’s mature N6 node which utilizes EUV. Metal Stack The smallest critical dimension in the teardown is M0; SMIC N+3 uses a 32.5 nm local metal pitch. That is smaller than the 36 nm M0 pitch on Intel 18A in Panther Lake. However, this does not mean that SMIC has a better process than Intel 18A or TSMC N3P. M0 is a local intra-cell routing layer. Its usefulness depends on the full interconnect stack: M1 and M2 pitch, track count, via and line resistance, design rules, mask count, overlay control, and routing flexibility. The 32.5 nm M0 is consistent with self-aligned quadruple patterning (SAQP), whose four-population line-width loading we read coarsely as alternating widths of 21.5 to 24 nm; M1 and M2, at 38 and 40 nm, are consistent with self-aligned double patterning (SADP), a single A/B split. On TSMC N6, M0, M2, and M3 sit at a relaxed ~40 nm and are consistent with SADP-class double patterning, with no need for quadruple patterning. That said, we measure M2 for example at ~43 nm, likely inflated by sparse routing. We do not assign any specific layer to EUV from our cross-sections; the distinction we can draw is double versus quadruple patterning, not lithography wavelength. Transistor-level density in the front-end-of-line (FEOL) sets an upper bound, but the design is ultimately limited by what the interconnect stack can route. The lowest metals are the most important for standard-cell density, but the semi-global and global layers determine how usable that density is at the block and chip level. Two axes are commonly used for chip cross-sections: the fin-cut and the gate-cut. The micrograph above is a fin-cut and shows metals 0 through 3. This axis lets us see the even-numbered metals, with M0 right above the fins. There are two kinds of M0 lines. The first are the power rails; these are wide wires for the VDD and VSS running horizontally at the top and bottom edges of each standard cell. The wide wires measure 55 nm across, more than double the other M0 lines. Their width minimizes resistance and reduces IR drop. The second kind are intra-cell wires, short segments within the cell that connect terminals to M1. These have alternating widths between 21.5 and 24 nm. The M0 pitch is 32.5 nm, a 19% reduction versus N+2 and N6. At this pitch, DUV patterning requires more aggressive multi-patterning, increasing mask count, overlay sensitivity, process complexity and cost. M0 is below what a single DUV-defined spacer (SADP) can resolve, so SMIC cascades a second spacer step (SAQP). The cross-section reflects the cost: the M0 trenches are visibly more re-entrant (narrower at the bottom than the top) than M1 or M2 on the same chip and carry a bright barrier-rich foot where the trench meets the etch-stop layer. That shape is partly the intended damascene profile, as a slightly narrow bottom helps void-free copper fill, but its magnitude at M0 is driven by the tight pitch and the higher trench aspect ratio. Intel 18A supports an M0 pitch of 32 nm, although Panther Lake has only shipped with a looser 36 nm pitch. This is due to Intel’s heavy usage of HP libraries. Among leading-edge nodes, 18A has the loosest M0 pitches due to PowerVia. With power routing moving to the backside, congestion is reduced, and the entire front-side metal stack can be used for signal routing. M2 is the first true inter-cell routing layer. It runs horizontally like M0 but spans across multiple cells to carry block-level signals. The M2 pitch sets the cell’s track height – the number of M2 tracks that fit between the VDD and VSS rails, defining what the library calls a 6-track or 7.5-track cell. This layer is the most important, limiting the routing of entire blocks. SMIC N+3 features a 5.7-track cell. The M2 pitch is 40 nm, a 5% decrease over N+2 and the same as N6. This shrink keeps the pitch at the edge of what is possible with double patterning. Future nodes will need to increase the number of masks for M2 as reducing the number of tracks is much harder due to the limitations in routing. The micrograph above is in the perpendicular direction, the gate-cut, and shows metals 0 through 4. This allows us to see and measure the odd-numbered vertical metal layers. The M1 pitch is 38 nm, 9.5% less than N+2 and 33% less than N6. The M1-to-gate ratio matters because it sets local routing flexibility. N+2 and N+3 use a 3:2 ratio, while N6 uses a 1:1 ratio, explaining the huge differences in M1 pitch. The more M1 lines there are compared with the gates, the more flexibility there is for power and signal crossing within the cell. Routing flexibility enables more complex and better cells. Clean fractional ratios are also preferred as a grid is periodic and improves layouts. The 3:2 ratio gives SMIC more local routing flexibility than a strict 1:1 grid, but it also complicates layout and patterning. This is a DTCO choice, with SMIC increasing process complexity to recover density and routability without EUV. This 3:2 ratio is not very popular in the leading-edge nodes. TSMC has only used it on N7+, the N5 family, and the short-lived N3(B). They have switched back to a 1:1 ratio for N3E. Intel has only used it on the 10 nm/Intel 7 family, with Intel 4, 3 and 18A all using a 1:1 ratio. Samsung is the only one still using a 3:2 ratio at the leading edge, using it in the SF4 and SF3 families. It remains to be seen if SMIC will remain at a 3:2 ratio or move to a 1:1 ratio with its future nodes. The industry is still actively exploring these local-routing ratios. At VLSI 2026, imec will be presenting work on even higher ratios, including a 2:1 scheme that can reduce area by up to 14%. We will be covering the conference in a future newsletter article. Subscribe We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Interested in joining us on this ride and think you can be a difference maker? Check out our Careers page. The final local interconnect layer for N+3 is M3, with a pitch of 44 nm. The M3 pitch is the same as on N+2 and 10% larger than on N6. The semi-global layers carry the majority of block-level signal routing. They have a coarser pitch than the lower local layers. On leading-edge nodes, they are designed to sit at the limit of DUV single patterning. M4 through M11 pitches were found divided between 80–82 nm (M4–M6), 128 nm (M7–M10), and 148 nm (M11). Given limited sampling, it is possible these are divided further in dense routing areas. At the top are two giant metal layers, M12 and M13. These have kept the same pitches as N+2 at 1920 nm and 4600 nm respectively. While the lower layers’ pitches are generally fixed by the process and library, the upper layers vary much more in pitch and count, depending on the design. Even two smartphone SoCs on the same process can have wildly different metal stacks. The Helio G99 carries fewer routing layers, reaching coarse metal pitches of 850 nm by M9, while the larger and higher-performance Kirin 9030 keeps fine pitches until M11. SRAM At the leading edge, SRAM is much more difficult to scale than logic. TSMC’s latest nodes have seen little to no bitcell scaling, while logic still has more DTCO levers to pull. While looking for other logic libraries in the GPU compute units, we stumbled upon the SRAM. The most common type of SRAM has 6 transistors (6T), but this cell had 8 transistors (8T) instead. 8T SRAM adds two transistors to form a dedicated read port. Unlike a 6T cell, where reading disturbs the storage, the decoupled read port removes read-disturb, improving read stability and letting the cell be pushed harder for performance. At first glance, the cut looked like an unusual logic library, with each cell row having 3 fins of one polarity and 5 fins of another. The rows also alternated in orientation. Energy-dispersive X-ray spectroscopy (EDS) resolved our confusion. The cut had not landed on the GPU logic, but on the SRAM macro beside it. The unusual fin pattern was due to the SRAM library. We return to EDS in the process flow analysis behind the paywall. SRAM libraries are not like traditional logic libraries. Due to the unequal number of PMOS and NMOS transistors, they require specialized rules and layout libraries. They do not need the flexibility of logic libraries, so they are hyper-optimized for one purpose: dense, reliable memory. The SRAM cell we found is a 1:2:2-2:2 cell. This means there is 1 fin per pull-up (PU) PMOS transistor, and 2 fins per pull-down (PD) and pass-gate (PG) NMOS transistor. These 2 PU, 2 PD and 2 PG transistors would usually form a single 6T high-current cell (HCC). An 8T HCC adds a read-pull-down (RPD) and a read-pass-gate (RPG) NMOS transistor, each with two fins. We measured a cell height of 406 nm, which brings the bitcell size to 0.0463 µm². That is a theoretical peak density of 21.6 Mib/mm². We estimate that a 6T HCC would have a cell height of 292 nm and a size of 0.0337 µm². This is ~12% larger than a 6T HCC on Intel 3 and 4. We also estimate the 6T high-density cell (HDC) to have a cell height of 228 nm and a size of 0.0260 µm². This is coincidentally the same as the logic standard-cell height measured earlier. The estimate puts the cell near Samsung 7LPP/5LPP and slightly below TSMC N7/N6. That is a theoretical peak density of 38.5 Mib/mm². 6T HDC is arguably the most important cell as it is used for the largest caches in a chip, the L3 caches and system-level cache (SLC). Both the Kirin 9020 and 9030 have split the SLC into 4 banks to raise total SLC bandwidth. In the Kirin 9030, the SLC increased from 2 MiB to 3 MiB per bank. Correspondingly, the number of arrays within the bank also increased by 50%, from 16 to 24. Each array can store 128 KiB and forms an orderly pattern on the die shot. From the Kirin 9020 to the Kirin 9030, the area of a 128 KiB SLC array decreased from 0.0477 mm² to 0.0392 mm², an 18% shrink. The achieved density is 25.5 Mib/mm², 66% of the theoretical maximum. While the SLC was quite similar across both chips, the L3 has seen some major changes, particularly in terms of its layout. The total capacity also went up from 10 MiB to 12 MiB. Much like the SLC, the L3 is also split into 4 banks. In the Kirin 9020, an L3 bank consisted of 16× 128 KiB arrays and 16× 32 KiB arrays. However, an L3 bank in the Kirin 9030 instead consists of 48× 64 KiB arrays. In the Kirin 9020 L3, a 128 KiB array was 0.0513 mm² and a 32 KiB array was 0.0154 mm². The size of the 128 KiB array is different on the L3 and SLC as the assist circuitry for the two arrays differs depending on their purpose. In the Kirin 9030 L3, a 64 KiB array is 0.0210 mm². Although not a like-for-like comparison, normalized for capacity, it is 18% smaller than the 9020’s 128 KiB L3 array and 31% smaller than its 32 KiB L3 array. The achieved density is slightly lower than the SLC, at 23.8 Mib/mm², 62% of the theoretical maximum. Unlike the L3 and SLC, the prime cores’ private L2 cache uses a 2-bank design. As the prime cores’ L2 is latency-critical, it likely uses 6T HCC instead of 6T HDC. The 9020 has 16 arrays in each bank while the 9030 has 32. Each array has a capacity of 32 KiB. A 32 KiB array in the L2 shrank from 0.0171 mm² to 0.0142 mm², ~17% smaller. The density is 17.6 Mib/mm², ~59% of the theoretical maximum for 6T HCC. SRAM scaled well from N+2 to N+3, shrinking by ~19%, close to the theoretical logic shrink. The caveat is that N+2’s bitcells were unusually large, bigger than comparable 7 nm-class nodes, so part of the gain is catch-up rather than true scaling. With the insights from STEEL’s teardowns, we will be doing a deep dive into SRAM in a future newsletter article. Subscribe Everything above came out of a single STEEL teardown: die annotation, block-level area analysis and TEM cross-sections through logic and SRAM. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Future Roadmap The same cross-sections that pin down N+3 also show where SMIC can go next. Although N+3 is already close to the practical limits of DUV multi-patterning in several layers, SMIC still has a few scaling levers left. A theoretical N+4 would likely start with cell height. N+3 uses 5 M0 tracks between its power rails. Moving to 4 M0 tracks, as on SMIC N+2 and TSMC N6, could reduce cell height by roughly 15%. The routing grid is only one side of the shrink; the front end also must fit into the smaller cell. One possible FEOL lever is reducing the p-to-n isolation spacing from two diffusion grid units to one. Intel used this scaling booster on Intel 4, and TSMC did so on its N3 family. This path trades layout flexibility for density. Fewer M0 tracks reduce local routing resources, while tighter p-to-n spacing raises integration and design-rule difficulty. M2 is also constrained by the cell height shrink. For SMIC to maintain a ~5.7-track cell, M2 would need to move toward ~35 nm. That would move another layer into SAQP territory. SMIC could also reduce the CGP from 57 nm to 54 nm. Intel reached a similar CGP on Intel 10 nm/Intel 7 without EUV. The local interconnect is also tougher. If SMIC keeps the 3:2 M1-to-gate ratio, M1 would need to shrink to 36 nm and would likely require SAQP as well. If SMIC moves to a 1:1 ratio, M1 could relax to 54 nm, but it would give up routing flexibility. Under this theoretical path, we estimate that SMIC N+4 could reach a cell height of 198 nm and a CGP of 54 nm, implying a Bohr density of 137.8 MTr/mm², on par with TSMC N5 or Samsung SF4. However, the difficulty is cumulative. Each step is individually plausible, but together they make N+4 harder than the transition from N+2 to N+3. It will likely take longer, cost more, and carry less process margin. A theoretical N+5 would require a larger integration shift. One possible path is backside contacts (BSCon), moving power routing and source/drain contacts to the backside, which would reduce front-side routing pressure and enable another reduction in cell height. The front-side metal pitches could relax to reduce the process complexity. M0 would likely relax slightly to ~34 nm, and M2 and M4 pitches could relax further. CGP is unlikely to shrink much further. Even with EUV, 48 nm has been the practical limit for yield and process control. This approach would allow N+5’s cell height to fall to 170 nm and its CGP to 53 nm. This implies a Bohr density of 163.6 MTr/mm², on par with Intel 18A’s HP library. However, this would not make N+5 cost-competitive with the leading edge. It would reach a similar density through a much more expensive route. The integration difficulty rises sharply, with new process flows for backside alignment, wafer thinning, contact reveal, and backside metallization. Past this point, standard density and interconnect scaling become increasingly unattractive. That is where Huawei’s roadmap stops looking like a normal foundry roadmap and starts looking like a packaging roadmap. At ISCAS 2026, Huawei unveiled its tau (τ) scaling law, reframing process scaling in the time domain. τ is the time cost of data movement and processing: switching delays in transistors, RC signal propagation delays in circuits, compute, memory, and networking latency. Outside Huawei’s terminology, this is called system-technology co-optimization. This is Huawei’s answer to its lack of EUV lithography. Without EUV, planar density cannot keep pace with TSMC, Intel, or Samsung. If transistor density cannot shrink further, Huawei’s alternative is to shorten wires, reduce buffering, and stack logic vertically. “LogicFolding”, Huawei’s implementation of this new scaling idea, is, in practice, an aggressive 3D stacking approach. AMD V-Cache places SRAM above or below a CPU die. AMD’s MI350X places active interposer dies (AIDs) underneath accelerator and compute dies (XCDs), with the AIDs handling cache, IO interfaces, the network-on-chip (NoC) and embedded metal-insulator-metal (MIM) capacitors. With LogicFolding, parts of the same logic block are split across multiple active dies bonded face-to-face at ultra-fine pitch. This allows Huawei to shorten some critical paths and reduce buffer overhead, not merely add cache capacity or offload the IO and interconnect. Shortening wires is where the higher clocks come from. A large share of a modern core’s delay and energy budget goes into driving long interconnects and the repeater buffers along them. LogicFolding distributes a block’s critical-path gates across multiple stacked tiers bonded at a very fine pitch, so the bond interface behaves like an additional metal layer and the longest paths get shorter. That is how Huawei expects to recover frequency and efficiency it cannot get from the process alone. Huawei’s roadmap shows its intent. Prime core frequency is targeted to rise from 2.75 GHz in the Kirin 9030 to roughly 5 GHz by 2031, far beyond what planar scaling alone could deliver. Prime cores with 3.1 and 3.39 GHz clocks are being tested in its labs, although their power consumption is unknown. Beyond that, chips are in the design, simulation or pathfinding phase, meaning the frequencies are targets. However, the direction matters more: LogicFolding also helps with performance, not just density. The catch is that Huawei’s density claim is not directly comparable to foundry densities. A stacked design can report more transistors per package footprint by adding active layers, even if each patterned die remains well behind TSMC or Intel in front-end density. This is how Huawei can claim to reach foundry 14A-equivalent density by 2031. This is not a like-for-like foundry comparison, with Huawei using stacked logic and measuring density per package footprint. On a normalized Bohr-density basis, SMIC N+3 is ~114 MTr/mm², 38% less than Intel 18A’s HD library. Huawei’s 3D roadmap closes the gap by stacking active logic, reaching 215 MTr/mm² by 2030. In 2031, the roadmap density jumps to 295 MTr/mm², implying either a third active layer, partial EUV insertion or aggressive planar DUV scaling. Huawei’s methodology makes other foundries look much denser as well. Applying it to AMD’s MI450X with an N2 top die on an N3P base die yields a theoretical density of 460.2 MTr/mm² in 2026, compared with Huawei’s 295 MTr/mm² in 2031. This Kirin 9030 does not use LogicFolding, remaining in a conventional mobile SoC package. Instead, it forms the baseline for how far Huawei and SMIC can push planar scaling. Future teardowns of Kirin and Ascend chips will show both planar logic density and Huawei’s hybrid bonding solutions. Export controls changed China’s optimization problem rather than ending it. EUV restrictions raised the cost and complexity of leading-edge manufacturing without freezing it. SMIC reaches N6-class logic density through DUV immersion, SAQP and DTCO, while Huawei shifts more of the burden onto architecture, packaging and system-level integration. Future nodes will be tougher. N+3 still had room to tighten local metals and reduce cell height and CGP. Further scaling without EUV leaves fewer levers. More aggressive multi-patterning adds masks and overlay error. SMIC can keep pushing DUV, but each step will get more expensive and less forgiving. The design side is just as critical. Huawei had domestic EDA tools and flows before the Kirin 9030, with the Kirin 9000s, 9010 and 9020 making that clear. Huawei was able to ship multiple consumer SoCs on SMIC N+2 and N+3 while cut off from the Western EDA stack. US export controls restricted EDA tools for advanced chips in 2022 but did not target tools for more mature chips. In 2025, the US government briefly placed much broader restrictions on EDA software from Synopsys, Cadence, and others, before lifting them less than two months later as part of a trade deal tied to rare earths. Huawei has been unable to access those tools because it remains on a US trade blacklist. That forced Huawei, SMIC and Chinese academic institutions to build their own tools and flows. Researchers at Peking University recently announced a prototype EDA tool for Huawei’s LogicFolding architecture, which requires a new flow to handle the multilayer layout and floorplan. This is not the same as replacing the full Synopsys or Cadence stack, but it shows where domestic EDA is headed: toward tighter co-optimization between architecture, process and packaging. These advances are also diffusing into the Chinese ecosystem. SMIC is licensing its N+2 and N+3 processes to HLMC/Hua Hong at the government’s direction rather than by choice. If the same process learning feeds into Ascend accelerators for AI training and inference, the choke point shifts from one named fab to an ecosystem. Alibaba’s T-Head silicon arm and Cambricon, a Chinese AI chip designer that is expected to supply ByteDance, could also be major beneficiaries. Sanctions aimed at SMIC alone become less effective once the manufacturing knowledge has spread to other fabs and design houses. China is not closing the gap with Intel, Samsung and TSMC. The teardown shows the opposite in several places: no EUV, no backside power, higher process complexity, and visible trade-offs. But China is still advancing. If domestic chips become good enough for phones, inference, networking and security-sensitive workloads, they can matter strategically without matching TSMC at the leading edge. Behind the paywall, we show what else STEEL can do, with material and process flow analysis of SMIC N+3, and analysis of the Kirin 9030 package. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline, access the full Kirin 9030 and SMIC N+3 analysis or to commission a custom teardown, contact sales@semianalysis.com.

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