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Scientists Find Microbial Life Could Survive on Saturn's Icy Moon Enceladus
Researchers created a mini Enceladus in the lab to see how microscopic life would fare in the moon's ocean.
Reimagining the treatment of mental health: Maria Carolina Bittencourt Gonçalves
By Jessica Leff Listen to Maria tell her story | Wyss Institute · Maria C. B. Gonçalves – Reimagine the WorldMaria Carolina Bittencourt Gonçalves, Ph.D., grew up in São Paulo, Brazil, the largest city by population in South America. It’s comparable to New York, but with a tropical climate. “I knew I wanted to be...
'Saved by the Bell' star Tiffani Thiessen reveals surprising residual check
Tiffani Amber Thiessen may have ruled the school on "Saved by the Bell," but she doesn't have the receipts to prove it.
12 moves that illustrate the brazenness of Trump’s second term
When the Trump administration began running taxpayer-funded “public service announcements” that looked suspiciously like campaign ads for President Donald Trump last week, the White House gamely maintained they were “very clearly not campaign ads.”
Trying Gordon Ramsay frozen meals, ranked from worst to best
I tried eight options from Gordon Ramsay's line of frozen meals, By Gordon Ramsay. Some were better than others, but I loved the spicy cheese ravioli.
What to know ahead of Open Enrollment to avoid health insurance scams
Health insurance scams happen year-round, but they pick up during Open Enrollment for Medicare and the Marketplace. If you’re looking to find a new plan, you might search online. But before you click on a search result, remember: scammers and dishonest businesses sometimes pay to appear at the top.
Xbox is releasing a Gears of War pizza cutter.
Xbox has teamed up with Prince St. Pizza to launch a pizza cutter to mark the launch of Gears of War: E-Day. The $60 cutter is built in the shape of the Prototype Lancer weapon from the game, and also includes an in-game pizza emblem. Price St. Pizza will also be selling an “Emergence Pie” pizza with a spicy vodka sauce in stores across the US and Canada through November 1st. [Image: The $60 Prototype Lancer cutter. https://platform.theverge.com/wp-content/uploads/sites/2/2026/09/CutterImage-a1fcb5295fc994e46da8.jpg?quality=90&strip=all]
GTA 6 Has an 'Advanced' Weather System, but How Will It Work?
GTA 6 is confirmed to have an "advanced" weather system, leading many to wonder if we're going to get tropical storms.
AI Data Centers Emerge as a Hot Topic for Political Ads in 2026
A new analysis from the Absecon Group found that more than 700 candidates this year have run digital ads about data centers.
J.J. McCarthy traded to Giants
Minnesota Vikings QB J.J. McCarthy was acquired by the New York Giants Monday in exchange for a fifth-round pick in 2027.
Velvet Cowboy, a Western Bar With a $5 Food Menu, Opens on the Upper West Side Tomorrow
The Jacob's Pickles team's new bar opens Tuesday with Southwest-inspired cocktails and a menu where every dish costs $5.
Ohio gas tax holiday is easy politics. Paying for it isn't
Ohio's gasoline tax is 38.5 cents a gallon. I can do the math standing at the pump. Fifteen gallons, $5.78. That's the most a driver could save on a fill-up. It isn't a promise.
Community Health, A Capella Choir, Countybank & Flywheel News - 9-27 In The Know
Bon Secours Launches Community Health Plan
CFP Bracketology: Week 4
Another chaotic week of college football saw eight ranked teams fall and a major shakeup around the bubble as the calendar flips to October. We are barely one-third of the way through the season and the playoff picture looks a lot different than it did a few weeks ago. My playoff picture after Week 4: […]
Essentia Health hosting vaccine clinics ahead of respiratory virus season
As we move into fall, Oct. 1 marks the unofficial start of the respiratory illness season. This is typically when the Centers for Disease Control and Prevention (CDC) starts to see an uptick in reported cases of influenza, RSV and COVID-19.
Carmen Southgate experiencing facilities issue, asks that students be picked up
Carmen Schools of Science and Technology announced on social media that Carmen Southgate is experiencing a facilities issue on Monday morning and asked that students be picked up as soon as possible.
A Delightful New Way to Flip a Deep-Red District
Bobby Pulido isn’t your typical Democrat.
Childhood cancer survivors face severe mental health challenges as adults
Consultant and researcher Magnus Aasved Hjort believes that people who survive childhood cancer should receive far better support as adults.
Three Questions Clippers Will Need to Answer During Media Day
Los Angeles has a new-look roster heading into its first media day since the Kawhi Leonard trade, and three topics need clear answers before camp starts in Hawaii.
Pictures from last day of the Academy of Natural Sciences
Founded in 1812, the oldest natural science museum in the Americas closed its doors to the public at 5 p.m. on Sunday, Sept. 27, 2026.
Meet Eba, the San Juan Island dog that excels at sniffing out orcas for science
The pup who was once abandoned on the steps of a shelter gets a new unique job.
In brief: '9 to 5' headed back to theaters and more
Pour yourself a cup of ambition and head out to your local movie theater. 9 to 5 is headed back to movie theaters for a special, weeklong run starting on Oct. 9. This will be a newly restored version of the classic satirical workplace comedy starring the late Dolly Parton. Additionally, Disney is set to donate net proceeds from each ticket purchased for the rerelease in the U.S. to the Dollywood Foundation in support of its flagship program, Dolly Parton’s Imagination Library. Disney is the parent company of ABC News ...Off Campus star Ella Bright has found her next gig. The actress confirmed she will star opposite Mason Thames in the movie Narcs in a post shared to her Instagram Story. This marks Bright's first major studio feature role. The upcoming coming-of-age comedy will be made for Sony Pictures. While the movie's plot is being kept under wraps, it will serve as the directorial debut of John Phillips, the writer of No Hard Feelings, Good Boys and Dirty Grandpa ... TNCMS.AdManager.render({region: 'fixed-big-ad-top-asset', slot: 1, fold: "above"}); Did you miss Evil Dead Burn in theaters? Not to worry. The film is set to make its global streaming debut on HBO Max on Oct. 2. Souheila Yacoub, Tandi Wright, Hunter Doohan, Luciane Buchanan, Erroll Shand and Maude Davey star in the film that was directed by Sébastien Vaniček ...Copyright © 2026, ABC Audio. All rights reserved. Thank you for reading kmaland.comAt KMA, we attempt to be accurate in our reporting. If you see a typo or mistake in a story, please contact us by emailing kmaradio@kmaland.com.
Trump dined with the Anthropic CEO who called for AI slowdown
The president’s first one-on-one meeting with Dario Amodei followed months of tensions.
One of Brett Favre's interception records was broken on 'SNF'
Brett Favre's record for career pick-sixes thrown was broken on "Sunday Night Football." It lasted 18 years.
September 28 Playbook: Vaccination Regulations Rescinded
Reignited public outrage toward restrictive pandemic-era policies. This is the PoliticsPA Playbook. ☕ Good Morning. 36 days until the midterms. Let’s go. 🎶 Your Morning Pick Me Up. I Love It. Icona Pop featuring Charli XCX PA Weather☁️ Pittsburgh | Cloudy, 68☁️ Harrisburg | Cloudy, 70☁️ Philadelphia | Cloudy, 67…
UT Astronomer Selected for Frontiers of Research Project
Philanthropic support from the Simons Foundation is expanding opportunities for discovery on Earth and beyond.
Why Cleaning Isn’t the Mental Health Miracle Everyone Believes It To Be - Futura-Sciences
Where the “therapeutic cleaning” idea comes from The belief in cleaning as a kind of moving meditation is tempting: repetitive gestures, a structured task, instant visible results—it all seems reminiscent of mindfulness. This narrative sounds great in theory, but available studies reveal a far more complex picture, one where context...
Iberville Parish hosts Mental Health Awareness Week
Iberville Parish Government is hosting six days of events in October in observance of Mental Health Awareness Week.
How a Miami-area entrepreneur won a $15,000 grant. What you can learn
Six tips from a Miami entrepreneur about winning pitch competitions
Karol G heats up Tropitour with surprise Drake appearance in Houston
Karol G brought spectacle, tropical vibes and a surprise appearance by Drake to Houston.
Uptown Somerset growing new business opportunities in familiar places
SOMERSET ― Five historic properties are presenting a promising future for a new generation of small business development in the borough's Uptown business district.
Health Tech Keeps Choosing Violence
Last week was an absolute dump of health tech litigation mayhem, with enough new filings to make my wife seriously question my bedtime reading. Here’s what’s inside: OpenEvidence v. Doximity: Doximity didn’t wait for the deadline. It wants OpenEvidence’s case thrown out entirely, and its motion adds some awkward details about vanished Slack data and borrowed NPIs. Plus, Epic v. Apple offers a look at what a normal discovery fight looks like. Texas v. Epic: Epic took another shot at the State’s antitrust pleadings, asking the court to make Texas spell out how its employment restrictions harm competition and why Texas law reaches a Wisconsin company’s noncompetes. Veeva v. Epic: The two Wisconsin law professors finally weighed in on whether a would-be employer can challenge someone else’s noncompete. Audacious Inquiry v. CRISP: Our sleepy patent case just evolved into a much more interesting form, with CRISP firing back with attempted monopolization and information blocking counterclaims. Cognizant v. Infosys: After weeks of emails and phone calls, I finally have Judge Starr’s sealed ruling on Infosys’s antitrust counterclaims. Some survived, offering clues about where the Epic (and other system of record) antitrust cases stand their best chance OpenEvidence v. Doximity
Can Oracle's longtime board oversee its radically changing business?
The company is shifting aggressively toward AI and cloud infrastructure, but six of its 13 nominees are over 70.
AI assessors says current science hasn't caught up to the safety measures people want
Anthropic and OpenAI say they are working with third-party evaluators to make sure their products are safe. Some evaluators caution that current AI science lags behind what people are calling for.
Cook wipes spoon with finger and then keeps stirring
The following is a list of restaurants in Richmond and Columbia counties that were inspected Sept. 18-25, accompanied by their scores and, in some cases, the health infractions that lowered those scores. Scores below 70 are considered failing.
Dortmund defender picks up injury on international duty
Borussia Dortmund are sweating over the fitness of Julian Ryerson after the 28-year-old was forced off while on international duty with Norway.Ryerson was substituted after 66 minutes of his country��...
From pickups to idle plants: automakers seek lifeline from defence boom
Western automakers are chasing a defence spending boom as a way to sell more vehicles and make use of underemployed factories, though executives say military work will not make up for slowing car sales and growing Chinese competition.
Ofer Yannay seeks $200 million for Nofar’s legacy solar business
Nofar is offering to sell its rooftop solar and storage operations as it looks to reduce leverage and strengthen its cash position.
Navigating the American Dream: How Integrated Financial Tools, Credit and Rewards Can Help Small Businesses Succeed
(Feature Impact) Owning a small business has been a cornerstone of the “American Dream” for generations. It represents the chance to transform a passion into a livelihood and legacy. However, turning dreams into reality is rarely a smooth or easy process and requires more than ambition alone. Today’s business owners need support and access to tools that enable them to overcome challenges and keep growing.#placement_678081_0_i{width:100%;margin:0 auto;}var rnd = window.rnd || Math.floor(Math.random()*10e6);var pid678081 = window.pid678081 || rnd;var plc678081 = window.plc678081 || 0;var abkw = window.abkw || '';var absrc = 'https://ads.empowerlocal.co/adserve/;ID=181918;size=0x0;setID=678081;type=js;sw='+screen.width+';sh='+screen.height+';spr='+window.devicePixelRatio+';kw='+abkw+';pid='+pid678081+';place='+(plc678081++)+';rnd='+rnd+';click=CLICK_MACRO_PLACEHOLDER';var _absrc = absrc.split("type=js"); absrc = _absrc[0] + 'type=js;referrer=' + encodeURIComponent(document.location.href) + _absrc[1];document.write('');Recent research conducted by the Capital One Insights Center shows 75% of more than 1,000 surveyed small business owners with more than one employee and annual revenues of up to $20 million are confident about the future, and 69% believe their business is actively primed for growth.While this optimism is promising, 47% of business owners still said their operations either stayed the same or became less efficient over the past year, citing issues like back-office friction and fragmented financial systems that make it difficult to get a clear picture of the health of their businesses.If you’re a small business owner eager to grow but not sure how to get there, start with this advice from real small business owners and experts at Capital One.Identify Sources of FrictionBefore you can pour effort into growth, you must understand what barriers are holding you back. Take time to look under the hood of your business to identify where time and energy is being lost.For example, you may be among the 78% of small business owners who feel stressed and uncertain about expense management – think hours spent hunting for receipts, manually entering numbers into software and reconciling accounts. Operational challenges aren’t just a hassle; they also pull attention away from important priorities like serving your customers and planning for growth. “We were focused on making as many candles as possible, especially during the busy season,” said Katie Roering, co-owner of Fontana Candle Co. “A lot of the back-office tasks like procurement, raw material purchasing, forecasting – all the really important things – were done at 3 a.m., 8 p.m. or on Saturday and Sunday, and there really just was not enough time in the day to get everything done that we needed to. We just knew as we continued to grow, we needed to streamline our processes, build out our team and keep moving forward.”Use Integrated Tools to Manage FinancesInstead of balancing 10 different tracking and analysis tools, you can turn to one-stop solutions to improve efficiency. Time gets lost when you’re forced to manually gather and interpret relevant data before you’re able to act. You need a platform that handles the busywork for you.Integrated, or “all-in-one,” financial tools – like accounting and bookkeeping platforms with automation capabilities or business credit cards featuring built-in analytical tools – allow you to easily stay on top of cash flow and day-to-day operations. For small businesses where every hour and dollar makes a difference, consolidating and automating systems can have an immediate impact. In fact, 51% of survey respondents said integrated tools have already fueled their growth.Leverage Credit Access and Rewards WiselyGrowth requires capital, so access to credit is a game-changer for many business owners, with 77% describing it as a key factor in achieving business resilience. Having funds accessible when you need them makes your business more capable of weathering storms such as equipment failures and seasonal slowdowns. It also puts the power in your hands to act when an exciting opportunity presents itself, like an inventory flash sale or the chance to advertise in a new market.Access to credit comes with another advantage: rewards. By using credit cards for your daily business expenses, you can earn cash back, points or travel rewards. Whether you redeem these to cover everyday expenses, book business trips or reinvest in the business, they can act as a bonus source of income. Learn to maximize rewards like the 84% of small business cardholders surveyed so you aren’t leaving money on the table.To learn more about how small business owners can identify obstacles, employ integrated financial tools and use credit as a tool for growth, read the full report at capitalone.com/about/insights-center.Photos courtesy of Shutterstock
Progressive politics the only credible path to revive Democratic Party
The center has fallen. As Republican Party has veered toward authoritarianism under Donald Trump, Democrats need to head in a new direction.
Faraday Future Announces This Week’s Investor Weekly Report From YT Jia Has Been Rescheduled to September 28; FF EAI “Built in USA” Upstream & Downstream Business Partner Conference Part Two to Be Held September 29
FF Founder and Global CEO YT Jia’s Investor Weekly Report has been rescheduled for the afternoon of September 28 and will be released at its usual time. FF has invited 10 global partners to share insights on the EAI robotics industry, FF’s “Built in USA” strategy and related topics, highlighting the potential for collaboration between […]
MLB playoff picks 2026: Dodgers? Yankees? Rays? Brewers? Yahoo Sports makes postseason predictions all the way to the World Series
Parents-in-law accused of killing Dublin man at sports park
A Dublin man was shot to death in the parking lot of a local sports park Saturday afternoon and his elderly parents-in-law have been booked in jail on suspicion of committing the homicide, city police said in a case update Sunday.
See the brilliance: Dunn artist creates and sells glass artwork that shines brightly
Cindy Akers-Gilford creates stained glass, fused glass, mosaics, handmade glass jewelry, pendants, suncatchers and other original glass artwork in her studio in Dunn, N.C. Photos provided by Cimply Broken.Self-made Artist and Founder of Cimply Broken, Cindy Akers-Gilford is helping people “see the brilliance” in all things with her glass artwork. Akers-Gilford started her business right after she retired from 20+ years as a civilian contractor at Fort Bragg. The official opening date for Cimply Broken was Nov. 8, 2021.“It’s been quite the adventure ever since. Not only did I have to learn how to manage a small business, but I’ve never taken a class in stained glass or anything I currently do,” shared Akers-Gilford. Her work includes stained glass, fused glass, mosaics, handmade glass jewelry, pendants, suncatchers and other original glass artwork.“I chose glass art just by happenstance. I saw a video on YouTube with a gentleman using plates and resin to make beautiful windows. I used that idea and created a simple picture frame-sized piece for myself. It was beautiful. I put it up in my window and pretty much forgot about it for a few days. Well, one beautiful sunny morning I went up to my studio, and the sun was rising and the light was shining beautifully through that piece. It was absolutely stunning. I thought that it was the perfect reflection of how God’s light shines through each of us. It was broken glass, so it changed ever so slightly as the sun continued to rise in the sky. I thought it poignant – like each of us – we all shine bright and differently in God’s glorious light, and we are all simply broken as well. We are all made beautiful in his light,” explained Akers-Gilford.The name of the business was inspired by the artist’s name and her faith-driven mission. “Simply became ‘Cimply’ as a play on my name and ‘simply’… and ‘Broken’ because we are all Cimply Broken – but each of us is beautiful,” added Akers-Gilford.Akers-Gilford sells her glass art at the Dunn Farmers Market when the weather is bearable, but mostly from her website at www.cimplybroken.com. “I enjoy getting lost in the creative process. I work out of my home, and I often compare my studio to Walmart returns after Christmas time. It’s hectic, busy and there are always at least 10 things being created simultaneously- it is fun!” shared Akers-Gilford. Her goal for the business is to continue to watch customers as they spot a piece of work from a distance and walk up to it in awe. “That is my biggest joy! I don’t speak to them until they speak – that is their moment to ‘See The Brilliance,’ which is my moniker,” shared Akers-Gilford. She also shared she would love to someday become part of an artist collective in Dunn.
Think Beyond Brita — These Advanced Water Filter Pitchers From $15 Help Remove Microplastics From Your Glass
More microplastics and forever chemicals are popping up in our drinking water. As a public health expert, I rounded up seven water filter pitchers to help reduce your microplastic exposure in your drinking water. Picks include pitchers from Culligan, Aquagear, LifeStraw, Aarke, and more.
Former 1st-Round Pick Delivers Huge TD for Commanders
Washington Commanders WR & Former 1st-Round Pick Scores TD Against Seahawks. The post Former 1st-Round Pick Delivers Huge TD for Commanders appeared first on HEAVY.
Dario Amodei of Anthropic to Dine With Trump at White House
Dario Amodei, who is also the company’s chief executive, will join the president at the White House for a private dinner. Mr. Trump has dismissed his cautions.
Did Anthropic’s A.I. Really Make a Scientific Discovery on Its Own?
An expert at the University of Copenhagen said his team had been sharing its research with the company’s A.I. model, Claude, and that its new finding matched their work.
Chicago Bears vs. Philadelphia Eagles Game Picks and Predictions
The WCG crew, including @GOOCH1701, @SamHouseholder, @wiltfongjr, and more, with their picks for the Bears vs. Eagles game!
Jalen Brunson hosts 'SNL' Season 52 premiere as Weekend Update spoofs Anthropic's Dario Amodei
Knicks star Jalen Brunson hosted the "SNL" Season 52 premiere with help from his teammates, Katseye made its debut and Jane Wickline spoofed Anthropic CEO Dario Amodei.
Patriots’ Drake Maye loses fumble in most hilarious way possible
The 2024 first-round pick now has five turnovers in his first three games this season.
Richard Manoogian, longtime Masco chairman and DIA backer, dies at 90
The second-generation leader built Masco into a global home-improvement giant and left a large philanthropic mark on metro Detroit, especially in the arts.
Five Nights at Freddy's is coming to Fortnite for Fortnitemares
Epic has confirmed Five Nights at Freddy's is coming to Fortnite for Fortnitemares, with Freddy, Bonnie, Chica and Foxy appearing as bosses.
Social care reform could mean big risks and big rewards for Burnham
The state of the social care system in England is a topic that's made Andy Burnham angry for decades - but will his plans for reform work?
Social care reform could mean big risks and big rewards for Burnham
The state of the social care system in England is a topic that's made Andy Burnham angry for decades - but will his plans for reform work?
The New Season: Fall 2026 - The most anticipated new movies, music, TV and more
Christie, Booker, Sherrill, Kim in ’28? It’s possible
Also, the latest on Lt. Gov. Dale Caldwell's resignation, a possible state Supreme Court pick, and more.
Cardinals vs 49ers Prediction, Pick, Odds for NFL Week 3
If you want more Action Network content, be sure to add us as a preferred source on Google. The Arizona Cardinals (1-1) and San Francisco 49ers (2-0) battle in Week
Zoff: ‘Mancini’s advantage is Italy cannot get any worse’
Dino Zoff was not encouraged by what he saw at the Stadio Olimpico on Friday evening, but the 1982 World Cup-winning captain believes there is only one direction available to Roberto Mancini’s Italy...
NFL Week 3 expert picks, score predictions: Jets at Lions
New York Jets vs. Detroit Lions NFL Week 3 expert picks from the Pride of Detroit staff.
Open Thread, September 27, 2026: What you doing today?
Your daily source for off topic chatter with the MMA Mania faithful.
Harrison: Will Mississippi politicians avoid blame for rising healthcare costs?
Nearly all of Mississippi’s congressional delegation voted against extending the enhanced tax credits or subsidies for the Affordable Care Act Marketplace insurance policies.
NFL Predictions, Week 3 Picks: Expert Best Bets for Sunday
If you want more Action Network content, be sure to add us as a preferred source on Google. Our football staff is focused on eight of Sunday’s biggest
Injured Isak returns to Liverpool from Sweden duty
Liverpool striker Alexander Isak has returned to his club after picking up a minor injury while on international duty with Sweden. The 27-year-old will not be involved in Sweden's remaining three matches in this international break and will be assessed by his club's medical staff. Isak has started the season with four goals in five Premier League games for the Reds.
Astrana Health (ASTH) Rebound Meets A Narrative That Still Sees Undervalued Shares
Astrana Health (ASTH) has been under the spotlight since rebranding from Apollo Medical Holdings in February 2024, with investors now weighing its three-segment healthcare model against recent share price swings. Recent trading paints a mixed picture for Astrana Health. The 1-day share price return of 5.60% and 7-day gain of 5.85% come after a 90-day share price decline of 19.23%. The 1-year total shareholder return of 22.54% contrasts with a 5-year total shareholder loss of 59.33%,...
NFL Week 3 expert picks, predictions: Moneylines, against the spread
Our staff’s picks and predictions for all NFL Week 3 games of the 2026 season.
BioMedizone opens doors to science for underserved students
Before Anvi Palav was even old enough to carry a driver's license, she already had her sights set on changing the world – and a plan for how to do it.
Penguins roster status as opening rosters loom
The Penguins trimmed their NHL roster by six players yesterday. Defensemen Owen Pickering, Caleb Jones and Jake Livanavage were among players being sent away. That leaves the roster looking like this. Opening day rosters are due tomorrow, which means players must go on waivers today to clear in time to be re-assigned down. The Pens […]
Trump, Flock cameras and Florida politics fire up Brevard readers
Editor's Note: The Question of the Week will return next Sunday.
Trump, Flock cameras and Florida politics fire up Brevard readers
Editor's Note: The Question of the Week will return next Sunday.
A ‘Big Problem’: Trump’s War With Iran Drags Down Republicans in Midterms
As their November picture darkens, and gas and diesel prices soar, some Republicans who backed the war for months are now changing their tune.
Job Titles Are Out. Now We’re All ‘Members of the Technical Staff.’
Use of the generic title has risen by 50 percent in the last year among employees at Anthropic, OpenAI and other A.I. companies, an analysis found.
What can Pennsylvania learn from the Texas measles outbreak?
While the outbreaks have similarities — notably, that the epicenter of the outbreaks in each state hit hardest in counties with concentrations of Mennonites — the public health approaches have differed in part.
Kohli has 'unfinished business' at his 'last World Cup' in 2027
"My dream is to play a match-winning, finishing knock in the finals, like chasing a score - that's the ideal scenario," Virat Kohli says about the perfect sign-off
‘Perfect’ – Justin Verlander’s final moment on MLB field with daughter has left all fans emotional
Detroit Tigers RHP Justin Verlander has played his final game in the MLB, as the 43-year-old steps away in an incredible on-field moment. The Tigers picked up an incredible 4-3 walk-off win over the Pittsburgh Pirates to send the legendary Verlander off into the sunset on a win.
OpenAI, Anthropic CEOs called to appear at Australian AI probe
SYDNEY, Sept 27 (Reuters) - The CEOs of OpenAI and Anthropic have been called to appear at an Australian Senate inquiry on AI, the head of the probe said on
Expert picks for Sunday singles at the 2026 Presidents Cup
After three days and four sessions at the Presidents Cup, it's time now for the Sunday singles.
What to expect at Sunday’s MTV Video Music Awards
Swift, Madonna, Grande, Mars and Carpenter are also nominated for Artist of the Year along with country singer Morgan Wallen.
Iowa football’s walk-off TD hands Michigan epic reality check
Big Ten football has seen absolute chaos through the first four weeks of the college football season. Saturday’s Iowa-Michigan battle at the Big House didn’t disappoint. Kirk Ferentz and the Iowa Hawkeyes pulled off one of the best comebacks of…
Four Chord Music Fest brings nearly 30 acts to Pittsburgh for 12th year
For 12 years, Four Chord Music Festival has called Pittsburgh home, and this weekend, thousands of fans packed F.N.B. Stadium for another year of music, merchandise and memories.
Chili Festival 2026
NEWPORT–The 2026 Chili Fest took place in downtown Newport on Saturday from 11-2, featuring a chili cook-off, wagon rides and more. Here are a few pics from the event, and
Live from Tuscaloosa: South Carolina battles Alabama in search of first SEC win
The Gamecocks haven’t beat Alabama since 2010. The last time USC won in Tuscaloosa was in 2004.
Giving Props: Vikings Player Bets Vs the Buccaneers
Hopefully better than last week’s picks
CBS Sports picking Seahawks to defeat Commanders in NFL Week 3
The Seahawks have momentum on their side as they approach their Week 3 matchup against the shorthanded Commanders.
Bumper crowd see Penybont victory & Flint finally win
Cymru Premier 26 Sep: Penybont and TNS remain unbeaten as Flint Town pick up first win of the season and Caernarfon Town hit late leveller.
Gilmour builds perfect midfielder including Pirlo and McTominay
Napoli and Scotland international Billy Gilmour was asked to create his ultimate midfielder, picking elements from Andrea Pirlo, Scott McTominay and more.The player sat down with DAZN to go through th...
Art and framing store to close after 36 years in SLO County. ‘It’s time’
The business first started in 1990 when a couple took over a small art shop.
UN adds major Israeli companies to ‘blacklist’ over settlement ties
The UN added 61 companies to its 'blacklist' of businesses linked to West Bank settlements, including Tnuva, Netafim and Aroma; Israel condemned the list as a 'distorted mechanism' targeting companies that committed no wrongdoing
ESPN's 'College GameDay' picks Week 4's top games
Who did ESPN's College GameDay pick to win Week 4's top games?
What will make this Red Sox season a success?
A season ago, the Red Sox finished third in the American League East, winning 89 games. This season, depending on the result of a final game at Tropicana Field against the Chicago Cubs (a real sentence), the team will win 87 or 88 games. Last year, Boston was the 5-seed playing at the New York […]
Youth sports are broken. Reality TV and Kim Kardashian are cashing in.
The conversation about youth sports has made it to reality TV.
Anthropic says Claude found a new gene-editing enzyme but science isn't confirmed
Anthropic says Claude agents autonomously flagged a CRISPR-like enzyme system in virus DNA in a 21-hour run. A CRISPR pioneer calls it intriguing, others sceptical — it's an unreviewed preprint with function unknown.
Germany coach Klopp support nation's plans to host Olympics
Germany coach Jürgen Klopp showed his support for the nation's plans to host Olympic Games with an emotional anecdote. "All my memories of sports actually begin with the Olympic Games," Klopp told broadcasters ARD.
Heads of OpenAI and Anthropic called to face Senate inquiry after rogue agent incidents
Sam Altman and Dario Amodei have been invited to appear before the Greens-led inquiry into AI and datacentres
Intel Panther Lake Teardown, 18A, BSPD, GAAFET, SemiAnalysis STEEL
Panther Lake debuts the first commercial implementation of backside power delivery (BSPDN), introduces Intel’s first iteration of gate-all-around (GAA) transistors, and showcases their advanced packaging capabilities with its Foveros-S assembly. With Panther Lake, Intel’s manufacturing arc has shifted from nebulous roadmaps to shipped silicon, a significant milestone on their long road back to competitive semiconductor manufacturing. To evaluate the extent of Intel’s comeback, we tore down Panther Lake. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Our teardown traces 18A from its four-sheet RibbonFETs (Intel’s marketing name for GAAFETs) and gate stacks through contacts, frontside and backside wiring, and the bonded carrier. We explain how these material and integration choices improve gate control and reduce resistance, while adding capacitance, thermal resistance, and process complexity. Our measurements put Panther Lake’s 18A compute logic and TSMC N3E GPU logic at similar logic density. However, 18A does not lead TSMC N3P, N2 or Samsung SF2 in peak density. Panther Lake’s CPU cores are incremental updates, and the high-end GPU still uses TSMC N3E. Panther Lake assembles one compute tile, one GPU tile, and one I/O tile atop a passive base tile using Intel’s Foveros-S advanced packaging. Both compute tile variants use Intel 18A. The Xe3 GPU options are a 4-core GT1 tile on Intel 3 and a larger 12-core GT2 tile on TSMC N3E. Both I/O tile variants use TSMC N6. [1], [2] Our analysis centers on the PTL-U compute tile, both the 4-core and 12-core GPU tiles, as well as the 12-lane I/O tile. In conventional chips, power and signal are routed through the same frontside metal stack towards the device frontend. Power rails consume scarce routing resources near the transistors, while tall via stacks carry VDD and VSS from the coarse upper wires to local rails. Backside power delivery (BSPD) moves the main power network behind the transistor layer, to the backside, separating it from frontside signal routing. We covered BSPD and its impacts in 2024. [3], [4], [5] Intel’s BSPD implementation, branded as “PowerVia”, routes power through dedicated backside metals to nano-TSVs, which connect those rails to local source/drain (S/D) contacts. Implementing that separation requires Intel to build the interconnect stacks from both sides of the wafer. The frontside comprises the M0-M14 signal stack, while the backside comprises the BM0-BM5 power stack. M0 and BM0 are closest to the transistors. The nano-TSVs connect the two sides, but Intel patterns and etches each via from the front after forming the contacts. A narrow via runs from the side of the contact deep into the silicon substrate. Intel then completes the frontside signal metal stack, bonds the wafer to a carrier, flips it and removes the original substrate until the buried via tips are exposed. The backside metal stack is then deposited directly on the revealed vias. The nano-TSV and backside-via profiles taper in opposite directions because Intel forms them from opposite sides of the wafer. The transistor structures form the FEOL. Local contacts and nano-TSVs connect them to the wiring. M0 begins the frontside interconnect stack. The silicon carrier remains attached above the frontside interconnects. It supports the device wafer during substrate removal and backside processing and remains part of the finished chip’s thermal path. PowerVia removes the main power distribution from the congested frontside metals, routing supply through shorter and wider backside wires. Its lateral landing still occupies area in the standard cell, so it recovers less cell area than a direct backside contact. [3] Nano-TSVs beside the logic devices carry VDD or VSS from the backside power network, while signal connections continue upward through the frontside metals. Backside Interconnects Samsung SF2 data is included for comparison to Panther Lake’s within this article. SF2 is the incumbent GAA foundry node but lacks BSPD, serving as a useful reference to evaluate 18A. A full teardown of Samsung’s S26 products, processed on SF2, will be shared soon.Nanosheet-cut EDS comparison. The PowerVia supply path runs from the backside Cu rails through Mo-lined W nano-TSVs to the local transistor contacts. In this cross section, the tapered connection spans roughly 150 nm from the contact level to BM0. The Ta liner confines Cu and promotes adhesion to the surrounding stack; the AlOₓ etch stop controls the next dielectric etch above the rail. Dielectric beneath the ribbons electrically separates the devices from the backside wiring and removes the conducting silicon body below the channel. [6] AlOₓ serves as an etchstop (ES), enabling endpointing and protecting the underlying layers. Low-volatility aluminum fluoride reaction products resist the fluorinated plasma, allowing a thin AlOₓ film to protect the metal while the surrounding low-k dielectric is removed. [6], [7]. While the BM0 and layers above the M1 lines show double AlOx layers, Our SMIC N+3 teardown showed single AlOₓ layers. SMIC uses a simpler local AlOₓ substack, while the remaining cap and etch sequence provide the required landing protection. So why double layers? The closely spaced AlOₓ doublets provide two protected endpoints in the etch sequence. Intel documents an AlOₓ/SiN/AlOₓ stack that explains the benefit. The main dielectric plasma etch stops on the first AlOₓ film; a selective wet clear opens that film; a second plasma etch removes the intermediate SiN and stops on the second AlOₓ film. The final wet clear exposes the metal landing surface. SiN is the intermediate dielectric in Intel’s published example. [8] The second stop protects the metal through a cap breakthrough. Wide openings can etch faster than narrow ones, and etch depth varies across the wafer. Metal under an early-clearing opening would otherwise be exposed while other openings still need more etching. Staged protection widens the process window and reduces metal erosion, corrosion and void formation. [8] TSMC documents AlN/AlOₓ/SiOC/AlOₓ above Cu, with AlN blocking Cu diffusion, and a simpler AlN/SiOC/AlOₓ variant that omits one AlOx film. [9] Levels with different opening sizes, aspect ratios, pattern densities and cap materials need different etch margins. A double AlOx stop is useful where another protected endpoint justifies the added processing. The extra film adds formation, selective opening and cleaning steps, plus another set of interfaces to control adhesion, moisture, and stress. These blanket films are opened through the existing via pattern, so each film does not require another lithography mask. AlOₓ adds parasitic capacitance when it replaces lower-k dielectric; two thin AlOₓ films can nevertheless contain less AlOₓ than one thick film. Total thickness, placement, and theintermediate dielectric determine the electrical cost. Deposition chemistry also changes AlOx permittivity and residual hydroxyl content, which can oxidize the underlying metal. [7], [8], [10], [11] The backside stack separates into relatively fine BM0-BM2 wiring near the devices and coarser BM3-BM5 power distribution. The largest pitch increase occurs between BM2 and BM3. BM0’s pitch closely matches the logic-row height, fitting local power delivery to the cell rows. Higher levels aggregate current through larger conductors: routing density becomes less important than low resistance and current capacity as the network approaches the package. This hierarchy provides wide power wiring for the power delivery network without consuming scarce frontside signal-routing resources. [3] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Frontside Interconnects Intel 18A combines Mo-lined W contacts and nano-TSVs with a separate backside Cu power network. Samsung SF2 keeps power on the frontside, using Ti-based contact interfaces and Ta-based barriers and Co liners around Cu wiring. In 18A standard-cell rows, backside power rails supply the devices through nano-TSVs within the cells, freeing frontside routing resources. Samsung’s M0 accommodates both power and signal connections. From the device toward M0, the connection runs through a Ti-based S/D interface, W contact fill, a Mo-lined W via, and the Cu M0 wire. Mo supplies a conductive nucleation and adhesion layer for W, replacing the resistive TiN liner used in conventional W integration. This increases the effective conduction volume within the feature while retaining W fill and its established polishing, cleaning and etching processes. Intel’s Mo/W patent describes this integration tradeoff. The nano-TSV uses the same Mo-lined W construction in the backside supply path. [12] The move from TiN to Mo is an incremental change. While a full Co or Mo fill can also reduce the volume lost to liners in very small features, it requires new integration schemes that increase complexity and risk. Cu remains attractive for wider wires due to its low resistance. As wires and vias shrink, the diffusion barrier consumes an increasing fraction of their cross-section. [12], [12], [14] Intel uses Co/Ru liners at M0-M1, Co at M2-M4, and Nb at M5-M9. The lower-level liners help Cu adhere and reduce void formation during trench fills. Applied Materials’ Endura has new thermal control that facilitate wetting process, so the thin film continuity is good enough that good capillary pressure will drive Cu atoms to the via bottom without voiding. Intel’s choice to use Nb is particularly interesting. Intel’s Nb patent describes a conductive diffusion barrier intended to reduce the barrier’s contribution to resistance relative to conventional Ta-based barriers, particularly at via bottoms where all current crosses the barrier. The patent pairs Nb in coarser levels with the option of lower-cost PVD processing. [15], [16] The upper metal layers support thicker barriers formed through physical vapor deposition (PVD) despite its worse coverage and uniformity. Meanwhile, the lower metal layers require thinner barriers deposited through conformal atomic layer deposition (ALD). Co/Ru adds another material interface and requires controlled deposition and Cu fill. Changing liners and barriers by metal layer allows Intel to optimize interconnect resistance, process complexity, and reliability. [15, 16] RibbonFET, Intel’s name for its gate-all-around FETs (GAAFETs), replaces the FinFET’s vertical fins with four stacked horizontal silicon nanosheets, allowing the gate to surround the channel on every side. The path to GAAFET begins with the planar transistor. A planar MOSFET places the gate above the channel between its source and drain. Pairing an NMOS with a PMOS transistor creates a CMOS inverter, in which the NMOS pulls the output low for a high input, and the PMOS pulls it high for a low input. The gate must retain electrostatic control of the channel to ensure clean switching. As gate lengths shrank, the drain began to compete with the gate for that control, increasing off-state leakage. Electrostatic control was restored through an architectural evolution that raised the channel into a vertical fin and wrapping the gate around three sides. Called “FinFET”, this new architecture packed more effective channel width into a smaller footprint. Further scaling made it harder to maintain both drive current and leakage within smaller cells, and reintroduced the same problems planar MOSFETs faced. Nanosheet GAAFETs close the fourth side by replacing the vertical fin with a stack of horizontal nanosheets, each surrounded by the gate. The tighter electrostatic control suppresses leakage at shorter gate lengths while stacking adds effective channel width within the cell footprint. In a FinFET process, channel width changes in discrete steps as designers must add or remove whole fins. Nanosheet width can instead be adjusted continuously within the process’s design rules. Wider sheets increase drive current, while narrower sheets reduce capacitance at the cost of drive current. Intel 18A uses stacks of four nanosheets each and varies their widths across logic and SRAM. At the process level, adding more sheets to each stack increases effective channel width and drive current, but complicates fabrication. RibbonFET vs MBCFET Samsung began GAAFET production in 2022 with SF3E, following with SF3 and now SF2. Its ‘MBCFET’ provides a useful structural comparison with Intel’s first RibbonFET implementation. [17] STEEL is digging deeper into SF2, used in the Exynos 2600, and TSMC’s GAAFET N2, used in Apple’s A20 Pro, in upcoming newsletter articles. We’re throwing some teasers on X. Let’s compare Samsung SF2’s MBCFET with Intel 18A’s RibbonFET. Subscribe Even to the untrained eye, Intel’s extra nanosheet is obvious. Intel stacks four ribbons to Samsung’s three. Samsung’s sheets are much wider in these fields, so both sheet count and width matter to the available channel perimeter. Sheet width also changes which silicon surfaces carry current. On conventional (001) silicon, wide nanosheets emphasize the broad top and bottom surfaces, favoring electron transport; the larger sidewall contribution in a narrow sheet favors hole transport. Thinner sheets improve gate control but increase confinement and scattering. This makes width and thickness part of the NMOS/PMOS balance, alongside strain and threshold voltage. [18], [19] GAAFET designs like 18A use different work-function-metal (WFM) stacks for NMOS and PMOS. Around each ribbon, a thin SiOx interfacial layer separates the silicon channel from the HfOx high-k dielectric, with La providing dipole tuning and the WFM wrapping the dielectric. NMOS uses a TiAl-based stack, while PMOS uses TiN WFM. W fills the remaining gate trench, providing a lower-resistivity path where the work-function layers are no longer needed. In this field, the PMOS stacks leave room for W between ribbons, while the NMOS stacks occupy more of those gaps. A silicon-based dielectric marks the P/N boundary, allowing the PMOS and NMOS gates, sharing the same gate trench, to be processed sequentially. Fast logic paths, retention circuits, and SRAM need a family of threshold options. Changing threshold without substantially changing device dimensions, capacitance or fabrication complexity is valuable. FinFET processes typically use different work-function-metal stacks. In a four-ribbon GAA stack, the narrow sheet-to-sheet gap limits how much WFM can fit around each channel. La in the gate dielectric creates interfacial dipoles at the SiOx/HfOx boundary, shifting effective work function and tuning threshold voltage. This gives Intel another control alongside its NMOS and PMOS WFM stacks. Low-threshold devices improve critical-path drive; higher thresholds reduce leakage elsewhere. Dipole tuning is especially useful in GAA because it changes threshold without consuming the narrow intersheet gap with thicker WFM. Precise control of La incorporation, diffusion and interface quality has long been a challenge, limiting viability in high volume production but is now seen from every leading-edge foundry. Intel’s patent describes depositing a dipole-forming oxide above HfOx and annealing it toward the interfacial oxide before completing the work-function and fill metals. This separates threshold tuning from the space available for metal. Newer research addresses the thermal cost: imec’s 2026 dipole-middle research inserts the shifter between two HfOx depositions, shortening the diffusion path while protecting SiOx during patterning. [20], [21]Matched-cut EDS, Intel 18A (left) vs. Samsung SF2 (right). Intel retains raised source/drain epi beneath its contacts, while Samsung recesses W deep into the epi to form a V-shaped Ti-lined interface. The deeper contact increases metal-to-semiconductor area and shortens the current path from the lower sheets, reducing contact and spreading resistance. It also removes epi volume and brings the contact etch closer to the channel ends. Retaining more epi preserves the material available for strain transfer, especially from SiGe into PMOS. These geometries balance contact access against stress engineering and etch margin. [22], [23] Samsung stacks three sheets to Intel’s four ribbons, and both processes use sheet width to tune drive strength. In our Samsung cross-sections, widths range roughly from 19 to 30 nm in the NPU rows and 37 to 50 nm in the CU cell. The Samsung nanosheets taper, with the widest sheet at the bottom and the narrowest at the top. Both processes use HfOx gate dielectric and Ti-based work-function stacks, with Al in the NMOS stack. In the Samsung devices shown here, the dielectric and WFM occupy the intersheet gaps, leaving W above the top sheet. Intel’s PMOS stack leaves more room between ribbons, and W fills those gaps while the thicker NMOS stack leaves W mainly in the upper trench. Gate-stack EDS maps. The W between Intel’s PMOS ribbons provides a conductive path close to the lower gates. Where WFM fills the entire gap, the gate still surrounds the channel, but voltage reaches it through the more resistive work-function films. Thinner WFM and dipole tuning preserve room for low-resistivity fill; Mo and Ru are alternative fill metals being developed for further scaling. [24] A masked, sequential WFM flow explains the different gate heights and inter-nanosheet fill. The proposed sequence below shows how separate NMOS and PMOS work-function steps produce that geometry. Enabled by the BSPDN process, Intel replaces the dense-logic silicon subfin with dielectric, removing the parasitic conduction path below the ribbons and reducing substrate-related capacitance. A retained silicon body as in classical, non-SOI, planar and FinFET designs needs junction and punchthrough-stop engineering to suppress leakage. Dielectric isolation makes that leakage less sensitive to the subfin doping profile but adds removal and fill steps. It also weakens the direct thermal path through silicon, making the contacts, metal stacks and package more important for heat extraction. [24], [26] Fluorine is concentrated around selected Intel device structures in the maps. WF6 is a standard precursor for W nucleation and fill, while barrier films protect adjacent dielectrics from fluorine attack. Low-fluorine W processes reduce the residual-F burden. Chloride-based precursors avoid introducing F during W deposition, but require control of chlorine attack, nucleation and fill quality. The integration target is a continuous, low-resistance W path with a thin protective liner and minimal chemical damage to the surrounding stack. [20], [27], [28] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. We measured cell height, gate pitch, metal geometry, and ribbon dimensions at the XTEM sites shown below. The tables group these dimensions by site and device polarity. Our “sheet cuts” cross the silicon channel and show the ribbons end-on. “gate cuts” run along the channel through successive gates. The 18A logic cell dimensions point to a five-track logic library while the N3E and Intel 3 cell dimensions evidence a seven-track logic library. The DDR-PHY uses wider M0 wires and much larger spacing than core logic. That trades routing density for lower wire resistance and weaker coupling between neighboring nets. The geometry suits the current delivery and coupling requirements of analog, clock, and I/O circuitry. PowerVia lets 18A combine a compact cell height with wider M0 geometry by moving the main power rails off the signal-routing tracks. That relaxes local wire scaling while preserving a small cell footprint. Cell height and gate pitch set the geometric density; pin access and routability determine how much of it a real block can use. [29] The biggest takeaway from our gate-pitch measurements is that Intel 18A compute logic and TSMC N3E GPU logic have similar density in the Bohr representative-cell model. The 18A example is 18.6% denser than the Intel 3 GPU example. Gate pitches are nearly identical across the three sites, so cell height drives most of the difference. The Bohr model combines a four-transistor NAND2 spanning three gate pitches and a 32-transistor scan flip-flop (SFF) spanning nineteen pitches, weighting their densities 60:40. The sensitivity column shows how independently changing cell height and gate pitch by ±1 nm changes the result. This compares representative cell geometries; whole-die density also depends on cell mix and placement. The 18A P-core gives M0 substantially more metal cross section than the N3E vector engine. Treating each profile as a trapezoid gives 2.63 times the area per line and 1.84 times the area after normalization by routing pitch. The larger section reduces the geometric contribution to line resistance and lowers current density for a given current. Taller and wider wires also add capacitance, so circuit delay depends on the balance of resistance and capacitance. The DDR-PHY has less metal area per routing width than the 18A core fields, while remaining above N3E. [30] Area = height × (top CD + bottom CD) / 2, including liners. Area/pitch normalizes by routing width. Taper is the symmetric sidewall angle from vertical, with the largest angle belonging to the DDR-PHY. Compute tile The measurements show how ribbon dimensions and gate-stack geometry vary across the compute tile and between NMOS and PMOS to balance channel drive, gate load and the space needed for the dielectric/WFM stack across logic, SRAM and the DDR-PHY. Width mainly changes available channel perimeter; thickness also changes electrostatic control and carrier confinement. Gate-stack thickness then determines the space left for low-resistivity fill P-core and LP E-core logic Both the P-core and LP E-core use multiple nanosheet widths. Widths are measured on high-magnification XTEMs while wider-field images demonstrate additional width choices within the LP E-core. Multiple widths are expected even within an LP E-core. Timing-critical paths, buffers and cells with different fanout need different drive strengths. The lower-magnification fields show this width diversity beyond the sites quantified in the table. L2 and L3 SRAM GAA gives SRAM designers another way to balance the pull-up (PU), pass-gate (PG), and pull-down (PD) transistors. FinFET bitcells set device strength through fin count while GAA adds nanosheet width as a sizing knob. In a 6T SRAM cell, a strong pull-down relative to the pass-gate limits read disturbance, while a strong pass-gate relative to the pull-up improves writability. During a write, the pass-gate and write driver pull the node storing “1” below the inverter trip point. During a read, the pull-down holds the node storing “0” low. Bias, threshold voltage, mismatch and assist circuitry set the remaining margin. FinFET high-current cells commonly use a PU:PG:PD fin-count pattern of 1:2:2, a device-sizing ratio rather than a current ratio. Ribbon width lets Intel balance SRAM strengths without adding whole fins. The L2 cell uses its narrowest ribbons for PU and widest for PD, improving writability and read stability respectively. Intel’s disclosed HCC operates without assist; its denser HDC uses negative-bitline write assist. Pulling the selected bitline briefly below ground increases pass-gate overdrive so it can overpower the pull-up at lower supply voltage. That buys density and low voltage writability at the cost of boosting circuitry, switching energy, and additional voltage stress that must be controlled. [31], [32] Four rectangular ribbons give the perimeter = 8 × (width + thickness), before corner rounding. PG/PU is 1.49 and PD/PG is 1.16. The L3 structures closely resemble L2 in layout and cell height. Fewer L3 nanosheet widths are tabulated because fewer high-magnification images were available. DDR PHY The DDR-PHY trades density for controlled analog behavior and reliable off-chip signaling. It contains drivers, receivers, delay circuits, and calibration logic that set drive strength, sampling time, and voltage margin. Repeated four-sheet devices with similar widths fit the use of regular transistor units for matching and programmable drive. Its wider local wiring provides room for current delivery and separation of sensitive signals, while consuming more area than a dense core-logic grid. The layout serves the memory channel’s electrical requirements as well as digital logic density. [33] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Intel 3 GPU devices Vector engine logic Intel 3’s XVE logic uses two-fin PMOS and NMOS devices with power rails in M0. Its cell height and M0 pitch give a seven-track geometry, two tracks more than the 18A logic. One-fin groups also appear among the two-fin devices. Intel 3 L2 SRAM The Intel 3 L2 SRAM uses the familiar HCC sizing pattern: one PU fin, two PG fins, and two PD fins. N3E GPU devices Vector engine logic The N3E XVE field contains repeated two-fin devices with seven-track cell geometry. N3E remains a FinFET process, giving Panther Lake a direct FinFET-to-RibbonFET comparison. N3E L2 SRAM The N3E L2 SRAM uses the same PU:PG:PD fin-count pattern of 1:2:2. Panther Lake-U follows Lunar Lake’s floorplan quite closely. Both pair 4 P-cores with 4 LP E-cores and NPU, media and display engines in similar locations. Lunar Lake also uses Xe2, the direct predecessor to Panther Lake’s Xe3 GPU. This makes Lunar Lake the most direct basis for our comparisons. Arrow Lake differs in core count and uses the older Xe-LPG GPU architecture, so we only use it where it offers a more direct component-level comparison. Compute tile Panther Lake compute-tile floorplans remain sparse even months after launch. Intel 18A’s backside metal and dielectric stack must be removed without damaging the underlying structures before a clean transistor-level floorplan can be imaged. Most published die shots hide or heavily process the background, but we are quite proud of the die shot we achieved and are excited to show the work we have done. We measured the areas of the key components on the compute tile and compared them with their Lunar Lake predecessors on TSMC N3B. These help us to capture changes in block area and compare the two chips across process nodes and designs. Our total tile areas exclude the scribe-line area. The compute-plus-GPU subtotal below uses the PTL-U compute tile and GT1 GPU; it excludes the I/O tile and passive base. Individual block areas use the boundaries marked on the floorplans The compute-plus-GPU row is recomputed from the displayed PTL-U and GT1 areas. Component rows use their stated per-region counts and are not an additive partition of the whole tile. The P-core area remains almost unchanged between Lunar Lake and Panther Lake, despite L2 capacity increasing from 2.5 MiB to 3 MiB. Arrow Lake uses the same Lion Cove core as Lunar Lake but also has a 3 MiB L2. Cougar Cove fits 20% more L2 into the same P-core area. The larger private cache keeps more of each core’s working set close to its execution units, reducing access to shared L3 and DRAM. Extra capacity adds storage leakage and lookup energy, so designers balance it against avoided lower-level accesses. The shared P-core L3 cache also shrank by 14.8%. [2] Cougar Cove combines a similar footprint with Intel’s reported power-efficiency improvements. RibbonFET’s tighter channel control reduces leakage, while PowerVia reduces supply droop and allows tighter voltage guardbands. [1] Darkmont’s four-core LP E-core cluster is 5.0% smaller than Skymont’s on Lunar Lake, with most of the reduction in its L2 regions. The 1 MiB region shrank by 8.4% and the 1.5 MiB region by 14.9%. The tag arrays also use one fewer visible row. Tags identify which memory addresses the data array holds, so rearranging them changes the cache’s layout and wiring without requiring less data capacity. [2] The LP E-cores share one L2. This pools capacity and avoids duplicating all the cache machinery, but the four cores contend for its banks and bandwidth. Their separate cluster also keeps light work away from the performance cluster and its L3, allowing that larger domain to sleep. [1], [2] Cache area includes more than the storage cells. Tags identify each line, decoders select rows, sense amplifiers read the small bitline signal, and wires connect to the banks. Splitting an array into smaller sections shortens wordlines and bitlines, improving access speed, but duplicates peripheral circuits. Panther Lake’s smaller cache regions therefore reflect the complete memory implementation, including how much of each region is devoted to storage. [34] Unlike Meteor Lake and Arrow Lake, Panther Lake has no separate SoC tile. The NPU, LP E-cores, memory controllers, PHYs, media and display engines now share the compute tile. This removes an active die and keeps CPU memory traffic on one die. The cost is moving PHY and I/O-related circuitry onto 18A: drivers, receivers and analog circuits must still meet external voltage, loading and signal-integrity requirements, so their area does not shrink like dense digital logic. [1], [2] The biggest shrink comes from the NPU, which occupies 36.9% less area. NPU 5 consolidates the same total INT8 MAC count into half as many neural compute engines. Each of the three NCEs has a larger MAC array to make the complete NCE envelope 22.6% larger than an NPU 4 engine. Consolidation also halves the number of scratchpads and SHAVE DSPs, from 12 to 6. The MAC array handles matrix multiplication and convolution, while SHAVE executes vector and custom operations that fit the array poorly. [1], [2], [35] The paired floorplans identify each NCE envelope and its scratchpad, MAC, and SHAVE regions. Each measured MAC polygon is counted once per NCE in the area accounting below. The scratchpads store weights, activations, and intermediate results near the MAC arrays, allowing repeated use without fetching them again from DRAM. Halving their number delivers the largest measured area saving but leaves less local storage for the same total MAC count. Layers that no longer fit locally require smaller working tiles or more transfers of intermediate data. The benefit depends on keeping the enlarged arrays busy while managing that tighter storage budget. [36] NPU 5 also adds native FP8. Using half the operand width of FP16 reduces storage and transfer demand, helping workloads fit the smaller local memory budget. Lower precision and format-dependent range make scaling and model validation part of deployment. Hardware activation functions further reduce work that would otherwise occupy the programmable DSPs. [1], [2] Microsoft requires an NPU to deliver at least 40 TOPS for Copilot+ PCs. Both Lunar Lake and Panther Lake meet this threshold, but Panther Lake uses significantly less silicon. GPU tiles Panther Lake is Intel’s first product with Xe3, its latest GPU architecture. It offers two different GPU tiles: a smaller GT1 tile with 4 Xe3 cores on Intel 3 and a larger GT2 tile with 12 Xe3 cores on TSMC N3E. Panther Lake allows us to compare the same GPU architecture across both Intel 3 and TSMC N3E. Wildcat Lake adds a third Xe3 implementation on Intel 18A. A future newsletter will detail Xe3 and its implementation differences across all three process nodes. GT2 scales Xe3 to a different physical layout, with render slices arranged vertically instead of GT1’s horizontal arrangement. Slice placement sets the distances to shared cache banks and the D2D interface. Those wires consume area and add delay, so scaling the number of Xe cores also requires a new balance of cache placement, routing and timing. [1] What’s immediately obvious is that the GT2 tile on TSMC N3E has much smaller Xe cores than GT1. These block areas include logic, caches, and routing. An Xe core on the GT1 tile is ~69% larger than one on Lunar Lake, and ~55% larger than one on GT2. Intel 3 therefore uses substantially more area per Xe core. The block-area gap exceeds the measured logic and SRAM density gaps, bringing routing, timing targets, cell mix, and floorplan allocation into the comparison. The measured vector/matrix engine region is almost unchanged between Lunar Lake and Panther Lake’s GT2 tile. Xe3 retains eight 512-bit vector engines and eight 2048-bit XMX engines per core. Its gains also come from feeding those engines more effectively: more resident threads hide stalls, and variable register allocation lets shaders trade registers per thread against the number of threads kept active. [1] The shared L1/SLM capacity increased by 33% from 192 KiB to 256 KiB, while its area increased only 5%, raising effective density by 27%. L1 retains reused cache lines, while software-managed SLM lets a thread group share data locally. Both reduce traffic to more distant memory. Allocating more SLM per group can also limit how many groups reside on a core at once. [1], [37] The GT1 tile carries 4 MiB of L2 against 16 MiB on the GT2 tile. GT1 divides its L2 cache into four 1 MiB banks, while GT2 uses eight 2 MiB banks. Each bank contains 128 macros, but each N3E macro stores 16 KiB, twice the Intel 3 macro’s 8 KiB capacity. The N3E macro is only 54% larger while holding twice as many bits, giving it 30% higher density: ~23.7 Mbit/mm² versus 18.3 Mbit/mm². Including bank-level circuitry, the gap widens to ~16.9 Mbit/mm² on GT2 versus ~10.4 Mbit/mm² on GT1. GT2 gains density with its macros storing more bits per unit area, and those macros occupy more of each cache bank. Larger macros spread decoder and sense-amplifier overhead across more storage, while a more compact bank layout reduces the share spent on control and routing. The compromise is longer wordlines and bitlines that carry more capacitance. [34] I/O tile Panther Lake uses two I/O tile variants, both fabricated on TSMC N6. The smaller one provides 4 PCIe 5.0 and 8 PCIe 4.0 lanes and serves lower-tier systems as well as those without a discrete GPU, while the larger one adds 8 PCIe 5.0 lanes, bringing the total to 20 lanes, for discrete-GPU connectivity. Panther Lake SKUs with the larger 10- or 12-Xe GPUs use the smaller I/O tile. [38] The smaller I/O tile adds a PCIe 4.0 block and a Thunderbolt block to Lunar Lake’s I/O layout, providing four additional PCIe 4.0 lanes and another Thunderbolt 4 port. Its repeated N6 blocks retain nearly identical areas and layouts. Reusing these proven PHYs and controllers avoids porting and requalifying external interfaces on 18A, where faster digital logic offers less benefit to circuits constrained by the off-chip link. [38] SemiAnalysis’s teardown lab (STEEL) dives deep into the world’s advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. We’re hiring technical experts from system to transistor and everywhere in between. Check out our Careers page. Panther Lake offers scalability and modularity through its disaggregated packaging that partition compute, GPU, and I/O silicon into separate tiles allowing for a suite of tile configurations. This partitioning makes the package part of Intel’s node economics as it determines how much leading-edge wafer area each product consumes, which functions can remain on other processes, and how much configuration freedom Intel can offer from a shared set of tiles. Furthermore, fabricating the compute and GPU tiles separately confines the new 18A process to the compute tile and allows graphics and I/O to use other, more established, and more cost-effective processes. For Panther Lake, the GPU and I/O tiles are assembled alongside the compute tile on a passive silicon base using Foveros-S. Intel’s current technology brief lists a nominal 36 µm pitch for Foveros-S. Through-silicon vias (TSVs) in the base connect the fine wiring above to the larger package connections below. The functional tiles sit side by side on that passive base in a 2.5D configuration. [39] Our cross-section through the compute and GPU tiles shows the package’s wiring hierarchy. Microbumps connect each active tile to the passive silicon base; its fine redistribution layer (RDL) carries the short, dense tile-to-tile links. TSVs carry connections through the base to the package substrate, which fans them out to the much coarser motherboard solder joints. The base supplies interconnect, while computation remains in the active tiles above it. [39] At the compute-tile edge, the higher-magnification inset shows a local microbump spacing of approximately 25.24 µm and a feature width of 12.33 µm. These local spacings are finer than Intel’s nominal Foveros-S value. The X-ray fields further confirm tighter neighboring bumps, consistent across every die-to-die area found on each tile. Additional X-ray analysis is offered after the paywall. Putting the memory controller beside the CPU removes the D2D transfer that CPU memory requests required in Meteor Lake and Arrow Lake. This avoids the extra transmitter, receiver, and link traversal, saving interface energy and latency. Panther Lake’s separate GPU still crosses a D2D link to reach DRAM, so its larger local caches also help contain package traffic. [1], [40] Smaller dies are less likely to contain a random fatal defect, and screening them before assembly prevents one bad tile from consuming a complete package of good silicon. Reuse also spreads design and qualification work across more products. Against those gains, Intel pays for the passive base, D2D circuits, extra bonding and test steps, and losses during assembly. Cost per working product across the portfolio captures the combined effect of wafer yield, reuse, test, and assembly. [29] Wildcat Lake packaging Intel launched Core Series 3, formerly Wildcat Lake, on 16 April 2026 for value mobile and edge systems. Wildcat Lake keeps 18A but removes the passive base and combines more functions on one die to simplify the package. The two products therefore reveal two distinct ways to commercialize the same leading-edge process. [41] Wildcat Lake’s 18A die combines up to two Cougar Cove P-cores, four Darkmont LP E-cores, two Xe3 cores and a smaller NPU. A separate platform-controller die supplies I/O, connected through UCIe, Intel’s first processor implementation of the standard. Consolidating graphics remove a tile boundary and the passive base, reducing assembly complexity for a modest-bandwidth value product. It also ties CPU and graphics scaling to the same die, giving up Panther Lake’s ability to swap in a much larger GPU. [42], [43] In July 2021, Intel CEO Pat Gelsinger set out an ambitious process roadmap aimed at regaining performance leadership by 2025, later described as five nodes in four years. Five years and one CEO later, Intel’s comeback story is not as unambiguously positive as Pat may have hoped. [44], [45] Intel once set the pace for process technology, bringing high-k metal gate technology and FinFETs into volume production years ahead of the rest of the industry. Its 22 nm FinFET process reached consumers with Ivy Bridge in 2012. [46] Intel’s integrated device manufacturing (IDM) model allowed its architects and process engineers to co-optimize products and processes. Starting with Sandy Bridge, Intel dominated x86, while AMD struggled with Bulldozer. That lead faltered at 14 nm and broke at 10 nm. Intel targeted a massive 2.7× density increase, but the node arrived years late and required several revisions before it could support Intel’s full lineup. This delay forced Intel to stretch 14 nm across six generations, while TSMC moved ahead in process technology and AMD recovered in x86. By 2019, Intel was still shipping 14 nm across most of its product stack, with its 10 nm client ramp focused on Ice Lake mobile processors. Meanwhile, TSMC was shipping N7 and N7+, and AMD’s Zen 2 compute chiplets used N7 to raise core counts and improve efficiency. Intel’s process failures were central to its decline, but unsound business decisions furthered their downward slide. Product delays compounded product mistakes, pushing client, server, and FPGA roadmaps off schedule. Several attempts to enter AI (Nervana and Gaudi) and networking (Tofino) also failed to establish lasting businesses. Intel’s recovery has focused on consumer CPUs and advanced packaging. Tiger Lake, Alder Lake, Lunar Lake and now Panther Lake have restored Intel’s consumer roadmap. On the process side, Intel 4 shipped with Meteor Lake, Intel 3 with Granite Rapids and Sierra Forest, and Intel 18A with Panther Lake. Intel has also made advanced packaging part of its foundry offering. However, Intel is still playing catch-up in servers. Several Xeon generations arrived years late and trailed contemporary AMD and Arm server CPUs in performance, efficiency, and core count. The process roadmap is back, but Intel does not hold the same process-technology leadership position it held prior to 10 nm. The introduction of gate-all-around nanosheets and backside power delivery are two of the biggest changes to transistor integration in a decade. Intel took on both changes at once: 18A paired its first RibbonFET with PowerVia in Panther Lake. Panther Lake is a substantial manufacturing milestone. Our cross-sections show how RibbonFET and PowerVia reshape local contacts and wiring, while the floorplans show where architectural consolidation and process choices save area. A sustained competitive lead depends on product performance, cost, yield, and the next implementation. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page.. 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Hawaiʻi Department of Health deposit beverage container program to update rates
Rates are periodically updated because beverage container sizes and weights change with time; all certified redemption centers are required to use the revised rates beginning Oct. 1.