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Your age may not tell the whole story about how healthy you are
Researchers developed a five-factor Lifestyle Index assessing physical activity, BMI, smoking, sleep quality, and sexual satisfaction in 312 Swiss adults aged 35 to 65 years. Higher scores were modestly associated with younger bio-functional age, suggesting a relationship between combined lifestyle patterns and functional health, although the findings cannot establish causation.
From Nanochemistry to Smart Roads: The Multi-Scale Science Transforming Sustainable Pavements
A new Frontiers in Materials editorial maps how functional additives, multi-scale analysis, and machine learning are turning road construction into a quantifiably sustainable, data-driven discipline.
Brain cells meant to protect us may be fueling cognitive decline
Scientists have uncovered a surprising cause of age-related cognitive decline involving brain cells previously thought to be entirely beneficial. As these cells become dysfunctional, they can produce abnormal amounts of myelin, disrupting nerve fibers and potentially contributing to worsening memory and thinking skills.
Virginia Dare expands sensory and health & wellness teams
The US flavour specialist will showcase functional food, beverage and supplement concepts at SupplySide Global, highlighting its expanded capabilities in sensory testing, formulation and wellness-focused product development
A photoinduced, FeX3-catalyzed, stereo- and regio-selective halofunctionalization of olefins with MXn via a radical-polar crossover reaction
Communications Chemistry - The classical reaction for the halofunctionalization of olefins involves hazardous and highly toxic molecular halogens. Here, the authors report the FeX3-catalyzed...
Gears of War: E-Day sells 230K copies
Gears of War: E-Day has sold 230K copies since its advance-access launch on October 1 and full release on October 6. Steam accounts for 168K of those, with Xbox (console and PC) selling 62K. But there’s more to this story, as Xbox makes up the bulk of revenue. E-Day is the best-reviewed Gears game in nearly two decades (and the best one ever made, in my opinion). The Coalition has made a banger here (it’s currently in my top 10 of the year). Despite E-Day’s undeniable quality, this is a soft result. And it’s down to the business model, really. E-Day has made $37M so far, thanks to the Premium upgrade On Xbox, Game Pass is cannibalising much of the premium revenue. Our estimates show that 1.7M folks accessed E-Day via their subscription rather than a copy. But Xbox is having it both ways – or having it halfway, at least – via its Premium Edition Game Pass upgrade. Game Pass subscribers could pay $30 (or their local equivalent) for up to five days of early access starting October 1. Our estimates show that of the 1.7M who accessed E-Day through Game Pass, 722K paid for the upgrade. Between the review embargo lifting on October 1 and the full release, E-Day managed to shift another 250K early-access upgrades – no doubt helped by the campaign’s rave reviews. So despite selling far fewer copies on Steam, Xbox accounts for almost three-quarters of the revenue (roughly $26M of the $37M, versus about $11M on Steam). So “230K copies” undersells the paying audience. Including the 722K upgrades, nearly 950K people actually paid something for E-Day. The $30 upgrade is a halfstep from cannibalisation, but will Xbox go all the way? While E-Day is a sublime game, these are soft numbers for a flagship when Xbox badly needs revenue wins. E-Day sold 62K copies on Xbox against 722K Premium upgrades, so for every one copy sold on Xbox, nearly 12 Game Pass upgrades were sold. The $70 premium SKU is – functionally – dead on Xbox. Normally you can’t see what a Game Pass player would have paid, because the game’s just there in the subscription. But the $30 early-access upgrade estimate shows that 722K people demonstrated they’ll spend real money on this game. In a world without day-one Game Pass, many of these folks would have bought E-Day at $70. They paid $30 for five days early access to something they don’t own. Xbox is, in effect, charging its most valuable customers the least, based on a hangover from a tried-and-exhausted strategy from a previous administration. Those 722K willing-to-pay players generated about $21.7M via the upgrade. If three quarters of this group – mostly US and European audiences – bought E-Day outright, that’s nearly $40M. Of course, Game Pass does bring in meaningful recurring revenue, and E-Day is adding value for hundreds of thousands of subscribers. However, Game Pass is no longer growing, so Xbox is at a crossroads. Xbox is reportedly looking to do a Netflix and bolt on an ad-supported tier to pad it further. But that will just set a new floor, and leadership keeps telling us the priority now is revenue growth, which is subscriber-speak for ARPU. Xbox has already pulled Call of Duty from day-one Game Pass after day-one inclusion hammered its sales, with new CoD titles now arriving on the service around a year late. We know that some Microsoft executives believe the service devalues games outright, and rumours (which Microsoft has dismissed so far, to be fair) suggest that day-one releases could be taken off Game Pass. Want more free estimates and insights in your inbox twice a week? Subscribe below! Subscribe When a game this well-reviewed does this softly on its home platform, the model – not the game – gets brought into question. What else E-Day’s early adopters have played (including this month so far) Looking at E-Day‘s players on Xbox, most have played the franchise before (86% have played Gears 5, 76% Gears 4), and every game on the crossover list is either a shooter or a title from an Xbox-owned studio (though Game Pass is inflating those numbers, of course, more on that later): As for what else Xbox’s E-Day players have played this month, the top three are Fortnite (16%), Roblox (7%), and Call of Duty (6%). Another 5% played Minecraft Dungeons II, which is also on Game Pass and launched a couple of days before Gears‘ advance-access date. Many Game Pass players are happy to check out most big new additions. Want more free estimates and insights in your inbox twice a week? Subscribe below! Subscribe Over on Steam, the top crossover games are also mostly shooters (slightly more PC-coded ones), including Space Marine 2, which was itself heavily inspired by Gears: Looking at what E-Day‘s Steam players are into this month shows who they are – as subscriptions don’t skew the data. The top three are Wardogs (13%), Deadlock (12%), and CS2 (10%), so you’ve got the restless shooter crowd checking out the new hotness. A little further down are Helldivers 2 and Space Marine 2, your co-op PVE shooter players who’ll feel right at home in Horde mode. Game Pass is skewing the playtime distribution on Xbox Looking at the playtime distribution in our platform, E-Day players on Steam are – relatively speaking – playing for longer: 54% of E-Day players on Xbox have played for five hours or less (versus 32% on Steam) 19% of Xbox players played for over 15 hours (versus 33% on Steam) 14% of Xbox players played for over 20 hours (22% on Steam) The absolute number of people playing for over 15, 20, and 50 hours is, of course, bigger on Xbox, thanks to the sheer volume of folks who came in through Game Pass (upgraders included). None of that is cause for alarm. Game Pass is the reason Xbox playtime skews lower, as when a game is free to try, people try it and bounce without putting in even an hour (17% under an hour on Xbox versus 6% on Steam). Want more free estimates and insights in your inbox twice a week? Subscribe below! Subscribe The subscription brings in tourists alongside the committed, dragging down the average even when the game is excellent (but also perhaps winning over the uninitiated). It’s standard across every subscription-included title, on PS Plus too. Forza Horizon 6, for instance, had 11% of its Xbox players bounce under an hour, versus just 2% on Steam. So, Xbox’s crossroads So there we have it. Gears of War: E-Day is an incredible game whose revenues have been stifled by subscription inclusion and exclusivity. It’s the best-reviewed entry in the series in fifteen-odd years, but it still turned into one of the year’s softer flagship launches, not because players didn’t want it, but because Xbox’s own storefront gave its most willing buyers a reason not to pay. Which leaves Xbox at a crossroads. Will it keep making Gears games when the financial returns are this thin and the margins this low? And if it does, does the next one arrive off Game Pass at day one – the way CoD now does, or even on PlayStation? I think it should. Alright, back to E-Day for me! The last word Reply to this email – or reach out here – if you have any feedback for the newsletter – or want to request a game for us to cover. [Alinea Analytics boasts the most accurate PC and console estimates in the business. Game makers use our platform to understand their audience, keep an eye on the competition, monitor sales trends, and spot new opportunities. We equip game studios and financial institutions with accurate data and the confidence to make smarter, data-driven decisions. Want to talk about all things games market data? We’d love to chat!]
AirPods 5 vs. AirPods Pro 3: I’ve Listened to Both Earbuds, and This Pair Wins
The latest AirPods 5 have enhanced active noise canceling and a more functional design, but how do they stack up to Apple’s flagship pair? Here are the key differences.
naoo Expands Social Media Platform With Professional Entertainment
Eight Microdramas and Short Series Mark the Start – New Streaming Functionality Already Integrated and Currently Being Tested ZUG and ZURICH, SWITZERLAND - October 6, 2026 (NEWMEDIAWIRE) - naoo AG (Dusseldorf: Ticker: NAO; ISIN: CH1323306329), ...
Apple TV 4K Rumored to Support Four HomePods for Surround Sound
Last month, a proven leaker revealed that Apple has tested the ability to connect four HomePods to an Apple TV 4K for surround sound, with the HomePods intended to be arranged in front-left, front-right, rear-left, and rear-right positions. Now further evidence of this functionality has surfaced ahead of an announcement from Apple.
Goodbye joint replacements? Stanford scientists found a way to regrow cartilage and stop arthritis
Scientists have found a surprising way to regrow damaged knee cartilage by blocking a protein that becomes more abundant with age. In old mice, the treatment restored naturally lost cartilage and also helped prevent osteoarthritis after ACL-like knee injuries, while human cartilage taken from knee replacement patients began producing new, functional joint cartilage after exposure to the same inhibitor.
Oral health status and functional outcomes in Japanese adults with hemophilia: an exploratory cross-sectional study stratified by HIV status
Scientific Reports - Oral health status and functional outcomes in Japanese adults with hemophilia: an exploratory cross-sectional study stratified by HIV status
PHD leader outlines vision for health
The interim director of Panhandle Health District told community members this week that he wants to conduct a five-year study on the quality and cost of "functional medicine" compared to "conventional medicine."
Lee Health Foundation Welcomes Kim Snarr as Director of Grants
Lee Health Foundation has welcomed Kim Snarr as director of grants, bringing nearly a decade of experience in grant strategy, revenue growth, compliance management, and cross-functional leadership within the nonprofit sector. Snarr joins Lee Health Foundation from the Center for Prevention of Abuse where she served as director of grants administration. Prior to her leadership […]
Optimum Nutrition unveils multi-functional shakes
The protein shake features 30 grams of protein, 8 grams of fiber.
Rumor: Nintendo Switch Online app datamine points to potential event gifts system for Switch 2 and Switch
Fans are discussing the possibility of a new event gifts feature for Nintendo Switch 2 and Switch following the latest datamine. X user @idocode01 shared the latest findings from a Nintendo Switch Online app update, pointing to the functionality. What we know so far is that there can be multiple gift events on at the same time. Additionally, each event...
Are your muscles thanks to a 47,000-year-old gene? Scientists stunned by discovery - Futura-Sciences
A genetic handshake across millennia The interbreeding between Neanderthals and modern humans didn’t just give anthropologists lots to write about—it left functional traces in our very DNA. An August 5th study published in the journal Current Biology shines a spotlight on one especially eye-catching legacy: a variant of the gene...
Information in Biology: A Mystery for Naturalism
Biology was giving us computer programming and symbolic codes which, by mapping functional structures to functional structures, exhibited a tacit semantics.
Intel Panther Lake Teardown, 18A, BSPD, GAAFET, SemiAnalysis STEEL
Panther Lake debuts the first commercial implementation of backside power delivery (BSPDN), introduces Intel’s first iteration of gate-all-around (GAA) transistors, and showcases their advanced packaging capabilities with its Foveros-S assembly. With Panther Lake, Intel’s manufacturing arc has shifted from nebulous roadmaps to shipped silicon, a significant milestone on their long road back to competitive semiconductor manufacturing. To evaluate the extent of Intel’s comeback, we tore down Panther Lake. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Our teardown traces 18A from its four-sheet RibbonFETs (Intel’s marketing name for GAAFETs) and gate stacks through contacts, frontside and backside wiring, and the bonded carrier. We explain how these material and integration choices improve gate control and reduce resistance, while adding capacitance, thermal resistance, and process complexity. Our measurements put Panther Lake’s 18A compute logic and TSMC N3E GPU logic at similar logic density. However, 18A does not lead TSMC N3P, N2 or Samsung SF2 in peak density. Panther Lake’s CPU cores are incremental updates, and the high-end GPU still uses TSMC N3E. Panther Lake assembles one compute tile, one GPU tile, and one I/O tile atop a passive base tile using Intel’s Foveros-S advanced packaging. Both compute tile variants use Intel 18A. The Xe3 GPU options are a 4-core GT1 tile on Intel 3 and a larger 12-core GT2 tile on TSMC N3E. Both I/O tile variants use TSMC N6. [1], [2] Our analysis centers on the PTL-U compute tile, both the 4-core and 12-core GPU tiles, as well as the 12-lane I/O tile. In conventional chips, power and signal are routed through the same frontside metal stack towards the device frontend. Power rails consume scarce routing resources near the transistors, while tall via stacks carry VDD and VSS from the coarse upper wires to local rails. Backside power delivery (BSPD) moves the main power network behind the transistor layer, to the backside, separating it from frontside signal routing. We covered BSPD and its impacts in 2024. [3], [4], [5] Intel’s BSPD implementation, branded as “PowerVia”, routes power through dedicated backside metals to nano-TSVs, which connect those rails to local source/drain (S/D) contacts. Implementing that separation requires Intel to build the interconnect stacks from both sides of the wafer. The frontside comprises the M0-M14 signal stack, while the backside comprises the BM0-BM5 power stack. M0 and BM0 are closest to the transistors. The nano-TSVs connect the two sides, but Intel patterns and etches each via from the front after forming the contacts. A narrow via runs from the side of the contact deep into the silicon substrate. Intel then completes the frontside signal metal stack, bonds the wafer to a carrier, flips it and removes the original substrate until the buried via tips are exposed. The backside metal stack is then deposited directly on the revealed vias. The nano-TSV and backside-via profiles taper in opposite directions because Intel forms them from opposite sides of the wafer. The transistor structures form the FEOL. Local contacts and nano-TSVs connect them to the wiring. M0 begins the frontside interconnect stack. The silicon carrier remains attached above the frontside interconnects. It supports the device wafer during substrate removal and backside processing and remains part of the finished chip’s thermal path. PowerVia removes the main power distribution from the congested frontside metals, routing supply through shorter and wider backside wires. Its lateral landing still occupies area in the standard cell, so it recovers less cell area than a direct backside contact. [3] Nano-TSVs beside the logic devices carry VDD or VSS from the backside power network, while signal connections continue upward through the frontside metals. Backside Interconnects Samsung SF2 data is included for comparison to Panther Lake’s within this article. SF2 is the incumbent GAA foundry node but lacks BSPD, serving as a useful reference to evaluate 18A. A full teardown of Samsung’s S26 products, processed on SF2, will be shared soon.Nanosheet-cut EDS comparison. The PowerVia supply path runs from the backside Cu rails through Mo-lined W nano-TSVs to the local transistor contacts. In this cross section, the tapered connection spans roughly 150 nm from the contact level to BM0. The Ta liner confines Cu and promotes adhesion to the surrounding stack; the AlOₓ etch stop controls the next dielectric etch above the rail. Dielectric beneath the ribbons electrically separates the devices from the backside wiring and removes the conducting silicon body below the channel. [6] AlOₓ serves as an etchstop (ES), enabling endpointing and protecting the underlying layers. Low-volatility aluminum fluoride reaction products resist the fluorinated plasma, allowing a thin AlOₓ film to protect the metal while the surrounding low-k dielectric is removed. [6], [7]. While the BM0 and layers above the M1 lines show double AlOx layers, Our SMIC N+3 teardown showed single AlOₓ layers. SMIC uses a simpler local AlOₓ substack, while the remaining cap and etch sequence provide the required landing protection. So why double layers? The closely spaced AlOₓ doublets provide two protected endpoints in the etch sequence. Intel documents an AlOₓ/SiN/AlOₓ stack that explains the benefit. The main dielectric plasma etch stops on the first AlOₓ film; a selective wet clear opens that film; a second plasma etch removes the intermediate SiN and stops on the second AlOₓ film. The final wet clear exposes the metal landing surface. SiN is the intermediate dielectric in Intel’s published example. [8] The second stop protects the metal through a cap breakthrough. Wide openings can etch faster than narrow ones, and etch depth varies across the wafer. Metal under an early-clearing opening would otherwise be exposed while other openings still need more etching. Staged protection widens the process window and reduces metal erosion, corrosion and void formation. [8] TSMC documents AlN/AlOₓ/SiOC/AlOₓ above Cu, with AlN blocking Cu diffusion, and a simpler AlN/SiOC/AlOₓ variant that omits one AlOx film. [9] Levels with different opening sizes, aspect ratios, pattern densities and cap materials need different etch margins. A double AlOx stop is useful where another protected endpoint justifies the added processing. The extra film adds formation, selective opening and cleaning steps, plus another set of interfaces to control adhesion, moisture, and stress. These blanket films are opened through the existing via pattern, so each film does not require another lithography mask. AlOₓ adds parasitic capacitance when it replaces lower-k dielectric; two thin AlOₓ films can nevertheless contain less AlOₓ than one thick film. Total thickness, placement, and theintermediate dielectric determine the electrical cost. Deposition chemistry also changes AlOx permittivity and residual hydroxyl content, which can oxidize the underlying metal. [7], [8], [10], [11] The backside stack separates into relatively fine BM0-BM2 wiring near the devices and coarser BM3-BM5 power distribution. The largest pitch increase occurs between BM2 and BM3. BM0’s pitch closely matches the logic-row height, fitting local power delivery to the cell rows. Higher levels aggregate current through larger conductors: routing density becomes less important than low resistance and current capacity as the network approaches the package. This hierarchy provides wide power wiring for the power delivery network without consuming scarce frontside signal-routing resources. [3] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Frontside Interconnects Intel 18A combines Mo-lined W contacts and nano-TSVs with a separate backside Cu power network. Samsung SF2 keeps power on the frontside, using Ti-based contact interfaces and Ta-based barriers and Co liners around Cu wiring. In 18A standard-cell rows, backside power rails supply the devices through nano-TSVs within the cells, freeing frontside routing resources. Samsung’s M0 accommodates both power and signal connections. From the device toward M0, the connection runs through a Ti-based S/D interface, W contact fill, a Mo-lined W via, and the Cu M0 wire. Mo supplies a conductive nucleation and adhesion layer for W, replacing the resistive TiN liner used in conventional W integration. This increases the effective conduction volume within the feature while retaining W fill and its established polishing, cleaning and etching processes. Intel’s Mo/W patent describes this integration tradeoff. The nano-TSV uses the same Mo-lined W construction in the backside supply path. [12] The move from TiN to Mo is an incremental change. While a full Co or Mo fill can also reduce the volume lost to liners in very small features, it requires new integration schemes that increase complexity and risk. Cu remains attractive for wider wires due to its low resistance. As wires and vias shrink, the diffusion barrier consumes an increasing fraction of their cross-section. [12], [12], [14] Intel uses Co/Ru liners at M0-M1, Co at M2-M4, and Nb at M5-M9. The lower-level liners help Cu adhere and reduce void formation during trench fills. Applied Materials’ Endura has new thermal control that facilitate wetting process, so the thin film continuity is good enough that good capillary pressure will drive Cu atoms to the via bottom without voiding. Intel’s choice to use Nb is particularly interesting. Intel’s Nb patent describes a conductive diffusion barrier intended to reduce the barrier’s contribution to resistance relative to conventional Ta-based barriers, particularly at via bottoms where all current crosses the barrier. The patent pairs Nb in coarser levels with the option of lower-cost PVD processing. [15], [16] The upper metal layers support thicker barriers formed through physical vapor deposition (PVD) despite its worse coverage and uniformity. Meanwhile, the lower metal layers require thinner barriers deposited through conformal atomic layer deposition (ALD). Co/Ru adds another material interface and requires controlled deposition and Cu fill. Changing liners and barriers by metal layer allows Intel to optimize interconnect resistance, process complexity, and reliability. [15, 16] RibbonFET, Intel’s name for its gate-all-around FETs (GAAFETs), replaces the FinFET’s vertical fins with four stacked horizontal silicon nanosheets, allowing the gate to surround the channel on every side. The path to GAAFET begins with the planar transistor. A planar MOSFET places the gate above the channel between its source and drain. Pairing an NMOS with a PMOS transistor creates a CMOS inverter, in which the NMOS pulls the output low for a high input, and the PMOS pulls it high for a low input. The gate must retain electrostatic control of the channel to ensure clean switching. As gate lengths shrank, the drain began to compete with the gate for that control, increasing off-state leakage. Electrostatic control was restored through an architectural evolution that raised the channel into a vertical fin and wrapping the gate around three sides. Called “FinFET”, this new architecture packed more effective channel width into a smaller footprint. Further scaling made it harder to maintain both drive current and leakage within smaller cells, and reintroduced the same problems planar MOSFETs faced. Nanosheet GAAFETs close the fourth side by replacing the vertical fin with a stack of horizontal nanosheets, each surrounded by the gate. The tighter electrostatic control suppresses leakage at shorter gate lengths while stacking adds effective channel width within the cell footprint. In a FinFET process, channel width changes in discrete steps as designers must add or remove whole fins. Nanosheet width can instead be adjusted continuously within the process’s design rules. Wider sheets increase drive current, while narrower sheets reduce capacitance at the cost of drive current. Intel 18A uses stacks of four nanosheets each and varies their widths across logic and SRAM. At the process level, adding more sheets to each stack increases effective channel width and drive current, but complicates fabrication. RibbonFET vs MBCFET Samsung began GAAFET production in 2022 with SF3E, following with SF3 and now SF2. Its ‘MBCFET’ provides a useful structural comparison with Intel’s first RibbonFET implementation. [17] STEEL is digging deeper into SF2, used in the Exynos 2600, and TSMC’s GAAFET N2, used in Apple’s A20 Pro, in upcoming newsletter articles. We’re throwing some teasers on X. Let’s compare Samsung SF2’s MBCFET with Intel 18A’s RibbonFET. Subscribe Even to the untrained eye, Intel’s extra nanosheet is obvious. Intel stacks four ribbons to Samsung’s three. Samsung’s sheets are much wider in these fields, so both sheet count and width matter to the available channel perimeter. Sheet width also changes which silicon surfaces carry current. On conventional (001) silicon, wide nanosheets emphasize the broad top and bottom surfaces, favoring electron transport; the larger sidewall contribution in a narrow sheet favors hole transport. Thinner sheets improve gate control but increase confinement and scattering. This makes width and thickness part of the NMOS/PMOS balance, alongside strain and threshold voltage. [18], [19] GAAFET designs like 18A use different work-function-metal (WFM) stacks for NMOS and PMOS. Around each ribbon, a thin SiOx interfacial layer separates the silicon channel from the HfOx high-k dielectric, with La providing dipole tuning and the WFM wrapping the dielectric. NMOS uses a TiAl-based stack, while PMOS uses TiN WFM. W fills the remaining gate trench, providing a lower-resistivity path where the work-function layers are no longer needed. In this field, the PMOS stacks leave room for W between ribbons, while the NMOS stacks occupy more of those gaps. A silicon-based dielectric marks the P/N boundary, allowing the PMOS and NMOS gates, sharing the same gate trench, to be processed sequentially. Fast logic paths, retention circuits, and SRAM need a family of threshold options. Changing threshold without substantially changing device dimensions, capacitance or fabrication complexity is valuable. FinFET processes typically use different work-function-metal stacks. In a four-ribbon GAA stack, the narrow sheet-to-sheet gap limits how much WFM can fit around each channel. La in the gate dielectric creates interfacial dipoles at the SiOx/HfOx boundary, shifting effective work function and tuning threshold voltage. This gives Intel another control alongside its NMOS and PMOS WFM stacks. Low-threshold devices improve critical-path drive; higher thresholds reduce leakage elsewhere. Dipole tuning is especially useful in GAA because it changes threshold without consuming the narrow intersheet gap with thicker WFM. Precise control of La incorporation, diffusion and interface quality has long been a challenge, limiting viability in high volume production but is now seen from every leading-edge foundry. Intel’s patent describes depositing a dipole-forming oxide above HfOx and annealing it toward the interfacial oxide before completing the work-function and fill metals. This separates threshold tuning from the space available for metal. Newer research addresses the thermal cost: imec’s 2026 dipole-middle research inserts the shifter between two HfOx depositions, shortening the diffusion path while protecting SiOx during patterning. [20], [21]Matched-cut EDS, Intel 18A (left) vs. Samsung SF2 (right). Intel retains raised source/drain epi beneath its contacts, while Samsung recesses W deep into the epi to form a V-shaped Ti-lined interface. The deeper contact increases metal-to-semiconductor area and shortens the current path from the lower sheets, reducing contact and spreading resistance. It also removes epi volume and brings the contact etch closer to the channel ends. Retaining more epi preserves the material available for strain transfer, especially from SiGe into PMOS. These geometries balance contact access against stress engineering and etch margin. [22], [23] Samsung stacks three sheets to Intel’s four ribbons, and both processes use sheet width to tune drive strength. In our Samsung cross-sections, widths range roughly from 19 to 30 nm in the NPU rows and 37 to 50 nm in the CU cell. The Samsung nanosheets taper, with the widest sheet at the bottom and the narrowest at the top. Both processes use HfOx gate dielectric and Ti-based work-function stacks, with Al in the NMOS stack. In the Samsung devices shown here, the dielectric and WFM occupy the intersheet gaps, leaving W above the top sheet. Intel’s PMOS stack leaves more room between ribbons, and W fills those gaps while the thicker NMOS stack leaves W mainly in the upper trench. Gate-stack EDS maps. The W between Intel’s PMOS ribbons provides a conductive path close to the lower gates. Where WFM fills the entire gap, the gate still surrounds the channel, but voltage reaches it through the more resistive work-function films. Thinner WFM and dipole tuning preserve room for low-resistivity fill; Mo and Ru are alternative fill metals being developed for further scaling. [24] A masked, sequential WFM flow explains the different gate heights and inter-nanosheet fill. The proposed sequence below shows how separate NMOS and PMOS work-function steps produce that geometry. Enabled by the BSPDN process, Intel replaces the dense-logic silicon subfin with dielectric, removing the parasitic conduction path below the ribbons and reducing substrate-related capacitance. A retained silicon body as in classical, non-SOI, planar and FinFET designs needs junction and punchthrough-stop engineering to suppress leakage. Dielectric isolation makes that leakage less sensitive to the subfin doping profile but adds removal and fill steps. It also weakens the direct thermal path through silicon, making the contacts, metal stacks and package more important for heat extraction. [24], [26] Fluorine is concentrated around selected Intel device structures in the maps. WF6 is a standard precursor for W nucleation and fill, while barrier films protect adjacent dielectrics from fluorine attack. Low-fluorine W processes reduce the residual-F burden. Chloride-based precursors avoid introducing F during W deposition, but require control of chlorine attack, nucleation and fill quality. The integration target is a continuous, low-resistance W path with a thin protective liner and minimal chemical damage to the surrounding stack. [20], [27], [28] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. We measured cell height, gate pitch, metal geometry, and ribbon dimensions at the XTEM sites shown below. The tables group these dimensions by site and device polarity. Our “sheet cuts” cross the silicon channel and show the ribbons end-on. “gate cuts” run along the channel through successive gates. The 18A logic cell dimensions point to a five-track logic library while the N3E and Intel 3 cell dimensions evidence a seven-track logic library. The DDR-PHY uses wider M0 wires and much larger spacing than core logic. That trades routing density for lower wire resistance and weaker coupling between neighboring nets. The geometry suits the current delivery and coupling requirements of analog, clock, and I/O circuitry. PowerVia lets 18A combine a compact cell height with wider M0 geometry by moving the main power rails off the signal-routing tracks. That relaxes local wire scaling while preserving a small cell footprint. Cell height and gate pitch set the geometric density; pin access and routability determine how much of it a real block can use. [29] The biggest takeaway from our gate-pitch measurements is that Intel 18A compute logic and TSMC N3E GPU logic have similar density in the Bohr representative-cell model. The 18A example is 18.6% denser than the Intel 3 GPU example. Gate pitches are nearly identical across the three sites, so cell height drives most of the difference. The Bohr model combines a four-transistor NAND2 spanning three gate pitches and a 32-transistor scan flip-flop (SFF) spanning nineteen pitches, weighting their densities 60:40. The sensitivity column shows how independently changing cell height and gate pitch by ±1 nm changes the result. This compares representative cell geometries; whole-die density also depends on cell mix and placement. The 18A P-core gives M0 substantially more metal cross section than the N3E vector engine. Treating each profile as a trapezoid gives 2.63 times the area per line and 1.84 times the area after normalization by routing pitch. The larger section reduces the geometric contribution to line resistance and lowers current density for a given current. Taller and wider wires also add capacitance, so circuit delay depends on the balance of resistance and capacitance. The DDR-PHY has less metal area per routing width than the 18A core fields, while remaining above N3E. [30] Area = height × (top CD + bottom CD) / 2, including liners. Area/pitch normalizes by routing width. Taper is the symmetric sidewall angle from vertical, with the largest angle belonging to the DDR-PHY. Compute tile The measurements show how ribbon dimensions and gate-stack geometry vary across the compute tile and between NMOS and PMOS to balance channel drive, gate load and the space needed for the dielectric/WFM stack across logic, SRAM and the DDR-PHY. Width mainly changes available channel perimeter; thickness also changes electrostatic control and carrier confinement. Gate-stack thickness then determines the space left for low-resistivity fill P-core and LP E-core logic Both the P-core and LP E-core use multiple nanosheet widths. Widths are measured on high-magnification XTEMs while wider-field images demonstrate additional width choices within the LP E-core. Multiple widths are expected even within an LP E-core. Timing-critical paths, buffers and cells with different fanout need different drive strengths. The lower-magnification fields show this width diversity beyond the sites quantified in the table. L2 and L3 SRAM GAA gives SRAM designers another way to balance the pull-up (PU), pass-gate (PG), and pull-down (PD) transistors. FinFET bitcells set device strength through fin count while GAA adds nanosheet width as a sizing knob. In a 6T SRAM cell, a strong pull-down relative to the pass-gate limits read disturbance, while a strong pass-gate relative to the pull-up improves writability. During a write, the pass-gate and write driver pull the node storing “1” below the inverter trip point. During a read, the pull-down holds the node storing “0” low. Bias, threshold voltage, mismatch and assist circuitry set the remaining margin. FinFET high-current cells commonly use a PU:PG:PD fin-count pattern of 1:2:2, a device-sizing ratio rather than a current ratio. Ribbon width lets Intel balance SRAM strengths without adding whole fins. The L2 cell uses its narrowest ribbons for PU and widest for PD, improving writability and read stability respectively. Intel’s disclosed HCC operates without assist; its denser HDC uses negative-bitline write assist. Pulling the selected bitline briefly below ground increases pass-gate overdrive so it can overpower the pull-up at lower supply voltage. That buys density and low voltage writability at the cost of boosting circuitry, switching energy, and additional voltage stress that must be controlled. [31], [32] Four rectangular ribbons give the perimeter = 8 × (width + thickness), before corner rounding. PG/PU is 1.49 and PD/PG is 1.16. The L3 structures closely resemble L2 in layout and cell height. Fewer L3 nanosheet widths are tabulated because fewer high-magnification images were available. DDR PHY The DDR-PHY trades density for controlled analog behavior and reliable off-chip signaling. It contains drivers, receivers, delay circuits, and calibration logic that set drive strength, sampling time, and voltage margin. Repeated four-sheet devices with similar widths fit the use of regular transistor units for matching and programmable drive. Its wider local wiring provides room for current delivery and separation of sensitive signals, while consuming more area than a dense core-logic grid. The layout serves the memory channel’s electrical requirements as well as digital logic density. [33] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Intel 3 GPU devices Vector engine logic Intel 3’s XVE logic uses two-fin PMOS and NMOS devices with power rails in M0. Its cell height and M0 pitch give a seven-track geometry, two tracks more than the 18A logic. One-fin groups also appear among the two-fin devices. Intel 3 L2 SRAM The Intel 3 L2 SRAM uses the familiar HCC sizing pattern: one PU fin, two PG fins, and two PD fins. N3E GPU devices Vector engine logic The N3E XVE field contains repeated two-fin devices with seven-track cell geometry. N3E remains a FinFET process, giving Panther Lake a direct FinFET-to-RibbonFET comparison. N3E L2 SRAM The N3E L2 SRAM uses the same PU:PG:PD fin-count pattern of 1:2:2. Panther Lake-U follows Lunar Lake’s floorplan quite closely. Both pair 4 P-cores with 4 LP E-cores and NPU, media and display engines in similar locations. Lunar Lake also uses Xe2, the direct predecessor to Panther Lake’s Xe3 GPU. This makes Lunar Lake the most direct basis for our comparisons. Arrow Lake differs in core count and uses the older Xe-LPG GPU architecture, so we only use it where it offers a more direct component-level comparison. Compute tile Panther Lake compute-tile floorplans remain sparse even months after launch. Intel 18A’s backside metal and dielectric stack must be removed without damaging the underlying structures before a clean transistor-level floorplan can be imaged. Most published die shots hide or heavily process the background, but we are quite proud of the die shot we achieved and are excited to show the work we have done. We measured the areas of the key components on the compute tile and compared them with their Lunar Lake predecessors on TSMC N3B. These help us to capture changes in block area and compare the two chips across process nodes and designs. Our total tile areas exclude the scribe-line area. The compute-plus-GPU subtotal below uses the PTL-U compute tile and GT1 GPU; it excludes the I/O tile and passive base. Individual block areas use the boundaries marked on the floorplans The compute-plus-GPU row is recomputed from the displayed PTL-U and GT1 areas. Component rows use their stated per-region counts and are not an additive partition of the whole tile. The P-core area remains almost unchanged between Lunar Lake and Panther Lake, despite L2 capacity increasing from 2.5 MiB to 3 MiB. Arrow Lake uses the same Lion Cove core as Lunar Lake but also has a 3 MiB L2. Cougar Cove fits 20% more L2 into the same P-core area. The larger private cache keeps more of each core’s working set close to its execution units, reducing access to shared L3 and DRAM. Extra capacity adds storage leakage and lookup energy, so designers balance it against avoided lower-level accesses. The shared P-core L3 cache also shrank by 14.8%. [2] Cougar Cove combines a similar footprint with Intel’s reported power-efficiency improvements. RibbonFET’s tighter channel control reduces leakage, while PowerVia reduces supply droop and allows tighter voltage guardbands. [1] Darkmont’s four-core LP E-core cluster is 5.0% smaller than Skymont’s on Lunar Lake, with most of the reduction in its L2 regions. The 1 MiB region shrank by 8.4% and the 1.5 MiB region by 14.9%. The tag arrays also use one fewer visible row. Tags identify which memory addresses the data array holds, so rearranging them changes the cache’s layout and wiring without requiring less data capacity. [2] The LP E-cores share one L2. This pools capacity and avoids duplicating all the cache machinery, but the four cores contend for its banks and bandwidth. Their separate cluster also keeps light work away from the performance cluster and its L3, allowing that larger domain to sleep. [1], [2] Cache area includes more than the storage cells. Tags identify each line, decoders select rows, sense amplifiers read the small bitline signal, and wires connect to the banks. Splitting an array into smaller sections shortens wordlines and bitlines, improving access speed, but duplicates peripheral circuits. Panther Lake’s smaller cache regions therefore reflect the complete memory implementation, including how much of each region is devoted to storage. [34] Unlike Meteor Lake and Arrow Lake, Panther Lake has no separate SoC tile. The NPU, LP E-cores, memory controllers, PHYs, media and display engines now share the compute tile. This removes an active die and keeps CPU memory traffic on one die. The cost is moving PHY and I/O-related circuitry onto 18A: drivers, receivers and analog circuits must still meet external voltage, loading and signal-integrity requirements, so their area does not shrink like dense digital logic. [1], [2] The biggest shrink comes from the NPU, which occupies 36.9% less area. NPU 5 consolidates the same total INT8 MAC count into half as many neural compute engines. Each of the three NCEs has a larger MAC array to make the complete NCE envelope 22.6% larger than an NPU 4 engine. Consolidation also halves the number of scratchpads and SHAVE DSPs, from 12 to 6. The MAC array handles matrix multiplication and convolution, while SHAVE executes vector and custom operations that fit the array poorly. [1], [2], [35] The paired floorplans identify each NCE envelope and its scratchpad, MAC, and SHAVE regions. Each measured MAC polygon is counted once per NCE in the area accounting below. The scratchpads store weights, activations, and intermediate results near the MAC arrays, allowing repeated use without fetching them again from DRAM. Halving their number delivers the largest measured area saving but leaves less local storage for the same total MAC count. Layers that no longer fit locally require smaller working tiles or more transfers of intermediate data. The benefit depends on keeping the enlarged arrays busy while managing that tighter storage budget. [36] NPU 5 also adds native FP8. Using half the operand width of FP16 reduces storage and transfer demand, helping workloads fit the smaller local memory budget. Lower precision and format-dependent range make scaling and model validation part of deployment. Hardware activation functions further reduce work that would otherwise occupy the programmable DSPs. [1], [2] Microsoft requires an NPU to deliver at least 40 TOPS for Copilot+ PCs. Both Lunar Lake and Panther Lake meet this threshold, but Panther Lake uses significantly less silicon. GPU tiles Panther Lake is Intel’s first product with Xe3, its latest GPU architecture. It offers two different GPU tiles: a smaller GT1 tile with 4 Xe3 cores on Intel 3 and a larger GT2 tile with 12 Xe3 cores on TSMC N3E. Panther Lake allows us to compare the same GPU architecture across both Intel 3 and TSMC N3E. Wildcat Lake adds a third Xe3 implementation on Intel 18A. A future newsletter will detail Xe3 and its implementation differences across all three process nodes. GT2 scales Xe3 to a different physical layout, with render slices arranged vertically instead of GT1’s horizontal arrangement. Slice placement sets the distances to shared cache banks and the D2D interface. Those wires consume area and add delay, so scaling the number of Xe cores also requires a new balance of cache placement, routing and timing. [1] What’s immediately obvious is that the GT2 tile on TSMC N3E has much smaller Xe cores than GT1. These block areas include logic, caches, and routing. An Xe core on the GT1 tile is ~69% larger than one on Lunar Lake, and ~55% larger than one on GT2. Intel 3 therefore uses substantially more area per Xe core. The block-area gap exceeds the measured logic and SRAM density gaps, bringing routing, timing targets, cell mix, and floorplan allocation into the comparison. The measured vector/matrix engine region is almost unchanged between Lunar Lake and Panther Lake’s GT2 tile. Xe3 retains eight 512-bit vector engines and eight 2048-bit XMX engines per core. Its gains also come from feeding those engines more effectively: more resident threads hide stalls, and variable register allocation lets shaders trade registers per thread against the number of threads kept active. [1] The shared L1/SLM capacity increased by 33% from 192 KiB to 256 KiB, while its area increased only 5%, raising effective density by 27%. L1 retains reused cache lines, while software-managed SLM lets a thread group share data locally. Both reduce traffic to more distant memory. Allocating more SLM per group can also limit how many groups reside on a core at once. [1], [37] The GT1 tile carries 4 MiB of L2 against 16 MiB on the GT2 tile. GT1 divides its L2 cache into four 1 MiB banks, while GT2 uses eight 2 MiB banks. Each bank contains 128 macros, but each N3E macro stores 16 KiB, twice the Intel 3 macro’s 8 KiB capacity. The N3E macro is only 54% larger while holding twice as many bits, giving it 30% higher density: ~23.7 Mbit/mm² versus 18.3 Mbit/mm². Including bank-level circuitry, the gap widens to ~16.9 Mbit/mm² on GT2 versus ~10.4 Mbit/mm² on GT1. GT2 gains density with its macros storing more bits per unit area, and those macros occupy more of each cache bank. Larger macros spread decoder and sense-amplifier overhead across more storage, while a more compact bank layout reduces the share spent on control and routing. The compromise is longer wordlines and bitlines that carry more capacitance. [34] I/O tile Panther Lake uses two I/O tile variants, both fabricated on TSMC N6. The smaller one provides 4 PCIe 5.0 and 8 PCIe 4.0 lanes and serves lower-tier systems as well as those without a discrete GPU, while the larger one adds 8 PCIe 5.0 lanes, bringing the total to 20 lanes, for discrete-GPU connectivity. Panther Lake SKUs with the larger 10- or 12-Xe GPUs use the smaller I/O tile. [38] The smaller I/O tile adds a PCIe 4.0 block and a Thunderbolt block to Lunar Lake’s I/O layout, providing four additional PCIe 4.0 lanes and another Thunderbolt 4 port. Its repeated N6 blocks retain nearly identical areas and layouts. Reusing these proven PHYs and controllers avoids porting and requalifying external interfaces on 18A, where faster digital logic offers less benefit to circuits constrained by the off-chip link. [38] SemiAnalysis’s teardown lab (STEEL) dives deep into the world’s advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. We’re hiring technical experts from system to transistor and everywhere in between. Check out our Careers page. Panther Lake offers scalability and modularity through its disaggregated packaging that partition compute, GPU, and I/O silicon into separate tiles allowing for a suite of tile configurations. This partitioning makes the package part of Intel’s node economics as it determines how much leading-edge wafer area each product consumes, which functions can remain on other processes, and how much configuration freedom Intel can offer from a shared set of tiles. Furthermore, fabricating the compute and GPU tiles separately confines the new 18A process to the compute tile and allows graphics and I/O to use other, more established, and more cost-effective processes. For Panther Lake, the GPU and I/O tiles are assembled alongside the compute tile on a passive silicon base using Foveros-S. Intel’s current technology brief lists a nominal 36 µm pitch for Foveros-S. Through-silicon vias (TSVs) in the base connect the fine wiring above to the larger package connections below. The functional tiles sit side by side on that passive base in a 2.5D configuration. [39] Our cross-section through the compute and GPU tiles shows the package’s wiring hierarchy. Microbumps connect each active tile to the passive silicon base; its fine redistribution layer (RDL) carries the short, dense tile-to-tile links. TSVs carry connections through the base to the package substrate, which fans them out to the much coarser motherboard solder joints. The base supplies interconnect, while computation remains in the active tiles above it. [39] At the compute-tile edge, the higher-magnification inset shows a local microbump spacing of approximately 25.24 µm and a feature width of 12.33 µm. These local spacings are finer than Intel’s nominal Foveros-S value. The X-ray fields further confirm tighter neighboring bumps, consistent across every die-to-die area found on each tile. Additional X-ray analysis is offered after the paywall. Putting the memory controller beside the CPU removes the D2D transfer that CPU memory requests required in Meteor Lake and Arrow Lake. This avoids the extra transmitter, receiver, and link traversal, saving interface energy and latency. Panther Lake’s separate GPU still crosses a D2D link to reach DRAM, so its larger local caches also help contain package traffic. [1], [40] Smaller dies are less likely to contain a random fatal defect, and screening them before assembly prevents one bad tile from consuming a complete package of good silicon. Reuse also spreads design and qualification work across more products. Against those gains, Intel pays for the passive base, D2D circuits, extra bonding and test steps, and losses during assembly. Cost per working product across the portfolio captures the combined effect of wafer yield, reuse, test, and assembly. [29] Wildcat Lake packaging Intel launched Core Series 3, formerly Wildcat Lake, on 16 April 2026 for value mobile and edge systems. Wildcat Lake keeps 18A but removes the passive base and combines more functions on one die to simplify the package. The two products therefore reveal two distinct ways to commercialize the same leading-edge process. [41] Wildcat Lake’s 18A die combines up to two Cougar Cove P-cores, four Darkmont LP E-cores, two Xe3 cores and a smaller NPU. A separate platform-controller die supplies I/O, connected through UCIe, Intel’s first processor implementation of the standard. Consolidating graphics remove a tile boundary and the passive base, reducing assembly complexity for a modest-bandwidth value product. It also ties CPU and graphics scaling to the same die, giving up Panther Lake’s ability to swap in a much larger GPU. [42], [43] In July 2021, Intel CEO Pat Gelsinger set out an ambitious process roadmap aimed at regaining performance leadership by 2025, later described as five nodes in four years. Five years and one CEO later, Intel’s comeback story is not as unambiguously positive as Pat may have hoped. [44], [45] Intel once set the pace for process technology, bringing high-k metal gate technology and FinFETs into volume production years ahead of the rest of the industry. Its 22 nm FinFET process reached consumers with Ivy Bridge in 2012. [46] Intel’s integrated device manufacturing (IDM) model allowed its architects and process engineers to co-optimize products and processes. Starting with Sandy Bridge, Intel dominated x86, while AMD struggled with Bulldozer. That lead faltered at 14 nm and broke at 10 nm. Intel targeted a massive 2.7× density increase, but the node arrived years late and required several revisions before it could support Intel’s full lineup. This delay forced Intel to stretch 14 nm across six generations, while TSMC moved ahead in process technology and AMD recovered in x86. By 2019, Intel was still shipping 14 nm across most of its product stack, with its 10 nm client ramp focused on Ice Lake mobile processors. Meanwhile, TSMC was shipping N7 and N7+, and AMD’s Zen 2 compute chiplets used N7 to raise core counts and improve efficiency. Intel’s process failures were central to its decline, but unsound business decisions furthered their downward slide. Product delays compounded product mistakes, pushing client, server, and FPGA roadmaps off schedule. Several attempts to enter AI (Nervana and Gaudi) and networking (Tofino) also failed to establish lasting businesses. Intel’s recovery has focused on consumer CPUs and advanced packaging. Tiger Lake, Alder Lake, Lunar Lake and now Panther Lake have restored Intel’s consumer roadmap. On the process side, Intel 4 shipped with Meteor Lake, Intel 3 with Granite Rapids and Sierra Forest, and Intel 18A with Panther Lake. Intel has also made advanced packaging part of its foundry offering. However, Intel is still playing catch-up in servers. Several Xeon generations arrived years late and trailed contemporary AMD and Arm server CPUs in performance, efficiency, and core count. The process roadmap is back, but Intel does not hold the same process-technology leadership position it held prior to 10 nm. The introduction of gate-all-around nanosheets and backside power delivery are two of the biggest changes to transistor integration in a decade. Intel took on both changes at once: 18A paired its first RibbonFET with PowerVia in Panther Lake. Panther Lake is a substantial manufacturing milestone. Our cross-sections show how RibbonFET and PowerVia reshape local contacts and wiring, while the floorplans show where architectural consolidation and process choices save area. A sustained competitive lead depends on product performance, cost, yield, and the next implementation. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page.. 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Is metascience being co-opted?
In July, the White House released a report that argued academia is deeply dysfunctional and in need of radical reform.Science: A New Golden Age sets out a litany of problems many academics will recognise: interminable waits for grants; short-term funding rather than support for longer, more ambitious projects; ballooning administrative requirements; pressure to publish, and many more. “The scientific machine is getting bogged down,” it says. At least on the face of it, Science: A New Golden Age is a triumph for the metascience movement, a loose-knit, global group of academics, philanthropists and think tankers that want far more testing and experimentation in how we fund public research and innovation. The report tells US research funders to set up internal metascience units to do just this. But it has also set alarm bells ringing that metascience is being conveniently deployed to help justify the defunding of US universities, which US vice president JD Vance has openly labelled “the enemy.” “Just because you have an issue with your plumbing in your house doesn't mean you light the entire house on fire and burn it to the ground,” said Colette Delawalla, chief executive of Stand Up for Science, a group campaigning against what it says are attacks on scientists by the Trump administration. No one is arguing that academia doesn’t need reform, but there’s debate over how far and how fast the system should be shaken up. Does public R&D need slow and steady evidence-based adjustment, or radical new experiments?One of the key arguments in Science: A New Golden Age is that there’s not enough funding for what it calls “mid-level” science: engineering-heavy projects that require tens of millions of dollars, involve ten to a hundred people, and last around five years. Such a project might develop a brain-computer interface for people with Alzheimer's disease, for example. As such, the US National Science Foundation (NSF) has already announced $1.5 billion to set up so-called X-Labs, effectively new research organisations to pursue breakthroughs in areas such as quantum sensing and new scientific instruments. Funding divertedBut there’s a catch: this money has squeezed NSF budgets for more traditional, fundamental research grants, Science reported in June, likely meaning less cash for university-based scientists. Science: A New Golden Age also makes various swipes at universities, accusing them of extracting overheads from scientists to fund administrative bloat. “We have become dependent on a narrow set of legacy institutions,” it says. The report doesn’t mention it, but the US government is simultaneously seeking greater powers over federal funding, which would allow political appointees at funding agencies to screen or cancel research grants mid-project. The White House is also seeking to slash the NSF’s budget by more than half in 2027, although similar cuts proposed for 2026 were blocked by Congress. Convenient hookThis has worried some that the metascience agenda could be misused as a kind of smokescreen to further weaken universities. James Wilsdon, executive director of the Research on Research Institute at University College London, said that the report contains lots of “interesting ideas” and agrees that in places, academia is a “pretty broken system.” But the risk is that metascience is being deployed as a “convenient hook” to support cuts and a “political land grab” to transfer grant power from scientists to political appointees in US funding agencies.So far, the metascience agenda hasn’t been seized on by radical right parties in Europe. But Wilsdon worries it will cross the Atlantic, politicising research reform efforts and making them more difficult to carry out. The report is already making some in Europe sceptical of the entire idea. “The system is not without flaws, but the metascience discussion is not likely to improve the system but rather to generate munition to undermine it,” said Claes de Vreese, a professor of AI and society at the University of Amsterdam. Peter Thiel protégéOfficially, Science: A New Golden Age has just one named author: Michael Kratsios, the director of the Office of Science and Technology Policy and a former chief of staff to Silicon Valley mogul Peter Thiel. He also served as chief financial officer of Thiel’s Clarium Capital Management. Since the 1990s, Thiel has criticised US universities for moving away from teaching what he views as the classic works of western civilisation, and drifting towards “anti-Western zealotry.” And since 2011, he has offered two-year fellowships of $250,000 to young people to skip or drop out of university, and instead start companies or pursue scientific research. “College can be good for learning about what’s been done before, but it can also discourage you from doing something new,” according to the Thiel Fellowships website. In other areas, the Trump administration has promoted academics with a longstanding interest in metascience. For example, the head of the National Institutes of Health, Jay Bhattacharya, in 2020 co-authored a study arguing the funder backs overly conservative proposals, although he achieved wider prominence as a critic of pandemic lockdowns. Careless talk costs fundingEven before the Trump administration embraced the metascience agenda, some metascientists privately wondered whether they should be careful not to overstate dysfunctions in academia, in case this gets used as ammunition against universities. But others think being cautious with criticism is pointless. After all, last year, the Trump administration sought to cut funding from US universities on an entirely different premise: supposed antisemitism on campus. “I don't think these governments need a technical metascientific excuse to attack the universities, they will want to do so anyway,” said Will Stone, a researcher at Science Works, a new think tank advocating for a “metascience revolution” in the UK. “I think researchers should report what they find, even when the findings may be used to advance policies they disagree with,” echoed Russell Funk, a researcher at the University of Minnesota, who in 2023 co-authored a highly influential paper that argued scientific papers were becoming less disruptive over time. No justificationThat said, Funk thinks that metascientific research certainly doesn’t justify a weakening of universities. Instead, scientists need “time, resources and stability to pursue unfamiliar ideas,” he said. “Taking away those conditions works against the very goal the reforms are supposed to achieve.”The Institute for Progress, a Washington DC-based innovation policy think tank that has championed X-Labs and metascience units, also says that reforms should complement, not supplant, universities. “Unpredictable, unreliable, and reduced federal funding to researchers is destabilising to the very foundations of research and development and is bad,” said Jenn Gustetic, the institute’s director of metascience and R&D policy.Evolution or revolution?This points to a much bigger divide in the metascience community: how far and how fast should public R&D be shaken up? Does it need evolution or revolution? For example, Science: A New Golden Age says the science system relies too heavily on traditional “workhorse” project grants, the type that pay out around $250,000 a year to fund “hypothesis-driven science by small teams on tractable questions.” However, in criticising project grants, the report “decisively picks one side of a debate that is far from settled,” David Hilmer Rex, a metascientist based in Denmark, has written. In June, Pierre Azoulay, a metascientist at the Massachusetts Institute of Technology, defended project grants, saying that the alternative of X-Labs “merits scepticism.”A-B testingOne challenge in metascience is that it’s easier to generate evidence for some types of change than others. Most straightforwardly, research funders can run A-B tests on different ways of awarding money. For example, Germany’s Volkswagen Foundation recently trialled distributed peer review, where applicants rate each other’s proposals, and measured its results against traditional review panels. Distributed peer review made quicker decisions, although awarded money to largely different ideas. However, much of the focus of the metascience movement has been on founding fast-moving and free-acting new research organisations and funders, in contrast to the alleged stodginess of mainstream academia or public innovation grants. A culture of speed and freedom are the animating principles behind Germany’s Sprind or the UK’s Advanced Research and Invention Agency (Aria).Related articlesViewpoint: it's time to experiment with how Europe funds science European researchers sound the alarm that Trump rule changes will hit cooperationHowever, while it’s possible to closely study previously successful bodies, such as the US Defense Advanced Research Projects Agency (Darpa), for historical clues to their secret sauce, it’s impossible to guarantee in advance that the likes of Sprind or Aria will actually work as hoped. But advocates of new organisations say this inherent uncertainly shouldn’t stop us trying. “If we wait for definitive proof that something will work before we try it, I don't know where your proof is coming from,” said Stone. Trade-offsUp until now, experiments in metascience haven’t generally come with hard trade-offs over money. In the US, new ideas such as focused research organisations have often been funded by billionaire philanthropists. In Europe, new innovation agencies such as Sprind and Aria, or the Netherland’s new National Agency for Disruptive Innovation, haven’t needed explicit cuts elsewhere in the research system. But with the $1.5 billion establishment of X-Labs by the NSF, the trade-offs are becoming clearer. Some metascientists privately wonder whether a smaller pilot would have been more appropriate, given that the idea is untested. The Institute for Progress counters that the $1.5 billion X-Labs budget is spread out over a decade, so will account for less than 2% of the NSF’s annual budget. “It’s important to remember that [Darpa] was once an institutional experiment as well. Now it’s one of the most cited innovative funding models in the world,” said Gustetic.As for Europe?The US isn’t the only country placing metascience at the heart of its research strategy. Science: A New Golden Age looks admiringly at the UK, which in 2024 set up a Metascience Unit to scrutinise how it funds research. In Brussels, it’s more of a mixed picture. In 2018, the EU set up the European Innovation Council to funnel grants and equity to start-ups, although it’s sometimes criticised for awarding money too slowly. Recently, the council has started experimenting with challenges, where teams of inventors compete to overcome a technological challenge. The European Commission also wants to experiment with partially randomising grant winners, to cut down on bureaucracy. However, the Commission’s own advisers have said the EU’s own research schemes are too conventional. They want the Commission to establish a new dedicated unit to scrutinise and experiment with funding. But there’s no sign of a such unit emerging in Brussels’ plans for the next Horizon Europe programme, which from 2028 is set to distribute more than €160 billion over seven years. Sam Bogerd, director of breakthrough innovation at the Brussels-based Arq Foundation, an AI-focused think tank that also looks at metascience, says that Europe might have the opposite problem to the US: universities and basic research funding are still reasonably well supported, but there’s not enough experimentation. “We're not taking a close enough look at where this money can achieve the most, and I am worried that the good ideas around metascience will be tainted politically by their association with the Trump administration,” he said. He’s still lobbying for the Commission to set up an experimental unit. But in the meantime, the Arq Foundation plans to do its own research, and is currently hiring two metascience researchers to run the rule over how Brussels spends research funding.
Stellar Blade will let players turn off frame generation on Nintendo Switch 2
According to Shift Up, when Stellar Blade launches on Nintendo Switch 2, the full game will include a toggle for frame generation, allowing players to turn it on and off at will. News about the planned functionality was shared on social media. A few days ago, the game received a demo on Nintendo Switch 2. Shift Up has been monitoring...
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A film thinner than a human hair blocks electromagnetic waves—and hides heat!
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Wilmington health tech founder launches new venture
Several years after launching his health tech startup Artemis Immersive, founder Adam Isley is setting his sights on new horizons. Co-founded in 2023 by husband-and-wife Adam Isley and Kaylan Barbrey, along with Matthew Raffa and Bill Blakesley, Artemis Immersive began as a spatial medtech company that created digital renderings of medical scans for viewing in augmented reality (AR). Isley said the firm, which won an NC Tech award in the Biotech + HealthTech Innovation category last year, has raised $1.2 million in total in seed funding since launching. Isley has since created a new venture, Research and Me, building on the Artemis platform. Like Artemis Immersive’s core software, VoxScan, Research and Me combines health data with artificial intelligence in a 3D interactive environment to help patients better understand health outcomes and provide integrative wellness support. While the Artemis product is no longer Isley’s primary focus, he said the company’s technology and ambitions have evolved into different ventures, like Research and Me. "It's a different venture building on the Artemis platform, and there'll probably be more,” Isley said. He added, "I was very disappointed in the quality of the information available to general patients about their healthcare... I wanted to give patients more and a better plate of choices." Research and Me is still in its beta phase, Isley said, with usability testing ongoing in partnership with the firm’s partner, Medicap Pharmacy and Wellness Center, owned by Barbrey. "As someone who's kind of dedicated their life to working in healthcare, I've tried to bring this spirit and passion to it,” he said, “and a lot of the resources that we'll be providing are free — like a base level of free care for any patients, or medical education if they've got specific conditions." Isley describes Research and Me as a “patient-first” platform designed to securely store and pseudonymize health data and use AI and medical literature to generate insights. The insights are presented in an interactive 3D environment for patients and providers to explore conditions, treatments and wellness plans together. "It's almost like a democratization of understanding medical information," Isley said. "We take a whole bunch of clinical data, we take a whole bunch of peer‑reviewed, published studies on PubMed, and we try to turn them into chunks of information that normal humans can understand." Like VoxScan, the Research and Me platform lets users interact with 3D anatomical models for visualization. The platform provides a space for tracking, notes and insights. The platform also supports video conferencing, Isley said, allowing providers or coaches to examine models and data together. "We wanted to create a safe environment where you can start to learn and experiment with new features about your health, using agents to do that,” Isley said. While Research and Me is in beta-phase testing with Medicap Pharmacy, Isley said he envisions the platform serving a wellness-oriented community, working with sports performance clinics and hormone optimization. Isley, who is working towards a wellness-coach board certification, also plans to offer functional wellness consults through the platform. Long‑term, Isley says he wants the platform to embody an “integrative health practitioner” approach, “connecting experts of different fields and specializations in a way that they can make a greater impact in people's lives.” “For people in the state of North Carolina, it's already a win,” Isley said of the Medicap rollout, noting that partner clinics get “immediate resources for learning about their health and wellness conditions… out of the box.” Isley plans to launch Research and Me’s provider portal in 2028 and begin pursuing integrations with larger systems, he said.
Science, Service and a Passion for Wheat: Simsek Helps Connect U.S. Wheat to the World
Understanding wheat, improving the foods made from it and sharing knowledge has defined Dr. Senay Simsek career as a cereal scientist and researcher. It has also made her a valued technical expert for U.S. Wheat Associates (USW), helping international customers better understand the quality, functionality and value of U.S. wheat. Today, Simsek serves as department […]
Five pillars of healthy aging
The five pillars of healthy aging are chronological, social, functional, physiological, and biological. Moving daily helps promote cognitive health.
Commission to present long-awaited Innovation Act proposal
The European Commission will present its proposal for an EU Innovation Act on September 9, with a focus on strengthening public procurement as a driver of innovation and facilitating the use of intellectual property (IP) to secure financing.The proposal was initially meant to be published in March. No explanation has been given for the delay, but it may be linked to issues with the associated impact assessment.The Commission’s Regulatory Scrutiny Board issued a negative opinion on the draft impact assessment following its meeting on January 28, and again on February 27, according to a draft of the Innovation Act published by Agence Europe.In it, the Commission lays out the steps it has taken to address the board’s concerns, including avoiding overlap with the upcoming revision of the EU Public Procurement Directives and removing a mandatory target for EU member states to increase overall innovation procurement spending.The Innovation Act, which was included in last year’s start-up and scale-up strategy, is meant to reduce barriers to bringing innovative solutions to the market and speed up the path from research to commercialisation.Central to the initiative, according to the draft proposal, is the introduction of a harmonised EU framework for the procurement of R&D services by public buyers, including pre-commercial procurement. The plans would also introduce an EU preference in public R&D procurement.“Other leading economies in the world are investing five to eight times more in public procurement of R&D than the EU,” it notes. In Europe, the lack of harmonised rules has led to divergent practices across the bloc, legal uncertainty and limited use of joint, cross-border R&D procurement, it says.Related articlesCommission postpones European Innovation ActParliament draft report adds EU Inc safeguards to prevent fraud and regime shoppingThe text highlights a lack of clarity around the valuation and monetisation of IP as another barrier to the commercialisation of research results. Currently in the EU, IP is rarely used as collateral in financing, which restricts the growth potential of innovative firms. A key reason for this, according to the Commission, is the absence of a harmonised methodology for valuing IP.To address this issue, it plans to introduce an EU-wide IP valuation framework, a digital marketplace for commercialising IP, and a competence centre to help innovators access IP-backed finance.The issue was highlighted by a recent report by the European Union Intellectual Property Office, which referred to developing a “functional market for IP-backed finance” as a “core competitiveness imperative for the next decade,” and key to ensuring capital unlocked by other EU initiatives reaches innovative firms.The Innovation Act is one of several ways the Commission hopes to reduce fragmentation in the single market and help innovative companies to scale in Europe, complementing other initiatives such as the EU-wide corporate regime, dubbed EU Inc.The leaked draft is not the final version that will be published on September 9, according to a Commission official.
Microsoft (MSFT)’s Outlook and OpenAI’s ChatGPT Work Both Broke the Same Day
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A NASA Spacecraft Is Nearing The Edge Of The Solar System. Its Instruments May Be Shut Off Due To Lack Of Funding
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iOS 27 Introduces New 'iPhone Handoff' Feature
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$21+ Billion Business Process Management Market Outlook 2026-2035 | AI and Automation Drive the Next Wave of BPM Growth
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August Monthly Review: ChatGPT In Epic
Death, taxes, another frontier lab healthcare launch inspiring truly insane LinkedIn takes. As much as I want to stay away, I repeatedly am the crewman unplugging his ears whenever we pass these sirens. So it’s not the first and probably not the last time we dial up the typewriter rather than tie ourselves to the mast. The full blow-by-blow timeline: Health API Guy is a reader-supported publication. To receive new posts and support my work, consider becoming a free or paid subscriber. Subscribe The End of the Standalone PHR (Jan 8): ChatGPT Health arrives for consumers, at the time powered by b.well. I was bullish on the approach in that the best way for the PHR to finally solve distribution was to meet consumers were they already are (i.e. When Horizontal Meets Healthcare (Jan 9): OpenAI for Healthcare puts out the shingle for enterprises, with SharePoint ingestion standing in for the EHR integration the product actually needed. Another One: Anthropic’s Healthcare Debut (Jan 16): Claude's version, on HealthEx rails instead of b.well, with Agent Skills for FHIR development as the one true vertical-specific investment. ChatGPT for Clinicians: The Trap Sprung (Apr 24): OpenAI filled in the missing GTM middle with a free product for verified clinicians, effectively peeling the enterprise wrapper off ChatGPT for Healthcare and taking the PLG fight directly to OpenEvidence. OpenAI’s Second Attempt at Health (Jul 31): a relaunch of their patient specific app, now branded Health in ChatGPT, where the privacy partition came out, the connectors thinned, and b.well disappeared in favor of first-party FHIR work against a smaller network Beyond a Shingle So what was announced now? Today, we’re introducing a new electronic health record integration that brings authorized patient context from Epic into ChatGPT for Healthcare, along with the Healthcare Public Data plugin for direct, structured access to official healthcare datasets like PubMed, DailyMed, and CMS Coverage. Together, these capabilities bring ChatGPT closer to the systems and sources healthcare teams trust, while supporting the controls and compliance healthcare work requires. The core portfolio is unchanged from prior announcements we delineated and discussed (aside from the relaunch of patient-facing). Since trade publications still seem to be confusing them by using the wrong names: Enterprise sales motion: ChatGPT for Healthcare Protecting their core product / PLG: ChatGPT for Clinicians Consumer/patient-facing product: Health in ChatGPT So really, this is a feature release (specifically for ChatGPT for Healthcare when it comes to EHR integration). What’s cool about it, though, is that we are moving beyond just putting out a shingle. Everything in the January enterprise launch was horizontalizable: Horizontal tech companies thus generally start verticalization with their “putting out a shingle phase”. Telling the world you’re open for business as a horizontal tech company reliably attracts early inbound interest from buyers who are already trying to force-fit horizontal tools into domain-specific workflows and are eager for any signal that the vendor intends to support their use case more directly. Nothing was really vertical specific, which is exactly what you'd expect from the ultimate hypergrowth horizontal company dipping their toes into specific industries. But eventually you have to stop changing the sign on the door and start changing the product. Can you guess where the horizontal product was going to run out of road? This is the core dilemma writ large: verticalization requires differentiation, while scale economics of consumer and horizontal push toward unification. I’ve buried the lede so deep here it will be painful to some readers, but what should be shocking to no one is that my perspective is that EHR integration is the only path that meaningfully resolves this tension for ChatGPT for Healthcare. Integration with Microsoft Sharepoint is fine, but it is categorically insufficient for any product that hopes to influence clinical decision-making. SMART Money Well here we are, eight months later! Real vertical investment has begun, which surprised a few people. One friend in the industry messaged me: “Absolutely no way Epic gave ChatGPT API access.” Looking forensically at the announcements, the integration is notably read-only across appointment notes, laboratory results, medications, and specialist documentation. So while I’m not a betting man, I'd wager the house this is a SMART on FHIR launch: That sounds a lot like USCDI! The recommended path for the workflow they outline would be SMART on FHIR Their Health AI lead’s post is evocative of both standalone and EHR launch SMART, which another termed “ChartGPT” and “EHR Plugin” The implementation burden for SMART on FHIR is the lowest of the available integrative paths This is the team who literally did patient-facing SMART on FHIR with Epic last month Most importantly, if you’re a horizontal company, you generally still haven’t taken the full plunge and thus (overly) value reusability. SMART on FHIR is the logical compromise: healthcare-specific enough to matter, but standardized enough to reuse. Nobody Asked Judy Another friend asked “I thought they had to go to each health system, or did they go direct to Epic and now health systems opt in?” Given the trust paradigms in healthcare, this functionally cannot be Epic hoovering up all the data for OpenAI and shoving ChatGPT in their customers’ faces (or they would revolt). However, I do believe the aforementioned terrible coverage by TechCrunch and other outlets is probably responsible for that question, given the 325 million reference. When using FHIR as a business associate to an Epic customer, there is no EHR gatekeeping to speak of, as that isn’t how fhir.epic.com works: You register an app You pick your APIs You test against the sandbox APIs You list as “Ready for Production” Hospitals pick your app You test and go live with them Bluntly, nobody had to say yes or no in Verona (nor were they given the chance). Vendor Services (their next developer tier up that I doubt OpenAI is using quite yet in this initial release) certainly has contractual paperwork that some resent, but even there, the twin pressures of mounting antitrust and information blocking make outright gatekeeping increasingly fraught. My friend’s sentiment is, to me, representative of a broader industry neurosis, perhaps a sort of scar tissue of prior eras: people assume the gate is still there and never actually try the door. There are certainly other ways Epic (and any EHR) can put its thumb on the scale, but they are not so dumb as to stand in front of a federally mandated API and play bouncer at this exact moment in time. So I think they can and probably should go deeper, as this release is at best parity and at worst behind vertical-specific competition. OpenEvidence did a basic SMART launch with Sutter Health in February, allowing for more convenient evidence search by providers. They then add patient-context (the equivalent SMART on FHIR flow to what we see here) when Cedars-Sinai went enterprise-wide in May. UpToDate has four distinct applications across deeper workflows like patient engagement listed in Epic Showroom and announced a partnership with Epic to power Art at UGM Abridge and other ambient scribes have invested deeply into the deepest bidirectional clinical copilot workflow with integrations well beyond SMART on FHIR. In that light, the “Who is OpenAI primarily targeting here?” is clear. This release brings them into striking distance of OpenEvidence, but not the others quite yet. They are the only one of the three you can reach without building something truly Epic-specific. When will they go further? Competition is a great motivator to overcome the horizontal demons and start building things that can’t be reused: not across industries, not across EHRs, maybe not past the customer you built them for. That’s the price of actually verticalizing. The question is if and when OpenAI will be willing to pay it. Month in Review Here is the monthly review. As a reminder, this is a regular round-up of the month’s posts and other content to surface things you may have missed across regulation, litigation, interoperability, and beyond. AI assistance is used in these bullet summaries so I can focus on articles. Articles Published: None this month Video Content: The Information Exchange: Standards-based Thruple Edition (Aug 14): Back to school for us too, with Brad reporting in from the CMS Health Tech Ecosystem’s one year anniversary in DC. We get into the January CMS-0057 deadline, the fall rulemaking reading list, and why enrollment still keeps most apps off FHIR. The Information Exchange: Epic Dúnadan Edition (Aug 25): A UGM roundup with Ryan Brickner joining for the first time to check our takes against what the building actually thinks. Rangers, Ergo sitting on top of EHI, and a down-market lineup that needs some cuts. Regulatory: Stacked Deck, Bad Hand (Aug 05): ONC’s website refresh took the entire HIT Policy Committee record with it, so I rebuilt the archive and went looking for the regulatory capture story everyone assumes is buried in there. Stacking the deck and winning the hand turn out to be very different things. The Sixth Generation of Patient Access (Aug 19): A quick catalog of the five generations of patient access we’ve layered on since HIPAA, and the two candidates now competing to be the sixth. One is planned. The other is the market routing around the plan entirely. Court cases: Three Cases Walk Into a Docket (Aug 06): Two surprise settlements cleared the board in a single week, and then Judge Maddox dropped ninety-four pages on Vyne v. Henry Schein. The sleeper is a DMCA holding that makes direct-to-database a considerably riskier business model. Epic v. Health Gorilla: Into the MDL (Aug 10): Nine class actions are headed to Miami, and the Panel signaled it wants to bring the case that spawned them along too. That would leave Epic arguing the requests were obviously fraudulent in one courtroom and unknowable in the other. Amazon v. Perplexity: Agents Are Legalized! (Aug 11): The Ninth Circuit vacated the injunction against Comet, holding that the user is the one accessing the servers rather than the company that built the agent. A real win for agentic access, and a much narrower one than the headline suggests. Veeva v. Epic: Come At Me, Bro (Aug 26): Epic’s response brief wants the dismissal affirmed and, unusually, wants the opinion published as precedent. Buried in it is Epic’s own description of what its non-competes actually prohibit, which current and former employees should read closely. EHRs: The Contract Epic Would Never Sign Today (Aug 04): A 1999 SEC exhibit catches Epic licensing nearly its entire product line, Tapestry included, to the company that became TriZetto. The marketing services menu attached to it is the part that will make you blink. Forecast from Verona (Aug 07): The Epic Almanac makes one argument six different ways: the AI is only as good as the networks behind it. Emmie headlines, Art’s context stack is the most ambitious part, and Penny finally gets an autonomous coding date on the calendar. Works With Epic MyChart (Aug 17): Epic’s first new Showroom category since the death of Workshop certifies hardware instead of software, badge on the box and all. Made for iPhone, but for blood pressure cuffs, and rough news for anyone selling the RPM stack sitting in between. UGM Hot Takes 2026 (Aug 20): Everyone else covered the AI announcements, so I went after Savvy deleting the payment gateway, Rangers as Boost with the timer removed, and a down-market lineup with too many entries. Plus the Health Grid tidbits I cannot help myself on. MyChart Central Grows Up (Aug 24): Device data and Emmie turn Epic’s identity hub into a full consumer platform, which is both a logical answer to ChatGPT and a bit of a mistake. It also happens to be the best scraping target Epic has ever shipped. Industry Analysis: The Wrong Yardstick (Aug 12): Vertical software keeps getting judged against Superhuman and Notion, which is the wrong bar entirely. Your user is comparing your product to a whiteboard and forty phone calls before lunch. Primitives vs. Abstractions (Aug 27): Developers want building blocks, systems of record prefer to hand out business logic, and both sides have a real case. There’s no test from the outside that separates the engineering reason from the competitive one, which is why this keeps ending up in court. Cross-industry Comparisons: The Two Kinds of Platform Power (Aug 18): Attention power and record power are different problems that keep getting handed the same regulatory toolkit. Congress’s latest swing at Big Tech shows both what’s possible and where it falls apart. The Dogs of (Platform) War (Aug 21): A CourtListener alert turned up a property management fight with healthcare’s exact shape and none of the Cures Act. Shell prospects, ghost accounts, a notetaker bot that came back to haunt someone, and a lawyer arguing both sides of the same theory in two states. Fractals All the Way Down (Aug 31): Yardi dominates property management right up until you zoom into one segment, where AppFolio owns it outright and Yardi doesn’t appear at all. Where you draw the line around a B2B software market is about to decide an awful lot of cases. Other News: If Judy Had the Courage (Aug 13): A short eulogy for the era when software was allowed to look insane: WinAMP, bold colors, and everything the grey chatbot era has taken from us. External Media: Portland Monthly Health Tech Meetup: Erin O’Brien channeled my own feelings - maybe it’s just because it’s August and beautiful, but the monthly edition of the PDX Health community meetup was a ripper. Make sure to reach out if interested to join for the next one. STAT’s Coverage of Epic This Month: Brittany Trang of STAT did a fantastic job of breaking the FTC investigation that’s been lurking, as well as UGM related coverage, so I had to give her her wish of a meme. Fall Conferences: I’m pumped to be kicking off my fall conference season in NYC at Nabla Accelerate next month, which Chrissy provided the link to apply for. Here’s the rest of my schedule in case you want to meet up: Commonwell (Redwood Shores, CA): Oct 13-14 Open@Epic (Madison, WI): Oct 21-22 eHealthExchange (Austin, TX): Oct 27 Sequoia Project (Austin, TX): Oct 28-29 HLTH (Vegas): Nov 15-18 RSNA (Chicago): Nov 29-Dec 3 Posts I Liked: HTI-6 Should Unbundle API Certification: Josh Mandel makes the case that HTI-6 should split (g)(10) into separate authorization and data certifications, so a PACS or a genomics platform can certify only the role it actually performs. Imaging is the urgent example, but the structure solves a much bigger problem. On implementing ePrior Auth with Epic: Scott Rossignol’s field notes from a live ePrior Auth build on Epic, including the two app registrations nobody warns you about and the CPT mapping problem waiting at the end. CMS-0057 implementations are going to be such a beast. Healthcare point solutions are starting to look a lot like streaming services: Spencer Dorn runs the cable-to-streaming arc against health IT and lands squarely on the bundling half of the cycle. Bundling can be good! It can also be bad! Life is nuanced. Health API Guy is a reader-supported publication. To receive new posts and support my work, consider becoming a free or paid subscriber. Subscribe
In 1990, the northern spotted owl became a symbol of America’s logging wars; 36 years later, scientists say it is already functionally extinct across large swaths of its range
In 1990, a small bird became an unlikely symbol of one of America’s fiercest environmental battles. The northern spotted owl was listed as threatened under the Endangered Species Act, putting the future of vast stretches of old-growth forest in the Pacific Northwest at the centre of a bitter fight between environmentalists and the logging industry.
“Zombie” Cells Reveal a Surprising New Driver of Chronic Inflammation
Dysfunctional mitochondria may drive age-related inflammation by helping switch on inflammatory genes, and blocking SLC25A1 reduced that activity. As people age, senescent cells accumulate in the body. These so-called “zombie” cells have stopped dividing but remain metabolically active, releasing inflammatory molecules that can contribute to persistent inflammation associated with frailty, cardiovascular disease, cancer, neurodegeneration, and
New TAVR risk score could help predict poor functional outcomes among older patients
Predicting complications is one thing—the team behind this study hoped to anticipate when patients are more likely to see a minimal benefit from TAVR.
Finns may live to 80 or 85, but productive healthy years average 43 to 46
For the first time in Finland, population-level norm values have been established for estimating life expectancy adjusted for health-related functional capacity and productivity. The new study provides ...
Microsoft’s Skala AI Model Joins CP2K to Improve Quantum Mechanical Simulations
The Skala model is now available, giving researchers an AI-based exchange-correlation functional for quantum mechanical simulations.
How to decipher smells like a fruit fly
In the animal kingdom, energy conservation is essential for survival. That’s why our brains have evolved to be extremely energy and resource efficient at storing and processing information. Since the 1980s, computational scientists have tried to mimic brain structure and function, but have not yet succeeded in creating functional, low-memory solutions that work in real-world scenarios. Published in Neuromorphic Computing & Engineering, a new fly brain-inspired algorithm developed by researchers at the Okinawa Institute of Science and Technology (OIST) demonstrates promise for achieving practical applications under realistic constraints.
This app does with Pixel 11 Pro's HiLight what Google should have done in the first place
Pixel 11 Pro's HiLight LED is heavily restricted in functionality, but the HiLight Studio app turns it into a proper notification system.
The Worldfolio: How Sun-Star Stationery Is Driving Global Growth Through Entertainment, Innovation and Japanese Design
Sun-Star Stationery is expanding globally by combining Japanese craftsmanship, functional innovation and entertainment. Through idea stationery, character collaborations and direct consumer engagement, the company creates products that solve everyday problems while delivering emotional value, with growing opportunities across Asia, North America and Europe.
Mt. Lebanon sees mixed-use future for business district parking garage
A multi-level parking garage next to Mt. Lebanon’s historical municipal building could have a new life as a mixed-use development, according to the community’s municipal planner. Mt. Lebanon is seeking proposals for a public-private partnership to redevelop the structure, which is nearing the end of its functional life, said Ian
Understanding Athlete Support Needs and Advancing Disability Health Equity
A new study from Special Olympics was published in the American Journal on Intellectual and Developmental Disabilities titled, Functional Limitations Reported Among U.S. Adults With Intellectual Disability Participating in Special Olympics: A Comparative Analysis to the General Population.
Google Messages is getting an iMessage-style makeover, and it looks fantastic
The chat pinning functionality could soon get an iMessage-inspired upgrade.
Wooree Green Science Introduces LipoPrime™ Liposomal Ingredients to the U.S. Market with a Data-Driven Approach to Performance and Quality
Wooree Green Science Co., Ltd., a leader in advanced liposomal delivery technologies, announced that its LipoPrime™ liposomal ingredient platform is now available to U.S. dietary supplement and functional nutrition brands.
Samsung is Starting to Catch Up to Apple on Hearing Health
Samsung today said its Galaxy Buds Hearing Aid feature has been cleared by the U.S. FDA, which means hearing aid capabilities will be coming to the Galaxy Buds in the fourth quarter of 2026. Samsung will join Apple in offering over-the-counter hearing aid functionality. Apple added an FDA-cleared hearing health feature to the AirPods back in 2024, allowing them to be used as a clinical-grade hearing aid.
Lallemand Bio-Ingredients to spotlight science-driven ingredients at Vitafoods Asia 2026
Lallemand Bio-Ingredients, Health Ingredients, a global leader in fermented functional ingredients for human health and nutrition, will showcase its latest science-backed ingredients at Vitafoods Asia 2026, taking place September 2-4, 2026, in Bangkok, Thailand
UNCW Business School Students Travel to Prague for Real-Life Consulting Experience by David Glew
This article was contributed by Kestrel Smoot, International Programs Coordinator for UNCW’s Cameron School of Business. During the most recent spring semester, 33 upper-level finance and marketing students from the UNCW’s Cameron School of Business traveled to Prague, Czechia, to participate in an intensive international consulting project. Unlike traditional study-abroad programs, the Prague consultancy project focuses on real client engagement. Each year’s project is entirely new, designed through collaboration between faculty and industry partners to identify a current business challenge that students will address. This year, students worked with MAMS-Champi, a Czech non-alcoholic beverage company that is seeking to expand into other global markets. Throughout the first half of the semester, students attend class at UNCW and prepare for their time abroad by conducting preliminary research, developing analytical frameworks, and organizing themselves into specialized teams responsible for tasks such as marketing strategy, industry analysis, consumer segmentation, and competitive evaluation. The course emphasizes independence and teamwork, requiring students to take ownership of their work, manage deadlines, and collaborate across functional groups. Additionally, faculty serve as advisors, allowing students to navigate the complexities of the project much as they would in a professional consulting environment. Once in Prague, students met with company leadership, toured facilities, and refined their recommendations based on real-time feedback. The in-person component is widely regarded as the most transformative aspect of the program because students must synthesize weeks of work into a cohesive presentation and deliver it to the client, demonstrating professionalism, strategic thinking, and adaptability. Beyond the consulting work, students participated in cultural and educational activities that broadened their understanding of global business environments. They explored Prague’s historic districts, learned about Czech culture, and engaged with local professionals. These experiences helped students understand how economic, regulatory, and social factors shape market opportunities. The Prague consultancy project stands as a defining example of the Cameron School of Business’s commitment to experiential learning, consistently strengthening students’ confidence, enhancing their resumes, and serving as a focal point in job interviews. Employers recognize the value of the hands-on experience and transferable skills students gain, underscoring the program’s role in preparing industry-ready graduates for today’s fast-moving business landscape.
Strengthening Indonesia’s health emergency response through after action review of disaster response in Aceh, North Sumatra and West Sumatra
Severe floods and landslides that struck Aceh, North Sumatra and West Sumatra in late 2025 exposed both the strengths and gaps in Indonesia’s health emergency response, prompting a nation-wide effort to strengthen preparedness for future crises. In the early phase, the scale and speed of the crisis challenged coordination, data systems and surge capacity. To assess the response, the World Health Organization (WHO) Indonesia supported the Ministry of Health’s Center for Health Crisis in conducting a multi-stakeholder after-action review (AAR). The review brought together government agencies, health sub-clusters, NGOs, and partners. “The AAR is a critical process for strengthening our collective response capacity,” said Agus Jamaludin, Head of the Center for Health Crisis at the Ministry of Health. “It provides valuable lessons not only for the Health Crisis Center but also for all stakeholders involved and serves as an important reference for improving future responses across regions.” After Action Review (AAR) brought together key stakeholders to reflect on the emergency response, identify lessons learned, and strengthen preparedness for future health crises. (WHO/Resty Armis)Through structured discussions across four pillars – leadership and governance, information-based decision-making, service delivery and resource management – the AAR identified several strengths. These included the rapid mobilization of national surge capacity, such as health reserve workforce (tenaga cadangan kesehatan) and emergency medical teams (EMT) and the continued provision of essential health services in affected areas. At the same time, the review highlighted challenges. Among them were uneven functionality of Health Emergency Operation Center (HEOC), fragmented early data reporting and reactive logistics deployment. The findings informed five strategic priorities for strengthening the system, including HEOC standardization, integration of the One Crisis Data system, establishing disaster-resilient hospitals and reforming surge capacity mechanisms. The AAR demonstrates that Indonesia’s health emergency response has strong foundations but requires system-level strengthening to shift from reactive to proactive preparedness. By mainstreaming the strengths and recommendations identified, Indonesia can build a faster, more coordinated and more resilient health system – better equipped to protect communities during future crises. Written by Lintang Sibarani, NPO Emergency and Humanitarian Actions, WHO Indonesia
Apple is finally closing a significant ecosystem gap with Android on Windows
Apple plans to let iPhone users copy and paste seamlessly with Windows PCs, years after Android users got similar functionality.
Adults over 60 should try one 30-second test to predict healthy aging, experts say
Nick Schofield, a tactical athlete physical coach in the U.K., demonstrates how to perform the sit-to-stand exercise, which can be an indicator of lower-body strength and is closely linked to mobility, functional fitness and healthy aging.
UNCW Business School Students Travel to Prague for Real-Life Consulting Experience by Robert Burrus
This article was contributed by Kestrel Smoot, International Programs Coordinator for UNCW’s Cameron School of Business. During the most recent spring semester, 33 upper-level finance and marketing students from the UNCW’s Cameron School of Business traveled to Prague, Czechia, to participate in an intensive international consulting project. Unlike traditional study-abroad programs, the Prague consultancy project focuses on real client engagement. Each year’s project is entirely new, designed through collaboration between faculty and industry partners to identify a current business challenge that students will address. This year, students worked with MAMS-Champi, a Czech non-alcoholic beverage company that is seeking to expand into other global markets. Throughout the first half of the semester, students attend class at UNCW and prepare for their time abroad by conducting preliminary research, developing analytical frameworks, and organizing themselves into specialized teams responsible for tasks such as marketing strategy, industry analysis, consumer segmentation, and competitive evaluation. The course emphasizes independence and teamwork, requiring students to take ownership of their work, manage deadlines, and collaborate across functional groups. Additionally, faculty serve as advisors, allowing students to navigate the complexities of the project much as they would in a professional consulting environment. Once in Prague, students met with company leadership, toured facilities, and refined their recommendations based on real-time feedback. The in-person component is widely regarded as the most transformative aspect of the program because students must synthesize weeks of work into a cohesive presentation and deliver it to the client, demonstrating professionalism, strategic thinking, and adaptability. Beyond the consulting work, students participated in cultural and educational activities that broadened their understanding of global business environments. They explored Prague’s historic districts, learned about Czech culture, and engaged with local professionals. These experiences helped students understand how economic, regulatory, and social factors shape market opportunities. The Prague consultancy project stands as a defining example of the Cameron School of Business’s commitment to experiential learning, consistently strengthening students’ confidence, enhancing their resumes, and serving as a focal point in job interviews. Employers recognize the value of the hands-on experience and transferable skills students gain, underscoring the program’s role in preparing industry-ready graduates for today’s fast-moving business landscape.
In A 'Who Could Have Possibly Seen This Coming' Event, Ubisoft Will Shut Down Its NFT Game
Champions Tactics had previously removed its Web3 functionality and will be sunset in October
The US ‘golden age’ science strategy: what Europeans need to know
The US has unveiled what officials claim is the most radical overhaul of the public R&D system in a generation, which if implemented could have significant implications for transatlantic research collaboration. Science: A New Golden Age derides universities as “legacy institutions” and instead wants to prioritise funding on technological challenges, new research labs and funding that follows individual scientists, rather than being linked to their institutions. “Too much of our research enterprise has come to serve itself rather than the scientists within it,” writes Michael Kratsios, director of the White House’s Office of Science and Technology Policy (OSTP), the only named author of the report. “Federal funding agencies should support a broader range of performers.” But some critics argue that the strategy is a smokescreen, using genuine problems in academia as an excuse to further weaken US universities, which US vice-president JD Vance has labelled “the enemy..”Even as it talks of a “golden age” for science, the White House has proposed halving the 2027 budget of the US National Science Foundation (NSF), and has put forward double-digit cuts for other funding bodies, such as the National Institutes for Health. It asked for similarly steep savings in 2026, but Congress stopped them going through. Science: A New Golden Age says success will be measured by the extent to which scientists are “free” to pursue the most “vital questions,,” painting academia as currently hidebound by bureaucracy, sluggishness and consensual conservatism. And yet the Trump administration is simultaneously planning new rules that will hand political appointees unprecedented powers to screen and cancel grants. The report has pretentions to be the successor to Science: The Endless Frontier, the seminal 1945 document in which presidential science advisor Vannevar Bush set out the case for post-war government funding of basic research, helping to spur the creation of funders such as the NSF. Even the title page font is the same. But it remains unclear if the latest report will leave anything like as lasting a legacy.Here, Science|Business explains some of the biggest proposed changes in Science: A New Golden Age, and how Europeans think it might change the landscape of their biggest science partner.Universities under fireA key target of the report are US universities, which it repeatedly suggests are outmoded as research institutions. It criticises the NSF for channelling resources “overwhelmingly to a single type of performer, the university-based, principal investigator-led research group..” Universities “extract” money from researchers’ grants to support “growing administrative bloat,” alongside legitimate uses. The Trump administration has been trying to cut the overhead costs in federal research grants that flow to universities. Instead, new institutions are being built. In May, the NSF announced it would spend $1.5 billion on two new so-called X-Labs, focused on scientific instrumentation and quantum systems. The idea is that they fill a niche in the landscape, tackling problems that are too big for a university lab, but too early stage for private start-up funding. Parallel with Europe?This shift to new research organisations parallels moves in Europe to set up new innovation agencies, such as Germany’s Sprind, the UK’s Advanced Research and Invention Agency, and the EU’s European Innovation Council. The Dutch and French governments are looking to set up their own entities too. There’s now an emerging consensus, evident in a number of new strategies, that public R&D needs to be shaken up, Charles McIvor, an economist at the OECD, has written in response to Kratsios’s plans. “What stands out for me across these strategies [in the US, Germany, South Korea and Japan] is that governments are realising that the old ways of delivering STI [science, technology and innovation] programming no longer works,” he said in a LinkedIn post. Metascience wins?The document is, at least on the face of it, also a big win for some policy thinkers in the US who want far more experimentation with new forms of research grant and institution.It name-checks a litany of new public R&D ideas, from focused research organisations and advance market commitments to “golden tickets,” which allow grant reviewers the power to hand applicants money without requiring the consensus of other review panellists.Related articlesEuropean researchers sound the alarm that Trump rule changes will hit cooperationFocused research organisations: what are they, and how do you set them up? NIH turmoil risks reciprocal EU-US access to health research funding In addition, every federal research funding agency should set up a metascience unit, the strategy says, “with authority to run controlled experiments on review and funding mechanisms.” The UK has already set one up, the strategy points out. This mirrors recommendations to the European Commission. In 2024, a report led by former Portuguese science minister Manuel Heitor also advised the EU to set up an “experimental unit” to test out new methods of funding research. So far, however, Brussels hasn’t put forward any plans to do so. Bypass universitiesBut there’s a worry that the Trump administration is using the metascience movement to justify an overhaul of public R&D that punishes universities, which it sees as centres of political resistance. Last year, it threatened to cut Harvard University’s federal funding unless it hired and admitted a “critical mass” of new faculty and students to create “viewpoint diversity” across campus. It’s also attempted to strip academics of funding for working on politically forbidden areas, like LGBTIQ people’s health.The new strategy appears to be a “move to bypass the power of universities full stop and allow funders and political bureaucracies to handpick the projects and people who will execute them,” said Jean-Claude Burgelman, a former senior official in the Commission’s research directorate, on LinkedIn.The EU’s science counsellor in Washington, Florent Bernard, wrote that the plans risk diverting public research funding so that it “solely serves private interests.” “Who, if not independent universities, will do research that demonstrates the impact of tobacco on lung cancer or the role of human activities in our current climate crisis?” he wrote.Should we take it seriously?“I would view the overall document as a bad faith argument,” said Cole Donovan, director of science policy at the campaigning group Stand Up for Science, and a former OSTP official. “I don’t see the project itself as something that can be isolated from the broader attack on the system.” He thinks the argument that academia has become dysfunctional and in need of radical reform is being deployed as part of a “PR argument” to legitimate moves against US scientists. The strategy presents ideas like metascience units as new, whereas there were moves to set them up at the NSF during the previous administration of Joe Biden, Donovan said. The other caveat here is that the OSTP has limited power to carry out any of these recommendations. While Kratsios has issued a memo to research agencies telling them to implement the recommendations in the report, he doesn’t have direct budgetary control. “As a former OSTPer myself, this does not seem like a document that is realistic,” said Donovan.
iPhone 18 Pro: Twelve Changes Coming to Apple's Next Flagship
We're less than two months out from the launch of Apple's premium next-generation smartphone lineup, and while we're not expecting a dramatic change in terms of functionality, there are still several enhancements rumored to be coming to the iPhone 18 Pro and iPhone 18 Pro Max. One thing worth noting is that Apple is reportedly planning a major change to its iPhone release cycle this year, adopting a two-phase rollout starting with the iPhone 18 series.
Structural alignments to design functional RNAs
Nature Computational Science - A new method designs RNA sequences by learning from alignments of structurally similar molecules, producing aptamers and ribozymes that are experimentally validated.
Get in the game: Delta, DraftKings bring sports fandom to new heights
Delta and DraftKings are bringing a new kind of sports experience onboard: SkyPicks, a free-to-play sports knowledge contest built for fans who want to do more than just watch. SkyMiles Members (ages 21 and up) can make sports prediction picks and play to win Delta gift cards – no betting, deposit functionality, buy-in, miles or financial risk involved. It’s one more way Delta is becoming the home for sports fandom in the sky.
Daily multivitamin may help older adults stay independent
Taking a daily multivitamin may help older adults preserve the strength and stamina needed for everyday activities. After three years, users reported better functional health than those taking a placebo, although the preliminary findings still require peer review.
Hyperwear Names Dr. Kristen M. Beavers, PhD, MPH, RD, as Science Advisor
/PRNewswire/ -- Hyperwear, the functional fitness brand behind the Hyper Vest weighted vest, Hyper Ruck, and SandBell training tools, today announced that...
“Graphic Talk About Science: Adventures in Science Engagement”
Mount Wilson Observatory (MWO), Southern California’s esteemed home to several of the most groundbreaking astronomical discoveries in history, welcomes the public to the third Saturday Evening Talks & Telescopes of the season on Saturday, July 25, 2026. MWO is honored to present “Graphic Talk About Science: Adventures in Science Engagement,” a lecture by Clifford V. Johnson, from UCSB. This lecture explores how graphic storytelling can make cutting-edge physics more accessible, as Johnson discusses the science and creative process behind his illustrated book, “The Dialogues: Conversations About the Nature of the Universe.” Tickets are available here: www.mtwilson.edu/events/lecture072526 During the six-month season, each Talks & Telescopes event runs from 5:30pm to 11:30pm with the “talk” portion of the evening beginning in the Observatory’s Auditorium. The 60+ minute presentation is followed by picnic dining—bring your own, or purchase from a food truck or caterer—and then, after the sun goes down, stargazing through Mount Wilson’s immense telescopes, the largest in the world made available to the public. Additional stargazing around the grounds will be available thanks to members of the Los Angeles Astronomical Society. Both the 60-inch telescope and the 100-inch—the latter famously used by Edwin Hubble to discover the expanding universe—will be available for viewing the night sky. Priced at $50, this event series offers the most economical stargazing event option on the mountain. Tickets and more information are available on Mount Wilson Observatory’s website here: www.mtwilson.edu/lectures. Advance purchases are highly recommended. UPCOMING SATURDAY EVENING TALKS & TELESCOPES OF THE 2026 SEASON August 22: “Towards a Functional Cosmology” www.mtwilson.edu/events/lecture082226 Join artist Lita Albuquerque for a lecture on her multidisciplinary practice at the intersection of art, science, and cosmology. Drawing on decades of work across painting, land art, performance, and installation, she reflects on projects created in remote, astronomy-linked environments and how they shape her exploration of time, space, and human perception. September 19: “The Brightness of Stars: Henrietta Leavitt and the Transformative Nature of Attention in Art and Science” www.mtwilson.edu/events/lecture091926 Visual artist and author Anna Von Mertens explores the life and legacy of Henrietta Leavitt, whose study of variable stars enabled the first reliable measurements of cosmic distances. Working among the Harvard Computers, Leavitt laid the foundation for breakthroughs at Mount Wilson, including Harlow Shapley’s mapping of the Milky Way and Edwin Hubble’s discovery of an expanding universe. Drawing from her book “Attention Is Discovery: The Life and Legacy of Astronomer Henrietta Leavitt,” Von Mertens shares archival materials alongside her own artwork inspired by Leavitt’s life, to celebrate how careful attention leads to both scientific discovery and a meaningful life. October 17: “The Duality of Genius and Struggle: G.E. Hale” www.mtwilson.edu/events/lecture101726 This talk, presented by Sam Hale, explores the extraordinary life and legacy of his grandfather, George Ellery Hale—the visionary behind some of the world’s most important astronomical institutions. Drawing on both history and personal connection, Sam Hale offers insight into a legacy that continues to shape science and culture today. VISITING MWO The gate to Mount Wilson’s campus opens at 10:00am daily and closes at 5:00pm from early April through November. Entrance to the grounds is free. Visitors can hike, gaze at the telescope domes and towers that dot the landscape, and take a look at historic Mount Wilson photos and letters in the Museum. The Cosmic Cafe (www.mtwilson.edu/cosmic-cafe), located above the main parking lot at the Observatory entrance, is open on weekends in the spring, summer, and fall. In addition to traditional menu items such as hot dogs, drinks, and snacks, the Cafe offers wraps, salads, and sweet treats from Little Flower. PARKING A U.S. Forest Service Adventure Pass is required to park at the Observatory. A $5 day pass or a $30 dollar annual pass may be purchased at the Cosmic Cafe on weekends between 10:00am and 5:00pm. During the week, passes are available at locations around Los Angeles. The most convenient location before heading up is at the Shell station in La Canada Flintridge at the bottom of the Angeles Crest Highway (https://find.shell.com/us/fuel/10007957-4530-angeles-crest-hwy/en_US). Visit the U.S. Forest Service website for more information about Passes and other locations to buy them: www.fs.usda.gov/r05/passes/adventure-pass For more information about Visiting Mount Wilson Observatory, please visit: www.mtwilson.edu/visiting NOT ADA-COMPLIANT Please be advised that access to the 100-inch dome is via an open-air, 53-step staircase inside the building. There is no ADA-compliant access.
AI web browsers 'aren't ready for the public,' scientists warn as they highlight massive security red flags
By enhancing the functionality of agentic browsers, they have become insecure and could be sharing personal information.
Sports without politics is a fantasy and the World Cup proves it
From ancient Greece to Nazi Germany, sport and politics have long been intertwined. Nevertheless, we still imagine that international sport can be kept above the fray and serve as a neutral arena where nations compete on merit alone. In this article, diplomacy scholar Geoffrey Allen Pigman argues the 2026 FIFA World Cup shows this is a dangerous illusion. When international sport is left entirely to revenue-maximizing private bodies like FIFA, it doesn't escape politics, but rather surrenders to its worst expressions. With the 2028 Los Angeles Olympics fast approaching, the IOC must decide whether to learn that lesson or repeat the same mistakes. The largest and most lucrative FIFA World Cup ever draws toward its climactic conclusion amidst a swirl of controversy. Team members, staff, fans, and spectators have been denied their right to enter the United States to participate, and US President Donald Trump intervened with FIFA boss Gianni Infantino to overturn a referee’s call that Trump believed disadvantaged the US national team. It is a moment to step back and reflect on what the purposes of international sport mega-events like the World Cup, and international sport more broadly, are, and what they should be. Does international sport serve public purposes? Is there a public interest? Or is it primarily a private endeavor organized by commercial enterprises to entertain the global public (and generate profit in the process), which is occasionally used by governments and leaders for raisons d’etat? Central to the idea of sport is the principle of fair play, which in the international context demands that games be free from political interference. However, it is impossible to separate sport from politics, all claims to the contrary notwithstanding. The most positive political use of international sport through the millennia has been to facilitate diplomacy. The use of international sport for diplomatic objectives has existed since at least the time of the ancient Olympic Games, around which was instituted the custom of the Ekecheiria, or Olympic Truce, between participating states to facilitate fair competition and diplomatic achievements by ensuring that participants could travel safely to the Olympiad. In his seminal work On Diplomacy (1987), diplomacy scholar James Der Derian characterized the objectives of diplomacy as overcoming alienation and mediating estrangement between governments and between peoples. One increasingly important diplomatic tool in the technology-infused media environment over the past century has been public diplomacy, under which governments and non-state diplomatic actors (e.g. transnational corporations) communicate to global publics about their international policy objectives and to shape their global brand image. Political scientist Michał Kobierecki, in his important book Sports Diplomacy (2020), views sports diplomacy as falling broadly within the ambit of public diplomacy, as international sport intimately involves the participation of global publics as spectators and consumers of global media. Diplomacy scholar Stuart Murray and this author, in a 2013 article, distinguish between international sport used for diplomatic purposes and international sport-as-diplomacy, which encompasses the range of diplomacy that occurs as teams and competitors, spectators and fans, and government officials all converge for international sporting events like the Olympic Games and FIFA World Cup. Diplomacy scholar H.E. Chehabi, in a 2001 article on US-Iran sports diplomacy, describes the interaction between spectators and fans at international sporting events as “people-to-people diplomacy,” in which relationships develop independently of governments and their objectives. Diplomacy by the aforementioned definitions is often unsuccessful. Moreover, all too often the tools of diplomacy may be employed by governments and other actors to thwart or oppose the objectives of diplomacy as characterized by Der Derian. Governments routinely use the tools of public diplomacy to disseminate propaganda, spreading misinformation in the attempt to deceive global publics about their objectives and to create misleading impressions about their brand identity. Within sports diplomacy, the term “sportswashing” has been coined recently to describe how governments invest in and promote international sport to create positive global public impressions of their nations and, in doing so, to distract the global public from their deficient records in areas such as human rights and democratic governance. Murray, in his 2018 book Sports Diplomacy: Origins, Theory and Practice, introduces the concept of sports anti-diplomacy, wherein governments intentionally use international sport to advance aggressive and nationalistic objectives. Obvious historical examples include Hitler’s use of the 1936 Berlin Olympics to glorify his Third Reich and the 1969 El Salvador-Honduras football “war.” SUGGESTED READING The beautiful game made ugly By Emily Ryall FIFA argues that it is and seeks to be apolitical in its stewardship of international Association Football (soccer). FIFA policies governing bids to host the World Cup require uninhibited and non-discriminatory access for players, team staff, and spectators of all participating countries to host nations and venues. It became clear soon after Trump returned to power in the United States in January 2025 that Trump’s political intentions and objectives to limit non-US citizens from living and working in the United States and, in numerous cases, even visiting the country, would collide with FIFA’s host nation policies. Beginning soon after the start of the second Trump administration, US federal authorities imposed restrictions on entry to the United States of citizens of between 20 and 40 countries for any purpose, with only limited exceptions. Federal Immigration and Customs Enforcement (ICE) began arresting non-US citizens in the United States, including persons with and without legal status, holding them in jails, concentration camps, and other detention facilities until they were deported to their home or third countries, where they faced substantive risks to their personal safety. FIFA boss Gianni Infantino, in an effort to ensure the most successful and lucrative World Cup in history, engaged diplomatically with President Trump in an attempt to facilitate entry to the US for World Cup participants. Infantino did all in his power to ingratiate himself with Trump, to the extent of creating a FIFA “Peace Prize,” which he awarded to Trump in December 2025 at a ceremony in the then Trump-controlled John F. Kennedy Center for the Performing Arts in Washington, DC, on the occasion of the World Cup draw. The prize was an ersatz consolation for someone who aspired in vain to win the rather more prestigious and well-known Nobel Peace Prize. And in the run-up to the World Cup, conditions became worse. In February 2026, Trump and Israeli Prime Minister Benjamin Netanyahu launched a war of aggression against Iran, illegal under international law, under the false pretence that Iran’s government was preparing to attack the United States and Israel. During the US aerial bombardment of Iran, US planes bombed Azadi Stadium, the facility where Iran’s national football team trained. As the 2026 FIFA World Cup began, it was clear that Infantino’s efforts had been for naught: the Trump administration would not adhere to FIFA policies governing access to World Cup host nations. World Cup referee Omar Artan, a citizen of Somalia, was denied a US visa to enter the United States to participate in the World Cup. Trump’s government only granted US visas to Iran’s football team ten days before they were scheduled to arrive for the tournament. Numerous members of the support staff for Iran’s team were denied US visas. Iran’s team, which had been scheduled to train in Arizona, was directed to shift its training site to Tijuana, Mexico, notwithstanding that all three of their group stage matches took place at US venues. The US Department of Homeland Security only permitted the Iranian team to enter the US on the day before each scheduled match and then to return to Mexico immediately after playing. Members of Iraq’s and Switzerland’s football teams were delayed for hours by US officials at the US border, and an Iraqi team photographer was refused entry. Spectators and fans from Haïti and Iran were denied entry to the United States altogether. A large number of fans from a range of countries had their applications for US visas rejected. There were multiple off-ramps through which participants could have avoided the negative consequences of Trump’s decisions for the 2026 World Cup. Once it was clear that the Trump government intended to violate the established expectations for World Cup hosts, FIFA could have shifted the matches scheduled to take place in the United States to Mexico and Canada. The three nations were already designated as co-hosts, and host cities and venues had been selected. Once it was clear that FIFA, governed by FIFA boss Gianni Infantino’s dependent and dysfunctional relationship with Trump, would never consider this option on its own, it fell to the national football federations to act. The national federations, particularly some combination of federations of the leading contenders (France, Spain, Brazil, Argentina, Morocco, England, Germany, etc.), could have refused to participate under the US-imposed conditions or, at the least, demanded an ironclad agreement with the Trump government that FIFA policies on access would be respected. ___ International sport is inextricably entangled with diplomacy of different sorts, for good or ill, it cannot be considered to be in the purely private realm and left to revenue-maximizing private actors. ___ Why did neither FIFA nor the national football federations act to protect the interests of players, team staff, referees, fans, and spectators? In essence, the relentless engines of capitalism prevailed over norm observance, ethics, and fair play. The revenue interests of FIFA, sponsors, global media, and host cities won out. FIFA’s managers viewed hosting another World Cup principally in the United States as a veritable pot of gold for FIFA and its collaborators. FIFA has estimated its own revenue over the 2023-26 budget cycle, which includes the 2026 World Cup, at $13 billion, revised up from an initial projection of $11 billion, and 72% higher than the previous revenue cycle. Of that total, FIFA is estimated to have generated $8.9 billion from the Cup itself in revenue from TV rights ($3.92 billion), sponsorships ($2.69 billion), ticket sales ($3.1 billion), licensing rights, and other sources. A joint study by FIFA and the World Trade Organization estimates that the World Cup will contribute over $40 billion to global GDP, including nearly $14 billion in direct visitor spending in the three host countries (but principally in the United States, which hosted the lion’s share of the matches). The FIFA World Cup is now reportedly “the single most lucrative recurring commercial property in global sport.” And yet, notwithstanding the Trump government’s uses of the World Cup for sports anti-diplomacy, and the climate of anxiety that this created for participants and spectators, diplomacy that did not depend upon governments was able to thrive at the World Cup. Examples of successful people-to-people diplomacy were legion, as citizens of towns and cities across the States, as well as in Mexico and Canada, welcomed team members, their families and supporters, to training sites across North America. Fans of different teams joined together in person in stadiums for matches, at watch parties and bars, and at welcome events sponsored by host cities. The joy and camaraderie shared between the citizenry of Boston and Scotland’s “Tartan Army” of fans is but one example of how the “Beautiful Game” brings people together. Friendships forged across continents are likely to endure well beyond the Cup final. Even those achievements cannot be seen as unalloyed, however. As South African football fan Byron Pillay commented to Al Jazeera, “Football is called the Beautiful Game for a reason, for its ability to unite people. But it’s hard to believe in that magic with the politics and war rhetoric off the field of play, especially when one of the tournament hosts is central to that.” Ultimately, the experience of the 2026 FIFA World Cup illustrates that, as international sport is inextricably entangled with diplomacy of different sorts, for good or ill, it cannot be considered to be in the purely private realm and left to revenue-maximizing private actors. As long as there is the possibility of diplomatic progress in mediating estrangement between governments or between peoples, there is a broad and overarching public interest in international sport. Likewise, as it would be difficult to put on an international sport mega-event without international sporting organizations like FIFA and the International Olympic Committee (IOC), global media firms, and companies purchasing sponsorships, public and private interests in international sport must coexist, most likely somewhere on a shifting spectrum between partnership and rivalry or cross purposes. As the World Cup wraps up, the IOC needs to consider its lessons before the scheduled 2028 Los Angeles Olympics if they want to avoid a media-hyped Trump version of the 1936 Berlin Olympiad. The IOC and the National Olympic Committees need to set conditions on and make demands of Trump’s government with clearly articulated consequences for non-compliance, up to and including cancellation of the Games. Time is running out for the IOC, as unlike with the FIFA World Cup, there is no at-the-ready alternate venue for Los Angeles.
Scientists discovered the brain doesn't make decisions the way we thought
A new study suggests the brain begins making decisions much earlier than scientists previously thought. Researchers found that even primary sensory regions are influenced by higher brain areas through rapid feedback loops, rather than simply passing information forward. This more dynamic view of brain function could help engineers design future AI systems that think more like biological brains while using far less power.
Why Life Science Tech Pilots Fail After The Demo — And How To Avoid It
A working demo might look promising, but it doesnt tell you whether the tech can be shipped, integrated, validated, and accepted by regulator. Tech consultant Lukasz Lazewski explains how to look past the allure and evaluate its true functionality.
Team's prediction task compares GPT-4o with classic machine learning
Large language models have been functionally opaque. Seeking transparency, a team undertook a comparison with traditional machine learning.
Efzimfotase alfa demonstrated improvements in bone health in treatment-naïve pediatric patients with hypophosphatasia achieving median difference of 1.67 vs placebo in RGI-C Score at week 25 in MULBERRY Phase III trial
Positive results from the MULBERRY Phase III trial showed that efzimfotase alfa (ALXN1850), an investigational enzyme replacement therapy, demonstrated a statistically significant and clinically meaningful improvement in bone health in children (2 to
The Science Of Speed: How Mizuno’s Nanoalloy Face Changes What’s Possible In Driver Design
Mizuno is the first company to put a functional polymer layer in front of a driver face. The implications go well beyond ball speed. For most of the
Trump’s fixation on election overhaul bill derails GOP agenda on Capitol Hill
A nasty feud over President Donald Trump’s elections overhaul push has further crippled an already-dysfunctional Congress, leaving Republicans unable to move on critical elements of their agenda.
Why Healthy People Often Become The Problem In Unhealthy Systems
Whether in families, workplaces, or friendships, the person who challenges dysfunctional norms is often blamed for disrupting the status quo.
Can a Community Move Beyond the Systemic Fractures of Mental Health Care? "All Access hosted by Andy Garcia" Explores the Coordinated Response in Kansas
The educational segment, filming on June 23, 2026, features Mental Health America of South Central Kansas as it challenges the traditional boundaries of regional behavioral healthcare. Filmed on location across outpatient counseling spaces, children and family programs, adult support services, and residential environments supporting recovery, stability, and independence in Wichita, the feature captures how connected programs, community partnerships, and compassionate care create a functional saf
Alogic Debuts New Touchscreen Monitors and Portable Displays With Mac Support
Alogic this week unveiled a new lineup of touchscreen displays that bring touch and stylus functionality to Macs, including the FOKUS interactive touchscreen series, the Aspekt Touch 27" monitor, and new Folio portable touchscreen displays. Aspekt Touch 27" While Apple has yet to release a touchscreen Mac, Alogic has established itself as one of the few display makers offering touch-enabled monitors designed to work with macOS.
Chinese scientists create record-smashing brain implant electrode array
Breakthrough recorded neural activity with high clarity and remained safely functional for 18 months without a drop in performance.
Android 17 update deletes homescreen widgets for some Google Pixel owners
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12 Reasons to Wait for the iPhone 18 Pro
We're only three months out from the launch of Apple's premium next-generation smartphone lineup, and while we're not expecting a sea change in terms of functionality, there are still several enhancements rumored to be coming to the iPhone 18 Pro and iPhone 18 Pro Max. One thing worth noting is that Apple is reportedly planning a major change to its iPhone release cycle this year, adopting a two-phase rollout starting with the iPhone 18 series.
IBX team wins first place at Google Code for the Cure Hackathon with AI prototype to make prior authorization clearer and fairer
A team of associates from Independence Blue Cross’s (IBX) Advanced Analytics and Data Science department won first place at a recent Google Code for the Cure Hackathon in New York City. The event, run by Google Cloud, brings together teams to build real-world AI solutions to health care challenges. In just four hours, the IBX team designed and built a fully functional prototype that shows how AI can make prior authorization decisions clearer, more consistent, and fair for patients and providers.
Is SMIC N+3’s Metal Pitch Smaller than Intel 18A’s?
Almost four years ago, we published that SMIC had started shipping 7 nm (N+1) chips. Now, SMIC is shipping its third-generation 7 nm (N+3) process in Huawei’s Kirin 9030, with a minimum metal pitch of 32.5 nm, about 10% tighter than the 36 nm minimum metal pitch shipping in Intel’s latest Panther Lake CPUs on 18A. The headline is true, but incomplete cherry picked metric. N+3 reaches the density of TSMC N6 through aggressive DUV multi-patterning and design-technology co-optimization (DTCO), but it pays for that in complexity, efficiency and process control. We found this and more in our reverse engineering and teardown where we cover SMIC’s N3 process technology, Huawei’s packaging, memory, architecture, and more. SemiAnalysis has been building a state-of-the-art teardown lab in Oregon capable of analyzing the world’s most advanced and important chips over the last year and half. We have already generated revenue on advanced datacenter chip teardowns including our recent reverse engineering of a major TSMC customer’s COUPE CPO optical engine + EIC 3D stack. This is the first public report from the SemiAnalysis Teardown Engineering & Evaluation Lab, or STEEL for short. The lab is aggressively scaling up and out and we’re excited to announce it publicly. This is a bit of inconvenient timing for TechInsights as they are private equity owned and currently being sold while having enjoyed virtually no credible competition for decades. This has led to TechInsights underinvesting in CAPEX. SemiAnalysis exceeds TechInsights in revenue despite no venture or private equity ownership and being founded only 6 years ago. Because we have no external investors and are founder led, we move faster, build faster, and we can release client chip teardowns for free regularly, while focusing on datacenter for our major clients. Here’s the first public image from our lab, the HiSilicon Kirin 9030 Pro SoC: This report will detail our teardown of the Kirin 9030 and our findings on SMIC’s N+3 process, the most advanced in China. For comparison, we’ll show our teardown of the MediaTek Helio G99, made on TSMC N6. Through this comparison, we can look at the effect of export controls – SMIC N+3 and TSMC N6 are comparable nodes, but one is heavily export-controlled, the other free to use the West’s most advanced equipment. Here we see both China’s progress and constraints. SMIC N+3 reaches TSMC N6-class logic density, but it requires far more aggressive DUV multi-patterning, so it does not match N6 on process maturity or cost. The Kirin 9030 Pro performs similarly to three-year-old Android flagships, and trails far behind the current flagship SoCs from Apple, Qualcomm, MediaTek, and Samsung. The efficiency gap is even wider. Export controls have not stopped Huawei and SMIC from shipping advanced silicon, but they have forced a different path. Without EUV, SMIC is leaning harder on DUV multi-patterning, DTCO, and increasingly complex integration. The roadmap continues forward through tighter design rules and backside power, but each step adds cost and process risk. Huawei’s τ scaling and LogicFolding show another path: stacking active logic and recovering density through advanced packaging and system-technology co-optimization (STCO). To understand the Kirin 9030, we must first understand Huawei’s SoC history. HiSilicon is Huawei’s chip design arm, responsible for the Kirin smartphone SoCs, Kunpeng server CPUs, Ascend AI accelerators, and switch/router networking silicon. Before export controls, Huawei was TSMC’s largest customer – the only customer on TSMC’s first EUV node, N7+, and among the first on N5, alongside Apple. That ended in late 2020. Huawei switched to Qualcomm SoCs in its flagship smartphones, though export controls limited them to 4G-only variants. In late 2023, Huawei returned to in-house silicon with the Kirin 9000s, a successor to the Kirin 9000, fabricated on SMIC N+2 instead of TSMC N5. In the following years, they released the Kirin 9010 and 9020 on the same N+2 process. These chips used Huawei’s in-house TaiShan CPU cores and Maleoon GPU. We have not torn down a Kirin 9020 ourselves, so the predecessor die shot is from Kurnal. The die shots show how Huawei spent its silicon budget: which functional blocks are where, and how their areas compare to the predecessor. First, a quick guide to the major blocks on the die. The total die area is nearly identical, but the 9030 uses that area more aggressively. A denser process lets Huawei fit an extra middle CPU core, more GPU and NPU cores, and larger caches into the same footprint. In contrast, the Helio G99 is a much smaller, low-cost SoC, built for budget smartphones rather than a flagship device. While the Kirin 9030 is ~140 mm², the G99 is only ~29 mm², roughly one-fifth the area. The underlying TSMC process technology, however, is directly comparable as a baseline for analyzing SMIC’s. The Kirin 9030 is an evolutionary refresh, not a clean-sheet design. Its CPU, GPU and NPU cores carry over the 9020’s families, and the gains come from three levers: the SMIC N+2-to-N+3 process step, DTCO and floorplan work, and incremental microarchitecture. Area is where the first two show up, and the 9030 scales well here. Performance and efficiency are the harder test. Huawei’s design holds up better than its node would suggest, but the chip still trails, both because N+3 sits behind the leading-edge nodes and because its cores, while competent, remain a few generations behind the newest designs. The new prime core is an incremental update. The main changes are a 10% frequency increase from 2.5 GHz to 2.75 GHz and a doubling in the L2 cache from 1 MiB to 2 MiB. Despite the increased cache, the core size decreased by 7.6%. Excluding the private L2 cache, the core size decreased by 21%. This is a large reduction for an incremental node. Compared with the TaiShan New V120 core in the Kirin 9020, the Kirin 9030’s middle core is almost unchanged architecturally, yet each core shrinks by ~22%. Most of that comes from the move from N+2 to N+3, with layout likely accounting for the rest. Visually, the most noticeable change is the increase from 3 middle cores to 4. There is also a 20% increase in the shared L3 cache of the big cluster. This helps to improve multi-core performance without sacrificing much in terms of area. Even with each core shrinking, the big CPU cluster’s total area is essentially unchanged. The per-core savings went back into an additional middle core and larger caches. The tiny cores shrank less than the prime core (excluding its L2 cache) and less than the middle cores. This is likely because fixed overhead is a larger share on a small core. We cannot resolve any architectural changes from the die shot alone, but the per-clock and efficiency gains shown below point to more than pure process and layout scaling. The area reduction was offset by a doubling of the shared L2 cache from 2 MiB to 4 MiB, leaving the total tiny CPU cluster area slightly larger. Area is the easiest improvement to see from a die shot, but it is only one part of PPA (power, performance, area). For modern logic, power and performance matter just as much, and often more. Since Dennard scaling broke down in the mid-2000s, voltage and frequency have not scaled in step with transistor dimensions, so each node has had to fight harder for gains in performance and efficiency. The starkest comparison is not Kirin 9020 versus Kirin 9030 Pro. Apple’s efficiency cores run circles around Huawei’s prime core. Apple’s low-power core delivers 20% higher integer performance while drawing only 1 W, compared with 4.5 W for Huawei’s prime core. N+3 matches TSMC N6, but N6 is several generations old. Apple and Qualcomm build on N4 and N3P, which are denser and sit on a better voltage-frequency curve, giving them a larger transistor budget and more performance per watt. The 9030’s own cores did improve. The middle and tiny cores gained 17% and 14% in per-clock integer performance over the 9020, with floating-point flat on the middle core and up 11% on the tiny. The tiny core improves cleanly, with performance rising while power falls and efficiency increases by 45% in integer and 24% in floating point. The middle core is mixed: integer performance rises but power rises faster, cutting integer efficiency by 7%, while lower power lifts floating-point efficiency 16%. Per-clock gains at the same or lower frequency are microarchitectural, so the cores are tuned, not just shrunk. Both also failed to hold their rated maximum frequencies, pointing to thermal, power, or stability limits. Per clock, the middle core sits around Arm Cortex-A720 and the tiny core near the Cortex-A520; absolute performance trails because Huawei clocks them much lower. The prime core is roughly Cortex-X2 class per clock, a 2021 design. Apple’s 2020 M1 Firestorm core is still 35% higher per clock and 57% faster in absolute integer performance at a similar 4.5 W. The current leading edge is further ahead again: the Apple M5 P-core is 60% higher per clock and 2.7× faster, the Arm C1 Ultra 45% higher and 2× faster. Matching older high-end cores per clock is a genuine design achievement. What Huawei cannot match is the voltage-frequency curve and transistor budget of leading-edge nodes, which let Apple, Qualcomm and others spend more transistors in the same area on wider cores, larger caches and deeper buffers while running at lower voltage. Huawei’s LogicFolding roadmap is one answer, stacking active logic to recover density and shorten signal paths. We return to it later. The GPU compute units (CUs) changed more visibly than the CPU cores, moving to a more rectangular layout for both the arithmetic logic unit (ALU) clusters and the CU overall. Even with ray-tracing support added, a CU shrank ~28%. However, that shrink is offset by the increase from 4 to 6 CUs and the area outside the CUs grew 33%. Overall, the GPU cluster is larger by ~10%. The GPU is where Huawei makes its biggest gains. The Maleoon 935 is not competitive with current flagships, but it is a large step up from the 920 and reaches older-flagship territory. In 3DMark it is 70% faster in Wild Life Extreme (WLE) and 79% faster in Steel Nomad Light (SNL) than the 920; with 11% higher clocks and 50% more CUs, the ~67% theoretical uplift roughly matches WLE and is beaten by SNL. It edges ahead of the Snapdragon 8+ Gen 1 in WLE and SNL, and the Dimensity 9200 and Apple A16 in WLE, but stays far behind newer parts: the Snapdragon 8 Elite Gen 5 and Dimensity 9500 are ~2.4–2.6× faster in WLE and ~3.2× faster in SNL. The Maleoon 935 is Huawei’s first GPU with hardware-accelerated ray tracing; there it lands slightly ahead of the Exynos 2200, and on par with the Apple A16, with current flagships up to 3.7× faster. The Neural Processing Unit (NPU) saw the largest structural changes of any block, moving from a Lite and a Tiny core in the Kirin 9020 to a Lite and two Tiny cores in the Kirin 9030. Both core types also show significant layout changes. This is a reversal in Huawei’s NPU design. The Kirin 9000 5G, its last flagship chip on TSMC N5, used two Lite and one Tiny core. The series of SoCs on SMIC N+2 moved to one Lite and one Tiny core, likely for area savings. With the Kirin 9030, Huawei has shifted back toward a larger multi-core NPU cluster, but with the additional area going to a Tiny core rather than a Lite core. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Interested in joining us on this ride and think you can be a difference maker? Check out our Careers page. Before diving into the process stack, the package and memory are worth separating from the SoC itself. The Pro variant of the Kirin 9030 carries 12 GB of Samsung DRAM, with two stacks of four dies each. The dies were identified as the K4L2E165YD, a 12 Gb LPDDR5X-9600 device fabricated on Samsung’s 1a node, the fourth generation of its 10 nm-class DRAM after 1x, 1y and 1z. 1a has shipped in volume since 2022, so this is current memory rather than older-node inventory. The 16 GB Pro Max variants we obtained were found with both CXMT and Samsung packages. The CXMT package is marked CXDD7JEDM, with two stacks of four dies, packaged in week 45 of 2025. The inferred die dimensions from X-ray computed tomography (CT) are consistent with a known density of ~0.3 Gib/mm² for the CXMT G4 process, roughly equivalent to other manufacturers’ 1z processes. The Kirin 9030 uses a typical integrated package-on-package (iPoP) stack: multiple DRAM dies in a memory package sit above an organic redistribution layer (RDL) interposer, which sits above the SoC and package substrate. The full package is then mounted to the printed circuit board (PCB) through ball-grid array (BGA) solder bumps. The memory package substrate is a thin bismaleimide-triazine (BT) laminate carrying the LPDDR5X stack. The organic RDL interposer over the SoC routes the PoP signals around the die and carries possible dummy thermal copper pillars. The package substrate, a thicker Ajinomoto Build-up Film (ABF) build-up over a BT core, fans the flip-chip bumps out to BGA pitch and embeds the power planes. The whole stack is organic. The only silicon is the SoC and the LPDDR5X dies; there is no silicon interposer. Keeping it all-organic brings the package’s coefficient of thermal expansion (CTE) close to the PCB’s, reducing board-level warpage, and avoids the cost of a silicon interposer the SoC’s bandwidth does not need. In an iPoP stack, the memory package connects to the organic RDL interposer through an array of solder bumps. Underfill fills the gap around those bumps, adding stiffness and protecting the joints from mechanical stress. The Pro and Pro Max variants differ here, which we cover behind the paywall. The die shot and architecture tell us how Huawei allocated its silicon budget. The process tells us what SMIC can manufacture. We use the Helio G99 as the process reference for TSMC N6. Both SMIC N+3 and TSMC N6 are evolutions of previous 7 nm-class nodes. We used targeted TEM cross-sections through logic and memory regions, imaged in both fin-cut and gate-cut directions. Each cross-section caption gives its horizontal field width (HFW), the real width of the imaged area. We start at the transistor fins, then move up through standard cells, local interconnect, and SRAM. SMIC has not overtaken Intel or TSMC. It uses aggressive DUV scaling and DTCO to reach N6-class density, but that density doesn’t translate into comparable performance and efficiency, for two reasons: the node gap to leading-edge nodes, and Huawei’s core designs. Fin Profile One of the most important knobs in a FinFET process is the fin profile: the shape of an individual fin and the channel where current passes from source to drain. The ideal fin is tall, narrow, and nearly vertical. A taller fin increases effective channel width, while a narrower fin improves electrostatic control by thinning the body the gate must control. Push either too far, and the process pays for it: weaker drive current, fragile fins, taper, footing and line-edge variation that hit yield and device variability. The Intel 22 nm, 14 nm, and 10 nm fin cross-sections show how FinFET nodes have improved over time. 22 nm fins were a first-generation structure, relatively short, wide and strongly tapered. The shape limits current density and reduces gate control uniformity across the height of the fin. At 14 nm and 10 nm, Intel pushed the fins taller and narrower while also making the sidewalls more vertical. Rather than shrinking the device, these changes increase the effective channel width per fin and improve electrostatic control. The trade-off is that taller fins at tighter pitches are much more difficult to manufacture. Now, let’s compare the Helio G99 on TSMC N6 with the Kirin 9030 on SMIC N+3. Both processes are in the same class, with fin pitch of 30-32 nm on N+3 and 34 nm in our N6 cross-section. The pitch for N6 is especially interesting as N7’s HD library is generally listed with a 33 nm fin pitch, and N6 did not shrink pitches directly. Its density gains came from DTCO instead of tighter pitches. The 34 nm pitch was stable across our sampled region and serves more as a comparison against the SMIC N+3 we have not investigated further. Pinning down N+3’s fin patterning scheme takes more than one core unit. The CPU cores show a dense ~32 nm pitch, with the pitch between N-P fin pairs alternating between 78 and 88 nm. Logic alone may be consistent with dual-pitch mandrels of 120 and 110 nm, but this is a complex and unusual approach. Combining the pitch from the the 8T SRAM, which has more complex repeat unit, with the CPU core sequence allows us to reverse engineer the patterning steps with more confidence. As both the logic and SRAM should share the same base grid, a single CD mandrel lithography pattern with 128 nm pitch undergoing SAQP produces a die-wide ~32 nm grid (128 nm/4), which supports the pitch sequencing seen in both logic and SRAM cells. In the sampled cross-sections, N+3 shows a taller, narrower, higher-aspect-ratio fin than N6. The measured fin aspect ratio is ~9.5:1 on N+3 versus 7.8:1 on N6. N+3 also shows less top rounding, with an estimated radius of ~2 nm, compared with 2.8 nm on N6. Even though the fin widths differ, the ratio of top rounding to fin width tells the same story, with N+3 at 0.37 and N6 at 0.44. In a geometric sense, lower is better; a perfectly rectangular fin would have no top-rounding penalty. These are single-digit-nanometer features measured from a handful of cuts, so treat the absolute numbers as approximate. The important result is the relative gap: N+3’s fins are consistently taller, narrower and less rounded than N6’s. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Interested in joining us on this ride and think you can be a difference maker? Check out our Careers page. Standard Cell A standard cell is the basic building block of chip layout: a fixed-height row pairing one NMOS and one PMOS transistor that share a gate, tiled in a grid to build logic blocks. The key dimensions are contacted gate pitch (CGP), cell height (CH), fin count, and the lower-metal routing grid. To measure density, we use the Bohr metric: a weighted average of NAND2 gate area (60%) and scan flip-flop area (40%). This represents a realistic mix of combinational and sequential logic. This metric has its limitations, especially for complex cell layouts like TSMC’s FinFLEX, which alternates cells with different fin counts. Even so, it is the best metric for a pure process-level comparison. Another important measurement is the fin pitch; it refers to the distance between two fins of the same transistor. In a FinFET process, multiple fins are used in each transistor to increase the drive current and thus performance. TSMC N6 ships both a high-density (HD) library with 2 PMOS and 2 NMOS fins per cell, and a high-performance (HP) library with 3 of each. More fins under the shared gate mean more effective channel width. HP cells switch harder at the cost of area. Designers mix the two on a die, primarily spending HP cells on timing-critical paths, and matching their PPA targets. In the Cortex-A55 core of the Helio G99, we found a cell height of 240 nm for the HD cell. MediaTek has used HD cells in the G99 to minimize die size and thus cost. As an SoC for budget smartphones at ~$100, this is essential. By contrast, we found only one library in the Kirin 9030, with 2 NMOS and 2 PMOS fins. This suggests a narrower library strategy than TSMC N6, where both HD and HP libraries are widely used. This likely reflects the smaller customer base and the more constrained domestic design and electronic design automation (EDA) ecosystem. In all three CPU cores of the Kirin 9030, we found cell heights of 228 nm, 5% smaller than on N6. This is also a reduction of 9.5% over SMIC N+2’s cell height of 252 nm. SMIC N+3 and TSMC N6’s HD library both feature a CGP of 57 nm. For SMIC, this is a 9.5% shrink over N+2. In the past, CGP and cell height alone may have been enough to compare transistor density. Now, however, we must consider scaling boosters and DTCO as well. SMIC’s density gain does not come from EUV. It comes from using every available DTCO booster aggressively. First is fin depopulation: reducing the number of NMOS and PMOS fins in each cell. The first FinFET nodes started with 3 or 4 fins for each transistor. SMIC N+3 and TSMC N6 HD both use only 2 fins per transistor, trading drive strength for density. Next is contact over active gate (COAG). By landing the gate contact directly over the active gate, instead of out over the isolation region, the cell height drops. N+3 integrates COAG while N6 does not. Our N+3 gate-cut cross-sections indicate COAG, with the gate contact sitting over the active region, while N6 shows an off-gate contact. Last is single diffusion break (SDB). Diffusion breaks are inserted between cells in the same row to provide electrical isolation, but they also introduce local layout effects (LLE), layout-dependent shifts in electrical characteristics. In the past, a double diffusion break was used, consuming the space of two CGPs. SMIC N+3 and TSMC N6 instead use SDB, saving area but increasing LLE sensitivity. This must be controlled at the process level and accurately modeled in the process design kit (PDK) so that EDA tools can account for it. Overall, SMIC N+3 has a transistor density of 113.4 MTr/mm², slightly above TSMC N6 at 107.7 MTr/mm². Even without EUV, SMIC has achieved density beyond TSMC’s mature N6 node which utilizes EUV. Metal Stack The smallest critical dimension in the teardown is M0; SMIC N+3 uses a 32.5 nm local metal pitch. That is smaller than the 36 nm M0 pitch on Intel 18A in Panther Lake. However, this does not mean that SMIC has a better process than Intel 18A or TSMC N3P. M0 is a local intra-cell routing layer. Its usefulness depends on the full interconnect stack: M1 and M2 pitch, track count, via and line resistance, design rules, mask count, overlay control, and routing flexibility. The 32.5 nm M0 is consistent with self-aligned quadruple patterning (SAQP), whose four-population line-width loading we read coarsely as alternating widths of 21.5 to 24 nm; M1 and M2, at 38 and 40 nm, are consistent with self-aligned double patterning (SADP), a single A/B split. On TSMC N6, M0, M2, and M3 sit at a relaxed ~40 nm and are consistent with SADP-class double patterning, with no need for quadruple patterning. That said, we measure M2 for example at ~43 nm, likely inflated by sparse routing. We do not assign any specific layer to EUV from our cross-sections; the distinction we can draw is double versus quadruple patterning, not lithography wavelength. Transistor-level density in the front-end-of-line (FEOL) sets an upper bound, but the design is ultimately limited by what the interconnect stack can route. The lowest metals are the most important for standard-cell density, but the semi-global and global layers determine how usable that density is at the block and chip level. Two axes are commonly used for chip cross-sections: the fin-cut and the gate-cut. The micrograph above is a fin-cut and shows metals 0 through 3. This axis lets us see the even-numbered metals, with M0 right above the fins. There are two kinds of M0 lines. The first are the power rails; these are wide wires for the VDD and VSS running horizontally at the top and bottom edges of each standard cell. The wide wires measure 55 nm across, more than double the other M0 lines. Their width minimizes resistance and reduces IR drop. The second kind are intra-cell wires, short segments within the cell that connect terminals to M1. These have alternating widths between 21.5 and 24 nm. The M0 pitch is 32.5 nm, a 19% reduction versus N+2 and N6. At this pitch, DUV patterning requires more aggressive multi-patterning, increasing mask count, overlay sensitivity, process complexity and cost. M0 is below what a single DUV-defined spacer (SADP) can resolve, so SMIC cascades a second spacer step (SAQP). The cross-section reflects the cost: the M0 trenches are visibly more re-entrant (narrower at the bottom than the top) than M1 or M2 on the same chip and carry a bright barrier-rich foot where the trench meets the etch-stop layer. That shape is partly the intended damascene profile, as a slightly narrow bottom helps void-free copper fill, but its magnitude at M0 is driven by the tight pitch and the higher trench aspect ratio. Intel 18A supports an M0 pitch of 32 nm, although Panther Lake has only shipped with a looser 36 nm pitch. This is due to Intel’s heavy usage of HP libraries. Among leading-edge nodes, 18A has the loosest M0 pitches due to PowerVia. With power routing moving to the backside, congestion is reduced, and the entire front-side metal stack can be used for signal routing. M2 is the first true inter-cell routing layer. It runs horizontally like M0 but spans across multiple cells to carry block-level signals. The M2 pitch sets the cell’s track height – the number of M2 tracks that fit between the VDD and VSS rails, defining what the library calls a 6-track or 7.5-track cell. This layer is the most important, limiting the routing of entire blocks. SMIC N+3 features a 5.7-track cell. The M2 pitch is 40 nm, a 5% decrease over N+2 and the same as N6. This shrink keeps the pitch at the edge of what is possible with double patterning. Future nodes will need to increase the number of masks for M2 as reducing the number of tracks is much harder due to the limitations in routing. The micrograph above is in the perpendicular direction, the gate-cut, and shows metals 0 through 4. This allows us to see and measure the odd-numbered vertical metal layers. The M1 pitch is 38 nm, 9.5% less than N+2 and 33% less than N6. The M1-to-gate ratio matters because it sets local routing flexibility. N+2 and N+3 use a 3:2 ratio, while N6 uses a 1:1 ratio, explaining the huge differences in M1 pitch. The more M1 lines there are compared with the gates, the more flexibility there is for power and signal crossing within the cell. Routing flexibility enables more complex and better cells. Clean fractional ratios are also preferred as a grid is periodic and improves layouts. The 3:2 ratio gives SMIC more local routing flexibility than a strict 1:1 grid, but it also complicates layout and patterning. This is a DTCO choice, with SMIC increasing process complexity to recover density and routability without EUV. This 3:2 ratio is not very popular in the leading-edge nodes. TSMC has only used it on N7+, the N5 family, and the short-lived N3(B). They have switched back to a 1:1 ratio for N3E. Intel has only used it on the 10 nm/Intel 7 family, with Intel 4, 3 and 18A all using a 1:1 ratio. Samsung is the only one still using a 3:2 ratio at the leading edge, using it in the SF4 and SF3 families. It remains to be seen if SMIC will remain at a 3:2 ratio or move to a 1:1 ratio with its future nodes. The industry is still actively exploring these local-routing ratios. At VLSI 2026, imec will be presenting work on even higher ratios, including a 2:1 scheme that can reduce area by up to 14%. We will be covering the conference in a future newsletter article. Subscribe We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Interested in joining us on this ride and think you can be a difference maker? Check out our Careers page. The final local interconnect layer for N+3 is M3, with a pitch of 44 nm. The M3 pitch is the same as on N+2 and 10% larger than on N6. The semi-global layers carry the majority of block-level signal routing. They have a coarser pitch than the lower local layers. On leading-edge nodes, they are designed to sit at the limit of DUV single patterning. M4 through M11 pitches were found divided between 80–82 nm (M4–M6), 128 nm (M7–M10), and 148 nm (M11). Given limited sampling, it is possible these are divided further in dense routing areas. At the top are two giant metal layers, M12 and M13. These have kept the same pitches as N+2 at 1920 nm and 4600 nm respectively. While the lower layers’ pitches are generally fixed by the process and library, the upper layers vary much more in pitch and count, depending on the design. Even two smartphone SoCs on the same process can have wildly different metal stacks. The Helio G99 carries fewer routing layers, reaching coarse metal pitches of 850 nm by M9, while the larger and higher-performance Kirin 9030 keeps fine pitches until M11. SRAM At the leading edge, SRAM is much more difficult to scale than logic. TSMC’s latest nodes have seen little to no bitcell scaling, while logic still has more DTCO levers to pull. While looking for other logic libraries in the GPU compute units, we stumbled upon the SRAM. The most common type of SRAM has 6 transistors (6T), but this cell had 8 transistors (8T) instead. 8T SRAM adds two transistors to form a dedicated read port. Unlike a 6T cell, where reading disturbs the storage, the decoupled read port removes read-disturb, improving read stability and letting the cell be pushed harder for performance. At first glance, the cut looked like an unusual logic library, with each cell row having 3 fins of one polarity and 5 fins of another. The rows also alternated in orientation. Energy-dispersive X-ray spectroscopy (EDS) resolved our confusion. The cut had not landed on the GPU logic, but on the SRAM macro beside it. The unusual fin pattern was due to the SRAM library. We return to EDS in the process flow analysis behind the paywall. SRAM libraries are not like traditional logic libraries. Due to the unequal number of PMOS and NMOS transistors, they require specialized rules and layout libraries. They do not need the flexibility of logic libraries, so they are hyper-optimized for one purpose: dense, reliable memory. The SRAM cell we found is a 1:2:2-2:2 cell. This means there is 1 fin per pull-up (PU) PMOS transistor, and 2 fins per pull-down (PD) and pass-gate (PG) NMOS transistor. These 2 PU, 2 PD and 2 PG transistors would usually form a single 6T high-current cell (HCC). An 8T HCC adds a read-pull-down (RPD) and a read-pass-gate (RPG) NMOS transistor, each with two fins. We measured a cell height of 406 nm, which brings the bitcell size to 0.0463 µm². That is a theoretical peak density of 21.6 Mib/mm². We estimate that a 6T HCC would have a cell height of 292 nm and a size of 0.0337 µm². This is ~12% larger than a 6T HCC on Intel 3 and 4. We also estimate the 6T high-density cell (HDC) to have a cell height of 228 nm and a size of 0.0260 µm². This is coincidentally the same as the logic standard-cell height measured earlier. The estimate puts the cell near Samsung 7LPP/5LPP and slightly below TSMC N7/N6. That is a theoretical peak density of 38.5 Mib/mm². 6T HDC is arguably the most important cell as it is used for the largest caches in a chip, the L3 caches and system-level cache (SLC). Both the Kirin 9020 and 9030 have split the SLC into 4 banks to raise total SLC bandwidth. In the Kirin 9030, the SLC increased from 2 MiB to 3 MiB per bank. Correspondingly, the number of arrays within the bank also increased by 50%, from 16 to 24. Each array can store 128 KiB and forms an orderly pattern on the die shot. From the Kirin 9020 to the Kirin 9030, the area of a 128 KiB SLC array decreased from 0.0477 mm² to 0.0392 mm², an 18% shrink. The achieved density is 25.5 Mib/mm², 66% of the theoretical maximum. While the SLC was quite similar across both chips, the L3 has seen some major changes, particularly in terms of its layout. The total capacity also went up from 10 MiB to 12 MiB. Much like the SLC, the L3 is also split into 4 banks. In the Kirin 9020, an L3 bank consisted of 16× 128 KiB arrays and 16× 32 KiB arrays. However, an L3 bank in the Kirin 9030 instead consists of 48× 64 KiB arrays. In the Kirin 9020 L3, a 128 KiB array was 0.0513 mm² and a 32 KiB array was 0.0154 mm². The size of the 128 KiB array is different on the L3 and SLC as the assist circuitry for the two arrays differs depending on their purpose. In the Kirin 9030 L3, a 64 KiB array is 0.0210 mm². Although not a like-for-like comparison, normalized for capacity, it is 18% smaller than the 9020’s 128 KiB L3 array and 31% smaller than its 32 KiB L3 array. The achieved density is slightly lower than the SLC, at 23.8 Mib/mm², 62% of the theoretical maximum. Unlike the L3 and SLC, the prime cores’ private L2 cache uses a 2-bank design. As the prime cores’ L2 is latency-critical, it likely uses 6T HCC instead of 6T HDC. The 9020 has 16 arrays in each bank while the 9030 has 32. Each array has a capacity of 32 KiB. A 32 KiB array in the L2 shrank from 0.0171 mm² to 0.0142 mm², ~17% smaller. The density is 17.6 Mib/mm², ~59% of the theoretical maximum for 6T HCC. SRAM scaled well from N+2 to N+3, shrinking by ~19%, close to the theoretical logic shrink. The caveat is that N+2’s bitcells were unusually large, bigger than comparable 7 nm-class nodes, so part of the gain is catch-up rather than true scaling. With the insights from STEEL’s teardowns, we will be doing a deep dive into SRAM in a future newsletter article. Subscribe Everything above came out of a single STEEL teardown: die annotation, block-level area analysis and TEM cross-sections through logic and SRAM. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Future Roadmap The same cross-sections that pin down N+3 also show where SMIC can go next. Although N+3 is already close to the practical limits of DUV multi-patterning in several layers, SMIC still has a few scaling levers left. A theoretical N+4 would likely start with cell height. N+3 uses 5 M0 tracks between its power rails. Moving to 4 M0 tracks, as on SMIC N+2 and TSMC N6, could reduce cell height by roughly 15%. The routing grid is only one side of the shrink; the front end also must fit into the smaller cell. One possible FEOL lever is reducing the p-to-n isolation spacing from two diffusion grid units to one. Intel used this scaling booster on Intel 4, and TSMC did so on its N3 family. This path trades layout flexibility for density. Fewer M0 tracks reduce local routing resources, while tighter p-to-n spacing raises integration and design-rule difficulty. M2 is also constrained by the cell height shrink. For SMIC to maintain a ~5.7-track cell, M2 would need to move toward ~35 nm. That would move another layer into SAQP territory. SMIC could also reduce the CGP from 57 nm to 54 nm. Intel reached a similar CGP on Intel 10 nm/Intel 7 without EUV. The local interconnect is also tougher. If SMIC keeps the 3:2 M1-to-gate ratio, M1 would need to shrink to 36 nm and would likely require SAQP as well. If SMIC moves to a 1:1 ratio, M1 could relax to 54 nm, but it would give up routing flexibility. Under this theoretical path, we estimate that SMIC N+4 could reach a cell height of 198 nm and a CGP of 54 nm, implying a Bohr density of 137.8 MTr/mm², on par with TSMC N5 or Samsung SF4. However, the difficulty is cumulative. Each step is individually plausible, but together they make N+4 harder than the transition from N+2 to N+3. It will likely take longer, cost more, and carry less process margin. A theoretical N+5 would require a larger integration shift. One possible path is backside contacts (BSCon), moving power routing and source/drain contacts to the backside, which would reduce front-side routing pressure and enable another reduction in cell height. The front-side metal pitches could relax to reduce the process complexity. M0 would likely relax slightly to ~34 nm, and M2 and M4 pitches could relax further. CGP is unlikely to shrink much further. Even with EUV, 48 nm has been the practical limit for yield and process control. This approach would allow N+5’s cell height to fall to 170 nm and its CGP to 53 nm. This implies a Bohr density of 163.6 MTr/mm², on par with Intel 18A’s HP library. However, this would not make N+5 cost-competitive with the leading edge. It would reach a similar density through a much more expensive route. The integration difficulty rises sharply, with new process flows for backside alignment, wafer thinning, contact reveal, and backside metallization. Past this point, standard density and interconnect scaling become increasingly unattractive. That is where Huawei’s roadmap stops looking like a normal foundry roadmap and starts looking like a packaging roadmap. At ISCAS 2026, Huawei unveiled its tau (τ) scaling law, reframing process scaling in the time domain. τ is the time cost of data movement and processing: switching delays in transistors, RC signal propagation delays in circuits, compute, memory, and networking latency. Outside Huawei’s terminology, this is called system-technology co-optimization. This is Huawei’s answer to its lack of EUV lithography. Without EUV, planar density cannot keep pace with TSMC, Intel, or Samsung. If transistor density cannot shrink further, Huawei’s alternative is to shorten wires, reduce buffering, and stack logic vertically. “LogicFolding”, Huawei’s implementation of this new scaling idea, is, in practice, an aggressive 3D stacking approach. AMD V-Cache places SRAM above or below a CPU die. AMD’s MI350X places active interposer dies (AIDs) underneath accelerator and compute dies (XCDs), with the AIDs handling cache, IO interfaces, the network-on-chip (NoC) and embedded metal-insulator-metal (MIM) capacitors. With LogicFolding, parts of the same logic block are split across multiple active dies bonded face-to-face at ultra-fine pitch. This allows Huawei to shorten some critical paths and reduce buffer overhead, not merely add cache capacity or offload the IO and interconnect. Shortening wires is where the higher clocks come from. A large share of a modern core’s delay and energy budget goes into driving long interconnects and the repeater buffers along them. LogicFolding distributes a block’s critical-path gates across multiple stacked tiers bonded at a very fine pitch, so the bond interface behaves like an additional metal layer and the longest paths get shorter. That is how Huawei expects to recover frequency and efficiency it cannot get from the process alone. Huawei’s roadmap shows its intent. Prime core frequency is targeted to rise from 2.75 GHz in the Kirin 9030 to roughly 5 GHz by 2031, far beyond what planar scaling alone could deliver. Prime cores with 3.1 and 3.39 GHz clocks are being tested in its labs, although their power consumption is unknown. Beyond that, chips are in the design, simulation or pathfinding phase, meaning the frequencies are targets. However, the direction matters more: LogicFolding also helps with performance, not just density. The catch is that Huawei’s density claim is not directly comparable to foundry densities. A stacked design can report more transistors per package footprint by adding active layers, even if each patterned die remains well behind TSMC or Intel in front-end density. This is how Huawei can claim to reach foundry 14A-equivalent density by 2031. This is not a like-for-like foundry comparison, with Huawei using stacked logic and measuring density per package footprint. On a normalized Bohr-density basis, SMIC N+3 is ~114 MTr/mm², 38% less than Intel 18A’s HD library. Huawei’s 3D roadmap closes the gap by stacking active logic, reaching 215 MTr/mm² by 2030. In 2031, the roadmap density jumps to 295 MTr/mm², implying either a third active layer, partial EUV insertion or aggressive planar DUV scaling. Huawei’s methodology makes other foundries look much denser as well. Applying it to AMD’s MI450X with an N2 top die on an N3P base die yields a theoretical density of 460.2 MTr/mm² in 2026, compared with Huawei’s 295 MTr/mm² in 2031. This Kirin 9030 does not use LogicFolding, remaining in a conventional mobile SoC package. Instead, it forms the baseline for how far Huawei and SMIC can push planar scaling. Future teardowns of Kirin and Ascend chips will show both planar logic density and Huawei’s hybrid bonding solutions. Export controls changed China’s optimization problem rather than ending it. EUV restrictions raised the cost and complexity of leading-edge manufacturing without freezing it. SMIC reaches N6-class logic density through DUV immersion, SAQP and DTCO, while Huawei shifts more of the burden onto architecture, packaging and system-level integration. Future nodes will be tougher. N+3 still had room to tighten local metals and reduce cell height and CGP. Further scaling without EUV leaves fewer levers. More aggressive multi-patterning adds masks and overlay error. SMIC can keep pushing DUV, but each step will get more expensive and less forgiving. The design side is just as critical. Huawei had domestic EDA tools and flows before the Kirin 9030, with the Kirin 9000s, 9010 and 9020 making that clear. Huawei was able to ship multiple consumer SoCs on SMIC N+2 and N+3 while cut off from the Western EDA stack. US export controls restricted EDA tools for advanced chips in 2022 but did not target tools for more mature chips. In 2025, the US government briefly placed much broader restrictions on EDA software from Synopsys, Cadence, and others, before lifting them less than two months later as part of a trade deal tied to rare earths. Huawei has been unable to access those tools because it remains on a US trade blacklist. That forced Huawei, SMIC and Chinese academic institutions to build their own tools and flows. Researchers at Peking University recently announced a prototype EDA tool for Huawei’s LogicFolding architecture, which requires a new flow to handle the multilayer layout and floorplan. This is not the same as replacing the full Synopsys or Cadence stack, but it shows where domestic EDA is headed: toward tighter co-optimization between architecture, process and packaging. These advances are also diffusing into the Chinese ecosystem. SMIC is licensing its N+2 and N+3 processes to HLMC/Hua Hong at the government’s direction rather than by choice. If the same process learning feeds into Ascend accelerators for AI training and inference, the choke point shifts from one named fab to an ecosystem. Alibaba’s T-Head silicon arm and Cambricon, a Chinese AI chip designer that is expected to supply ByteDance, could also be major beneficiaries. Sanctions aimed at SMIC alone become less effective once the manufacturing knowledge has spread to other fabs and design houses. China is not closing the gap with Intel, Samsung and TSMC. The teardown shows the opposite in several places: no EUV, no backside power, higher process complexity, and visible trade-offs. But China is still advancing. If domestic chips become good enough for phones, inference, networking and security-sensitive workloads, they can matter strategically without matching TSMC at the leading edge. Behind the paywall, we show what else STEEL can do, with material and process flow analysis of SMIC N+3, and analysis of the Kirin 9030 package. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline, access the full Kirin 9030 and SMIC N+3 analysis or to commission a custom teardown, contact sales@semianalysis.com.
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Logitech’s new travel mouse borrows a fun trick from your first cellphone.
Best Look at Foldable iPhone Design Revealed, May Only Come in White
Sonny Dickson today shared detailed images of a foldable iPhone dummy unit with what appears to be a finalized design, providing the best look yet at the device's look, with the suggestion that the device may only be available in white. Dummy units are non-functional units intended primarily for display purposes and accessory manufacturers, who need a high level of physical accuracy to mass produce cases and other accessories ahead of a device's announcement.
Functional food science lab changing how students learn
LEWISTOWN — A new kind of lab is reshaping how students think about agriculture — and it doesn’t look like a farm. Inside the Mifflin County Academy of Science and Technology in Lewistown, students are stepping into a growing field where food safety, science, and innovation meet. When Agricultural Sciences instructor Nicolette Cusate arrived at […]
BevNET Live: Everwell Health showcases science-backed functional beverage ingredients
Wellness ingredients supplier Everwell Health will be showcasing its “Ingredients for Life” portfolio of functional beverage solutions for caffeine-free energy, concentration, protein, and weight loss at the upcoming BevNET Live event next week in New York City, US (June 10–11). Everwell Health experts will be present at the show, highlighting how the company’s ingredients can help formulators create differentiated beverages that meet growing consumer demand for convenient, multifunctional, and health-focused beverages.
Everwell Health highlights science-backed ingredients for functional beverages at BevNET Live 2026
Everwell Health will showcase its “Ingredients for Life” portfolio at BevNET Live in New York City from June 10–11
Check out the Rome YMCA's new Functional Fitness Room
The Rome Family YMCA recently unveiled a newly renovated and stocked Functional Fitness Room, transforming a sparsely used teen space into a "modern, high performance training environment," according to YMCA officials.
Why a Neo Geo port of Doom is functionally impossible
Sprite-based graphics architecture makes first-person 3D a challenge.
Microsoft Office 2019 for Mac Will Soon Stop Letting You Edit Documents
Microsoft will prevent Office 2019 for Mac owners from editing their documents from July 13, a restriction the company is attributing to the productivity suite's expiring digital certificate. The Office 2019 apps affected include Word, Excel, PowerPoint, Outlook, and OneNote. Once the certificate used to confirm the suite's license expires, these apps will drop into what Microsoft is calling "reduced functionality mode".
Nintendo Music 1.6.0 update out now, patch notes - plus browser version live
Nintendo Music just came out with a new version 1.6.0 update with some new functionality, and here are the patch notes.
iOS 27's New Siri App and 'Search or Ask' Feature Leaked in Screenshots
Bloomberg's Mark Gurman today shared a series of re-created screenshots that reveal iOS 27's all-new Siri app and "Search or Ask" functionality. The images are renders that were created based on information obtained by Bloomberg. With the Siri app, iPhone, iPad, and Mac users will be able to interact with Apple's assistant in both text and voice modes. The app will allow for back-and-forth conversations, complete with messaging history that can be set to expire.
Heart-healthy lipid profile benefits brain health in adolescents, study finds
A new Finnish study shows that blood markers of dysfunctional lipid metabolism are associated with poorer cognitive function in 15–17-year-olds. The findings are significant because brain development ...
Toward power-generating displays: a single device that harvests and emits light
A newly developed organic semiconductor device can both generate electricity from light and emit bright visible light, as reported by researchers from Science Tokyo. By carefully designing a material where energy losses are suppressed, the team achieved efficient power conversion and electroluminescence simultaneously, demonstrating a multifunctional platform with potential applications in displays, sensors, and energy-harvesting technologies.
New MatterChat Model Helps AI to ‘See’ the Language of Science
From writing emails to generating computer code, much of the artificial intelligence prevalent in our daily lives has succeeded by mastering one domain: text. However, this leaves a major blind spot in the physical sciences, where models depend on the high-resolution, three-dimensional data of the physical world, like the intricate lattice of atoms in a crystal. Delivering on the promise of using AI for science requires teaching these data-driven text models to seamlessly “talk to” physics-based models. Now, a new AI framework from Lawrence Berkeley National Laboratory (Berkeley Lab), called MatterChat, solves this problem by creating a specialized “bridge.” It connects the conversational power of a Large Language Model (LLM) with a physics-based AI that models “interatomic potentials”: the complex physical forces between atoms. The resulting system already significantly outperforms general-purpose AI tools like GPT-4 at predicting material properties, and the team hopes it can accelerate scientific discovery by serving as a robust research partner that provides grounded insights and generates step-by-step instructions for synthesizing novel materials. A paper describing this work was recently published in Nature Machine Intelligence. “Traditional simulations can provide the physical rigor required for materials science, yet their computational cost remains prohibitive for high-throughput screening. Conversely, while LLMs excel at rapid knowledge synthesis, they inherently lack the ‘structural vision’ to interpret materials directly from their underlying atomic coordinates,” said Yingheng Tang, a postdoctoral researcher in Berkeley Lab’s Applied Math and Computational Research Division (AMCR) and lead author on the paper. “MatterChat was built to solve this dilemma, empowering LLMs with a structural ‘vision’ that allows researchers to leverage their full potential for solving complex, real-world materials challenges.” Empowering language models to solve complex challenges in materials science To build MatterChat, the Berkeley Lab team drew inspiration from technologies like Vision Question Answering (VQA) and Text-to-Image (T2I) generation. In these tasks, AI must translate high-level text concepts into visual images, or vice versa. Doing so requires developers to build tools that “bridge” two fundamentally different forms of data. The researchers adapted this concept to the physical sciences. With MatterChat, they created a “bridge model” that successfully connects an LLM’s general knowledge with the deep understanding of the atomic-scale world encoded in scientific interatomic potentials. Until now, researchers using LLMs to solve materials problems usually had to feed them raw data files as if they were just strings of text. It’s like asking an AI to understand a complex 3D engine based only on a parts list: the LLM can read the names, but it can’t “see” how the atoms fit together in space. MatterChat solves this by training a specialized AI bridge model, pre-trained on millions of crystal structures and an LLM, to align the LLM’s representation of the world with the interatomic potential’s representation of the world. The bridge model can translate physical insights into a format the LLM can actually understand. By giving the LLM these “scientific eyes”— a scientific “inductive bias” in the terminology of AI — the Berkeley Lab team has transformed it into a robust research tool capable of providing grounded scientific insights into complex materials challenges, such as predicting thermal stability or analyzing electronic band gaps. “We think of atoms as living in a physical space, but from a machine learning perspective, they are just vectors living in some very non-trivially structured manifold in a high-dimensional Euclidean space; and, of course, the same is true for the sentences and paragraphs that we use to express our ideas about those atoms,” said co-author Michael Mahoney, Berkeley Lab’s Scientific Data Division (SDD) AI Initiative Research Lead. “The bridge model basically gets those two structures to ‘talk with’ each other.” As a proof-of-concept of this general approach, the team trained their bridge model on a dataset curated by pairing nearly 143,000 stable atomic structures from the Materials Project with their corresponding physical properties. This training data was automatically assembled using the Materials Project’s API and deliberately enriched with properties fundamental to microelectronics design — like formation energy and bandgap — allowing MatterChat to learn the complex patterns connecting a material’s atomic blueprint to its functional performance. To validate their model, the researchers benchmarked MatterChat against a suite of other AI systems, from general-purpose LLMs to other specialized scientific AI methods. The results show that MatterChat consistently outperformed its competitors across a range of tasks. The model was more accurate in classifying material types and demonstrated superior precision in predicting numerical properties. For example, it excelled at predicting a material’s bandgap, a property critical for designing new electronics from high-capacity energy storage to next-generation computer chips. “Our design is significantly more efficient because we don’t have to build a massive AI model from the ground up,” said co-author Zhi (Jackie) Yao, a research scientist in Berkeley Lab’s AMCR. “Instead, we take two powerful, pre-trained models — a structural encoder for materials physics and an open-source LLM — and use them off-the-shelf. The only component we actually train is the lightweight ‘bridge model’ that translates between them. It’s the difference between building an entire car factory and simply designing a smart adapter that connects a world-class engine to a world-class navigation system. This approach is not only computationally efficient, but also makes the system modular, so we can easily upgrade components or adapt the bridge for other scientific domains in the future.” Crucially, this modular design highlights exactly how institutions like Berkeley Lab and the Department of Energy are carving out a highly valuable niche in the booming AI landscape. Rather than competing with Silicon Valley tech giants to build ever-larger language models from scratch, the lab is focusing on the specialized connective tissue that makes commercial AI useful for hardcore science. Because the bridge model approach underlying MatterChat is forward-compatible, it is perfectly positioned to leverage these parallel tracks of innovation. As Mahoney pointed out, “We expect that industry will continue to develop improved LLMs, and we expect domain scientists and facilities will continue to generate new data. An important part of scientific machine learning is not simply to solve problems on today’s data, but instead to develop general methods that will be forward-compatible with orders of magnitude more data, whether from scientific domains or from LLMs.” According to Yao, the MatterChat project, which was initially developed and enhanced with funding from a Berkeley Lab Laboratory Directed Research & Development (LDRD) Program, will now expand its capabilities. In a collaboration with Fermilab, MatterChat is already contributing to a U.S. Department of Energy Genesis Mission project — called Accelerating eXtreme Environment Specs-to-Silicon (AXESS) — that aims to speed up the development of next-generation, high-speed, radiation-hardened detectors for challenging particle physics experiments by using advanced 3D integrated circuits (chiplets) and AI-driven data analysis. In addition to the LDRD support, the team also credits supercomputing resources at the National Energy Research Scientific Computing Center (NERSC), located at Berkeley Lab, with MatterChat’s success. “We are incredibly grateful to NERSC; this research simply would not have happened without access to the Perlmutter supercomputer through their AI for Science program,” said Tang. Wenbin Xu, a NERSC postdoctoral fellow at the time, was also a major co-author of the work, as was Benjamin Erichson, a research scientist in Berkeley Lab’s SDD, highlighting the benefits of AMCR-SDD collaboration on AI for science. ### Lawrence Berkeley National Laboratory (Berkeley Lab) is committed to groundbreaking research focused on discovery science and solutions for abundant and reliable energy supplies. The lab’s expertise spans materials, chemistry, physics, biology, earth and environmental science, mathematics, and computing. Researchers from around the world rely on the lab’s world-class scientific facilities for their own pioneering research. Founded in 1931 on the belief that the biggest problems are best addressed by teams, Berkeley Lab and its scientists have been recognized with 17 Nobel Prizes. Berkeley Lab is a multiprogram national laboratory managed by the University of California for the U.S. Department of Energy’s Office of Science. DOE’s Office of Science is the single largest supporter of basic research in the physical sciences in the United States, and is working to address some of the most pressing challenges of our time. For more information, please visit energy.gov/science.
14 Cool Mini Gadgets You Can Find On Amazon
From portable projectors to pocket-sized tools and speakers, these budget gadgets pack surprising functionality into their diminutive designs.
Notre Dame says jump. ACC asks how high. Inside college football's most dysfunctional relationship
The Fighting Irish can insult, blame and posture — safe in the knowledge the ACC will never push back.
Latest Google Home update speeds up Gemini, ‘Ask Home’ now works with voice commands
Yet another Google Home update rolling out this week speeds up Gemini while adding “Ask Home” functionality to voice commands...